SConscript revision 13012
1955SN/A# -*- mode:python -*-
2955SN/A
37816Ssteve.reinhardt@amd.com# Copyright (c) 2006 The Regents of The University of Michigan
45871Snate@binkert.org# All rights reserved.
51762SN/A#
6955SN/A# Redistribution and use in source and binary forms, with or without
7955SN/A# modification, are permitted provided that the following conditions are
8955SN/A# met: redistributions of source code must retain the above copyright
9955SN/A# notice, this list of conditions and the following disclaimer;
10955SN/A# redistributions in binary form must reproduce the above copyright
11955SN/A# notice, this list of conditions and the following disclaimer in the
12955SN/A# documentation and/or other materials provided with the distribution;
13955SN/A# neither the name of the copyright holders nor the names of its
14955SN/A# contributors may be used to endorse or promote products derived from
15955SN/A# this software without specific prior written permission.
16955SN/A#
17955SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18955SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19955SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20955SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21955SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22955SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23955SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24955SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25955SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26955SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27955SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28955SN/A#
29955SN/A# Authors: Nathan Binkert
302665Ssaidi@eecs.umich.edu
312665Ssaidi@eecs.umich.eduImport('*')
325863Snate@binkert.org
33955SN/Aneed_simple_base = False
34955SN/Aif 'AtomicSimpleCPU' in env['CPU_MODELS']:
35955SN/A    need_simple_base = True
36955SN/A    SimObject('AtomicSimpleCPU.py')
37955SN/A    Source('atomic.cc')
388878Ssteve.reinhardt@amd.com
392632Sstever@eecs.umich.edu    # The NonCachingSimpleCPU is really an atomic CPU in
408878Ssteve.reinhardt@amd.com    # disguise. It's therefore always enabled when the atomic CPU is
412632Sstever@eecs.umich.edu    # enabled.
42955SN/A    SimObject('NonCachingSimpleCPU.py')
438878Ssteve.reinhardt@amd.com    Source('noncaching.cc')
442632Sstever@eecs.umich.edu
452761Sstever@eecs.umich.eduif 'TimingSimpleCPU' in env['CPU_MODELS']:
462632Sstever@eecs.umich.edu    need_simple_base = True
472632Sstever@eecs.umich.edu    SimObject('TimingSimpleCPU.py')
482632Sstever@eecs.umich.edu    Source('timing.cc')
492761Sstever@eecs.umich.edu
502761Sstever@eecs.umich.eduif 'AtomicSimpleCPU' in env['CPU_MODELS'] or \
512761Sstever@eecs.umich.edu       'TimingSimpleCPU' in env['CPU_MODELS']:
528878Ssteve.reinhardt@amd.com    DebugFlag('SimpleCPU')
538878Ssteve.reinhardt@amd.com
542761Sstever@eecs.umich.eduif need_simple_base:
552761Sstever@eecs.umich.edu    Source('base.cc')
562761Sstever@eecs.umich.edu    SimObject('BaseSimpleCPU.py')
572761Sstever@eecs.umich.edu