bpred_unit.hh revision 2292 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __CPU_O3_BPRED_UNIT_HH__
30#define __CPU_O3_BPRED_UNIT_HH__
31
32// For Addr type.
33#include "arch/isa_traits.hh"
34#include "base/statistics.hh"
35#include "cpu/inst_seq.hh"
36
37#include "cpu/o3/2bit_local_pred.hh"
38#include "cpu/o3/btb.hh"
39#include "cpu/o3/ras.hh"
40#include "cpu/o3/tournament_pred.hh"
41
42#include <list>
43
44/**
45 * Basically a wrapper class to hold both the branch predictor
46 * and the BTB.  Right now I'm unsure of the implementation; it would
47 * be nicer to have something closer to the CPUPolicy or the Impl where
48 * this is just typedefs, but it forces the upper level stages to be
49 * aware of the constructors of the BP and the BTB.  The nicer thing
50 * to do is have this templated on the Impl, accept the usual Params
51 * object, and be able to call the constructors on the BP and BTB.
52 */
53template<class Impl>
54class TwobitBPredUnit
55{
56  public:
57    typedef typename Impl::Params Params;
58    typedef typename Impl::DynInstPtr DynInstPtr;
59
60    /**
61     * @param params The params object, that has the size of the BP and BTB.
62     */
63    TwobitBPredUnit(Params *params);
64
65    /**
66     * Registers statistics.
67     */
68    void regStats();
69
70    /**
71     * Predicts whether or not the instruction is a taken branch, and the
72     * target of the branch if it is taken.
73     * @param inst The branch instruction.
74     * @param PC The predicted PC is passed back through this parameter.
75     * @param tid The thread id.
76     * @return Returns if the branch is taken or not.
77     */
78    bool predict(DynInstPtr &inst, Addr &PC, unsigned tid);
79
80    /**
81     * Tells the branch predictor to commit any updates until the given
82     * sequence number.
83     * @param done_sn The sequence number to commit any older updates up until.
84     * @param tid The thread id.
85     */
86    void update(const InstSeqNum &done_sn, unsigned tid);
87
88    /**
89     * Squashes all outstanding updates until a given sequence number.
90     * @param squashed_sn The sequence number to squash any younger updates up
91     * until.
92     * @param tid The thread id.
93     */
94    void squash(const InstSeqNum &squashed_sn, unsigned tid);
95
96    /**
97     * Squashes all outstanding updates until a given sequence number, and
98     * corrects that sn's update with the proper address and taken/not taken.
99     * @param squashed_sn The sequence number to squash any younger updates up
100     * until.
101     * @param corr_target The correct branch target.
102     * @param actually_taken The correct branch direction.
103     * @param tid The thread id.
104     */
105    void squash(const InstSeqNum &squashed_sn, const Addr &corr_target,
106                bool actually_taken, unsigned tid);
107
108    /**
109     * Looks up a given PC in the BP to see if it is taken or not taken.
110     * @param inst_PC The PC to look up.
111     * @return Whether the branch is taken or not taken.
112     */
113    bool BPLookup(Addr &inst_PC)
114    { return BP.lookup(inst_PC); }
115
116    /**
117     * Looks up a given PC in the BTB to see if a matching entry exists.
118     * @param inst_PC The PC to look up.
119     * @return Whether the BTB contains the given PC.
120     */
121    bool BTBValid(Addr &inst_PC)
122    { return BTB.valid(inst_PC, 0); }
123
124    /**
125     * Looks up a given PC in the BTB to get the predicted target.
126     * @param inst_PC The PC to look up.
127     * @return The address of the target of the branch.
128     */
129    Addr BTBLookup(Addr &inst_PC)
130    { return BTB.lookup(inst_PC, 0); }
131
132    /**
133     * Updates the BP with taken/not taken information.
134     * @param inst_PC The branch's PC that will be updated.
135     * @param taken Whether the branch was taken or not taken.
136     * @todo Make this update flexible enough to handle a global predictor.
137     */
138    void BPUpdate(Addr &inst_PC, bool taken)
139    { BP.update(inst_PC, taken); }
140
141    /**
142     * Updates the BTB with the target of a branch.
143     * @param inst_PC The branch's PC that will be updated.
144     * @param target_PC The branch's target that will be added to the BTB.
145     */
146    void BTBUpdate(Addr &inst_PC, Addr &target_PC)
147    { BTB.update(inst_PC, target_PC,0); }
148
149  private:
150    struct PredictorHistory {
151        /**
152         * Makes a predictor history struct that contains a sequence number,
153         * the PC of its instruction, and whether or not it was predicted
154         * taken.
155         */
156        PredictorHistory(const InstSeqNum &seq_num, const Addr &inst_PC,
157                         const bool pred_taken, const unsigned _tid)
158            : seqNum(seq_num), PC(inst_PC), RASTarget(0), globalHistory(0),
159              RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0),
160              wasCall(0)
161        { }
162
163        /** The sequence number for the predictor history entry. */
164        InstSeqNum seqNum;
165
166        /** The PC associated with the sequence number. */
167        Addr PC;
168
169        /** The RAS target (only valid if a return). */
170        Addr RASTarget;
171
172        /** The global history at the time this entry was created. */
173        unsigned globalHistory;
174
175        /** The RAS index of the instruction (only valid if a call). */
176        unsigned RASIndex;
177
178        /** The thread id. */
179        unsigned tid;
180
181        /** Whether or not it was predicted taken. */
182        bool predTaken;
183
184        /** Whether or not the RAS was used. */
185        bool usedRAS;
186
187        /** Whether or not the instruction was a call. */
188        bool wasCall;
189    };
190
191    typedef std::list<PredictorHistory> History;
192
193    /**
194     * The per-thread predictor history. This is used to update the predictor
195     * as instructions are committed, or restore it to the proper state after
196     * a squash.
197     */
198    History predHist[Impl::MaxThreads];
199
200    /** The branch predictor. */
201    DefaultBP BP;
202
203    /** The BTB. */
204    DefaultBTB BTB;
205
206    /** The per-thread return address stack. */
207    ReturnAddrStack RAS[Impl::MaxThreads];
208
209    /** Stat for number of BP lookups. */
210    Stats::Scalar<> lookups;
211    /** Stat for number of conditional branches predicted. */
212    Stats::Scalar<> condPredicted;
213    /** Stat for number of conditional branches predicted incorrectly. */
214    Stats::Scalar<> condIncorrect;
215    /** Stat for number of BTB lookups. */
216    Stats::Scalar<> BTBLookups;
217    /** Stat for number of BTB hits. */
218    Stats::Scalar<> BTBHits;
219    /** Stat for number of times the BTB is correct. */
220    Stats::Scalar<> BTBCorrect;
221    /** Stat for number of times the RAS is used to get a target. */
222    Stats::Scalar<> usedRAS;
223    /** Stat for number of times the RAS is incorrect. */
224    Stats::Scalar<> RASIncorrect;
225};
226
227#endif // __CPU_O3_BPRED_UNIT_HH__
228