bpred_unit.hh revision 8842
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 */ 30 31#ifndef __CPU_O3_BPRED_UNIT_HH__ 32#define __CPU_O3_BPRED_UNIT_HH__ 33 34#include <list> 35 36#include "base/statistics.hh" 37#include "base/types.hh" 38#include "cpu/pred/2bit_local.hh" 39#include "cpu/pred/btb.hh" 40#include "cpu/pred/ras.hh" 41#include "cpu/pred/tournament.hh" 42#include "cpu/inst_seq.hh" 43 44struct DerivO3CPUParams; 45 46/** 47 * Basically a wrapper class to hold both the branch predictor 48 * and the BTB. 49 */ 50template<class Impl> 51class BPredUnit 52{ 53 private: 54 typedef typename Impl::DynInstPtr DynInstPtr; 55 56 enum PredType { 57 Local, 58 Tournament 59 }; 60 61 PredType predictor; 62 63 const std::string _name; 64 65 public: 66 67 /** 68 * @param params The params object, that has the size of the BP and BTB. 69 */ 70 BPredUnit(DerivO3CPUParams *params); 71 72 const std::string &name() const { return _name; } 73 74 /** 75 * Registers statistics. 76 */ 77 void regStats(); 78 79 void switchOut(); 80 81 void takeOverFrom(); 82 83 /** 84 * Predicts whether or not the instruction is a taken branch, and the 85 * target of the branch if it is taken. 86 * @param inst The branch instruction. 87 * @param PC The predicted PC is passed back through this parameter. 88 * @param tid The thread id. 89 * @return Returns if the branch is taken or not. 90 */ 91 bool predict(DynInstPtr &inst, TheISA::PCState &pc, ThreadID tid); 92 93 // @todo: Rename this function. 94 void BPUncond(void * &bp_history); 95 96 /** 97 * Tells the branch predictor to commit any updates until the given 98 * sequence number. 99 * @param done_sn The sequence number to commit any older updates up until. 100 * @param tid The thread id. 101 */ 102 void update(const InstSeqNum &done_sn, ThreadID tid); 103 104 /** 105 * Squashes all outstanding updates until a given sequence number. 106 * @param squashed_sn The sequence number to squash any younger updates up 107 * until. 108 * @param tid The thread id. 109 */ 110 void squash(const InstSeqNum &squashed_sn, ThreadID tid); 111 112 /** 113 * Squashes all outstanding updates until a given sequence number, and 114 * corrects that sn's update with the proper address and taken/not taken. 115 * @param squashed_sn The sequence number to squash any younger updates up 116 * until. 117 * @param corr_target The correct branch target. 118 * @param actually_taken The correct branch direction. 119 * @param tid The thread id. 120 */ 121 void squash(const InstSeqNum &squashed_sn, 122 const TheISA::PCState &corr_target, 123 bool actually_taken, ThreadID tid); 124 125 /** 126 * @param bp_history Pointer to the history object. The predictor 127 * will need to update any state and delete the object. 128 */ 129 void BPSquash(void *bp_history); 130 131 /** 132 * Looks up a given PC in the BP to see if it is taken or not taken. 133 * @param inst_PC The PC to look up. 134 * @param bp_history Pointer that will be set to an object that 135 * has the branch predictor state associated with the lookup. 136 * @return Whether the branch is taken or not taken. 137 */ 138 bool BPLookup(Addr instPC, void * &bp_history); 139 140 /** 141 * If a branch is not taken, because the BTB address is invalid or missing, 142 * this function sets the appropriate counter in the global and local 143 * predictors to not taken. 144 * @param inst_PC The PC to look up the local predictor. 145 * @param bp_history Pointer that will be set to an object that 146 * has the branch predictor state associated with the lookup. 147 */ 148 void BPBTBUpdate(Addr instPC, void * &bp_history); 149 150 /** 151 * Looks up a given PC in the BTB to see if a matching entry exists. 152 * @param inst_PC The PC to look up. 153 * @return Whether the BTB contains the given PC. 154 */ 155 bool BTBValid(Addr instPC) 156 { return BTB.valid(instPC, 0); } 157 158 /** 159 * Looks up a given PC in the BTB to get the predicted target. 160 * @param inst_PC The PC to look up. 161 * @return The address of the target of the branch. 162 */ 163 TheISA::PCState BTBLookup(Addr instPC) 164 { return BTB.lookup(instPC, 0); } 165 166 /** 167 * Updates the BP with taken/not taken information. 168 * @param inst_PC The branch's PC that will be updated. 169 * @param taken Whether the branch was taken or not taken. 170 * @param bp_history Pointer to the branch predictor state that is 171 * associated with the branch lookup that is being updated. 172 * @param squashed Set to true when this function is called during a 173 * squash operation. 174 * @todo Make this update flexible enough to handle a global predictor. 175 */ 176 void BPUpdate(Addr instPC, bool taken, void *bp_history, bool squashed); 177 178 /** 179 * Updates the BTB with the target of a branch. 180 * @param inst_PC The branch's PC that will be updated. 181 * @param target_PC The branch's target that will be added to the BTB. 182 */ 183 void BTBUpdate(Addr instPC, const TheISA::PCState &target) 184 { BTB.update(instPC, target, 0); } 185 186 void dump(); 187 188 private: 189 struct PredictorHistory { 190 /** 191 * Makes a predictor history struct that contains any 192 * information needed to update the predictor, BTB, and RAS. 193 */ 194 PredictorHistory(const InstSeqNum &seq_num, Addr instPC, 195 bool pred_taken, void *bp_history, 196 ThreadID _tid) 197 : seqNum(seq_num), pc(instPC), RASTarget(0), RASIndex(0), 198 tid(_tid), predTaken(pred_taken), usedRAS(0), 199 wasCall(0), bpHistory(bp_history) 200 {} 201 202 bool operator==(const PredictorHistory &entry) const { 203 return this->seqNum == entry.seqNum; 204 } 205 206 /** The sequence number for the predictor history entry. */ 207 InstSeqNum seqNum; 208 209 /** The PC associated with the sequence number. */ 210 Addr pc; 211 212 /** The RAS target (only valid if a return). */ 213 TheISA::PCState RASTarget; 214 215 /** The RAS index of the instruction (only valid if a call). */ 216 unsigned RASIndex; 217 218 /** The thread id. */ 219 ThreadID tid; 220 221 /** Whether or not it was predicted taken. */ 222 bool predTaken; 223 224 /** Whether or not the RAS was used. */ 225 bool usedRAS; 226 227 /** Whether or not the instruction was a call. */ 228 bool wasCall; 229 230 /** Pointer to the history object passed back from the branch 231 * predictor. It is used to update or restore state of the 232 * branch predictor. 233 */ 234 void *bpHistory; 235 }; 236 237 typedef std::list<PredictorHistory> History; 238 typedef typename History::iterator HistoryIt; 239 240 /** 241 * The per-thread predictor history. This is used to update the predictor 242 * as instructions are committed, or restore it to the proper state after 243 * a squash. 244 */ 245 History predHist[Impl::MaxThreads]; 246 247 /** The local branch predictor. */ 248 LocalBP *localBP; 249 250 /** The tournament branch predictor. */ 251 TournamentBP *tournamentBP; 252 253 /** The BTB. */ 254 DefaultBTB BTB; 255 256 /** The per-thread return address stack. */ 257 ReturnAddrStack RAS[Impl::MaxThreads]; 258 259 /** Stat for number of BP lookups. */ 260 Stats::Scalar lookups; 261 /** Stat for number of conditional branches predicted. */ 262 Stats::Scalar condPredicted; 263 /** Stat for number of conditional branches predicted incorrectly. */ 264 Stats::Scalar condIncorrect; 265 /** Stat for number of BTB lookups. */ 266 Stats::Scalar BTBLookups; 267 /** Stat for number of BTB hits. */ 268 Stats::Scalar BTBHits; 269 /** Stat for number of times the BTB is correct. */ 270 Stats::Scalar BTBCorrect; 271 /** Stat for number of times the RAS is used to get a target. */ 272 Stats::Scalar usedRAS; 273 /** Stat for number of times the RAS is incorrect. */ 274 Stats::Scalar RASIncorrect; 275}; 276 277#endif // __CPU_O3_BPRED_UNIT_HH__ 278