scoreboard.cc revision 4642:d7b2de2d72f1
16019Shines@cs.fsu.edu/* 27093Sgblack@eecs.umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan 37093Sgblack@eecs.umich.edu * All rights reserved. 47093Sgblack@eecs.umich.edu * 57093Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 67093Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 77093Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 87093Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 97093Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 107093Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 117093Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 127093Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 137093Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 146019Shines@cs.fsu.edu * this software without specific prior written permission. 156019Shines@cs.fsu.edu * 166019Shines@cs.fsu.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176019Shines@cs.fsu.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186019Shines@cs.fsu.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196019Shines@cs.fsu.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206019Shines@cs.fsu.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216019Shines@cs.fsu.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226019Shines@cs.fsu.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236019Shines@cs.fsu.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246019Shines@cs.fsu.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256019Shines@cs.fsu.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266019Shines@cs.fsu.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276019Shines@cs.fsu.edu * 286019Shines@cs.fsu.edu * Authors: Korey Sewell 296019Shines@cs.fsu.edu * Kevin Lim 306019Shines@cs.fsu.edu */ 316019Shines@cs.fsu.edu 326019Shines@cs.fsu.edu#include "arch/isa_specific.hh" 336019Shines@cs.fsu.edu#include "cpu/o3/scoreboard.hh" 346019Shines@cs.fsu.edu 356019Shines@cs.fsu.eduScoreboard::Scoreboard(unsigned activeThreads, 366019Shines@cs.fsu.edu unsigned _numLogicalIntRegs, 376019Shines@cs.fsu.edu unsigned _numPhysicalIntRegs, 386019Shines@cs.fsu.edu unsigned _numLogicalFloatRegs, 396019Shines@cs.fsu.edu unsigned _numPhysicalFloatRegs, 406019Shines@cs.fsu.edu unsigned _numMiscRegs, 416735Sgblack@eecs.umich.edu unsigned _zeroRegIdx) 426735Sgblack@eecs.umich.edu : numLogicalIntRegs(_numLogicalIntRegs), 436019Shines@cs.fsu.edu numPhysicalIntRegs(_numPhysicalIntRegs), 446019Shines@cs.fsu.edu numLogicalFloatRegs(_numLogicalFloatRegs), 456019Shines@cs.fsu.edu numPhysicalFloatRegs(_numPhysicalFloatRegs), 468229Snate@binkert.org numMiscRegs(_numMiscRegs), 478229Snate@binkert.org zeroRegIdx(_zeroRegIdx) 486019Shines@cs.fsu.edu{ 498232Snate@binkert.org //Get Register Sizes 506019Shines@cs.fsu.edu numLogicalRegs = numLogicalIntRegs + numLogicalFloatRegs; 516019Shines@cs.fsu.edu numPhysicalRegs = numPhysicalIntRegs + numPhysicalFloatRegs; 526019Shines@cs.fsu.edu 536019Shines@cs.fsu.edu //Resize scoreboard appropriately 547362Sgblack@eecs.umich.edu regScoreBoard.resize(numPhysicalRegs + (numMiscRegs * activeThreads)); 556735Sgblack@eecs.umich.edu 566019Shines@cs.fsu.edu //Initialize values 577362Sgblack@eecs.umich.edu for (int i=0; i < numLogicalIntRegs * activeThreads; i++) { 586735Sgblack@eecs.umich.edu regScoreBoard[i] = 1; 596019Shines@cs.fsu.edu } 607362Sgblack@eecs.umich.edu 616735Sgblack@eecs.umich.edu for (int i= numPhysicalIntRegs; 626019Shines@cs.fsu.edu i < numPhysicalIntRegs + (numLogicalFloatRegs * activeThreads); 637362Sgblack@eecs.umich.edu i++) { 646735Sgblack@eecs.umich.edu regScoreBoard[i] = 1; 656019Shines@cs.fsu.edu } 667362Sgblack@eecs.umich.edu 676735Sgblack@eecs.umich.edu for (int i = numPhysicalRegs; 686019Shines@cs.fsu.edu i < numPhysicalRegs + (numMiscRegs * activeThreads); 697362Sgblack@eecs.umich.edu i++) { 706735Sgblack@eecs.umich.edu regScoreBoard[i] = 1; 716019Shines@cs.fsu.edu } 727362Sgblack@eecs.umich.edu} 736735Sgblack@eecs.umich.edu 746019Shines@cs.fsu.edustd::string 757652Sminkyu.jeong@arm.comScoreboard::name() const 767652Sminkyu.jeong@arm.com{ 777652Sminkyu.jeong@arm.com return "cpu.scoreboard"; 788202SAli.Saidi@ARM.com} 798202SAli.Saidi@ARM.com 808202SAli.Saidi@ARM.combool 816735Sgblack@eecs.umich.eduScoreboard::getReg(PhysRegIndex phys_reg) 827362Sgblack@eecs.umich.edu{ 836735Sgblack@eecs.umich.edu#if THE_ISA == ALPHA_ISA 846735Sgblack@eecs.umich.edu // Always ready if int or fp zero reg. 856019Shines@cs.fsu.edu if (phys_reg == zeroRegIdx || 866735Sgblack@eecs.umich.edu phys_reg == (zeroRegIdx + numPhysicalIntRegs)) { 877400SAli.Saidi@ARM.com return 1; 886735Sgblack@eecs.umich.edu } 896735Sgblack@eecs.umich.edu#else 906735Sgblack@eecs.umich.edu // Always ready if int zero reg. 917400SAli.Saidi@ARM.com if (phys_reg == zeroRegIdx) { 926735Sgblack@eecs.umich.edu return 1; 936735Sgblack@eecs.umich.edu } 946735Sgblack@eecs.umich.edu#endif 956019Shines@cs.fsu.edu 966019Shines@cs.fsu.edu return regScoreBoard[phys_reg]; 976019Shines@cs.fsu.edu} 986735Sgblack@eecs.umich.edu 996735Sgblack@eecs.umich.eduvoid 1006735Sgblack@eecs.umich.eduScoreboard::setReg(PhysRegIndex phys_reg) 1017678Sgblack@eecs.umich.edu{ 1026019Shines@cs.fsu.edu DPRINTF(Scoreboard, "Setting reg %i as ready\n", phys_reg); 1036735Sgblack@eecs.umich.edu 1046735Sgblack@eecs.umich.edu regScoreBoard[phys_reg] = 1; 1056735Sgblack@eecs.umich.edu} 1066019Shines@cs.fsu.edu 1076735Sgblack@eecs.umich.eduvoid 1086735Sgblack@eecs.umich.eduScoreboard::unsetReg(PhysRegIndex ready_reg) 1098303SAli.Saidi@ARM.com{ 1108303SAli.Saidi@ARM.com#if THE_ISA == ALPHA_ISA 1118303SAli.Saidi@ARM.com if (ready_reg == zeroRegIdx || 1128303SAli.Saidi@ARM.com ready_reg == (zeroRegIdx + numPhysicalIntRegs)) { 1138303SAli.Saidi@ARM.com // Don't do anything if int or fp zero reg. 1148303SAli.Saidi@ARM.com return; 1157720Sgblack@eecs.umich.edu } 1168205SAli.Saidi@ARM.com#else 1178205SAli.Saidi@ARM.com if (ready_reg == zeroRegIdx) { 1188205SAli.Saidi@ARM.com // Don't do anything if int zero reg. 1196735Sgblack@eecs.umich.edu return; 1206735Sgblack@eecs.umich.edu } 1216735Sgblack@eecs.umich.edu#endif 1226735Sgblack@eecs.umich.edu 1236735Sgblack@eecs.umich.edu regScoreBoard[ready_reg] = 0; 1247093Sgblack@eecs.umich.edu} 1256735Sgblack@eecs.umich.edu