base.cc revision 12155:5dc92ea01323
12131SN/A/*
25268Sksewell@umich.edu * Copyright (c) 2012, 2015 ARM Limited
35254Sksewell@umich.edu * All rights reserved
45254Sksewell@umich.edu *
52131SN/A * The license below extends only to copyright in the software and shall
65254Sksewell@umich.edu * not be construed as granting a license to any other intellectual
75254Sksewell@umich.edu * property including but not limited to intellectual property relating
85254Sksewell@umich.edu * to a hardware implementation of the functionality of the software
95254Sksewell@umich.edu * licensed hereunder.  You may use the software subject to the license
105254Sksewell@umich.edu * terms below provided that you ensure that this notice is replicated
115254Sksewell@umich.edu * unmodified and in its entirety in all distributions of the software,
125254Sksewell@umich.edu * modified or unmodified, in source code or in binary form.
135254Sksewell@umich.edu *
145254Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without
155254Sksewell@umich.edu * modification, are permitted provided that the following conditions are
162131SN/A * met: redistributions of source code must retain the above copyright
175254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer;
185254Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright
195254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the
205254Sksewell@umich.edu * documentation and/or other materials provided with the distribution;
215254Sksewell@umich.edu * neither the name of the copyright holders nor the names of its
225254Sksewell@umich.edu * contributors may be used to endorse or promote products derived from
235254Sksewell@umich.edu * this software without specific prior written permission.
245254Sksewell@umich.edu *
255254Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
265254Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
275254Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
282665Ssaidi@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
295254Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
305254Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
315222Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
322131SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
332131SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
342239SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
357676Snate@binkert.org * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
367676Snate@binkert.org *
377676Snate@binkert.org * Authors: Andreas Sandberg
382680Sktlim@umich.edu */
397676Snate@binkert.org
402800Ssaidi@eecs.umich.edu#include "cpu/kvm/base.hh"
417676Snate@binkert.org
422800Ssaidi@eecs.umich.edu#include <linux/kvm.h>
432800Ssaidi@eecs.umich.edu#include <sys/ioctl.h>
442131SN/A#include <sys/mman.h>
452447SN/A#include <unistd.h>
462447SN/A
472131SN/A#include <cerrno>
482479SN/A#include <csignal>
492447SN/A#include <ostream>
502447SN/A
512131SN/A#include "arch/mmapped_ipr.hh"
522479SN/A#include "arch/utility.hh"
532447SN/A#include "debug/Checkpoint.hh"
542447SN/A#include "debug/Drain.hh"
552447SN/A#include "debug/Kvm.hh"
565224Sksewell@umich.edu#include "debug/KvmIO.hh"
575222Sksewell@umich.edu#include "debug/KvmRun.hh"
585222Sksewell@umich.edu#include "params/BaseKvmCPU.hh"
595222Sksewell@umich.edu#include "sim/process.hh"
605222Sksewell@umich.edu#include "sim/system.hh"
615222Sksewell@umich.edu
622447SN/A/* Used by some KVM macros */
632447SN/A#define PAGE_SIZE pageSize
645222Sksewell@umich.edu
655222Sksewell@umich.eduBaseKvmCPU::BaseKvmCPU(BaseKvmCPUParams *params)
665222Sksewell@umich.edu    : BaseCPU(params),
675222Sksewell@umich.edu      vm(*params->system->getKvmVM()),
685222Sksewell@umich.edu      _status(Idle),
695222Sksewell@umich.edu      dataPort(name() + ".dcache_port", this),
705222Sksewell@umich.edu      instPort(name() + ".icache_port", this),
715222Sksewell@umich.edu      alwaysSyncTC(params->alwaysSyncTC),
725222Sksewell@umich.edu      threadContextDirty(true),
735222Sksewell@umich.edu      kvmStateDirty(false),
745222Sksewell@umich.edu      vcpuID(vm.allocVCPUID()), vcpuFD(-1), vcpuMMapSize(0),
755222Sksewell@umich.edu      _kvmRun(NULL), mmioRing(NULL),
765222Sksewell@umich.edu      pageSize(sysconf(_SC_PAGE_SIZE)),
775224Sksewell@umich.edu      tickEvent([this]{ tick(); }, "BaseKvmCPU tick",
785222Sksewell@umich.edu                false, Event::CPU_Tick_Pri),
794661Sksewell@umich.edu      activeInstPeriod(0),
804661Sksewell@umich.edu      perfControlledByTimer(params->usePerfOverflow),
815224Sksewell@umich.edu      hostFactor(params->hostFactor),
825222Sksewell@umich.edu      ctrInsts(0)
834661Sksewell@umich.edu{
844661Sksewell@umich.edu    if (pageSize == -1)
855224Sksewell@umich.edu        panic("KVM: Failed to determine host page size (%i)\n",
864661Sksewell@umich.edu              errno);
874661Sksewell@umich.edu
884661Sksewell@umich.edu    if (FullSystem)
895222Sksewell@umich.edu        thread = new SimpleThread(this, 0, params->system, params->itb, params->dtb,
905222Sksewell@umich.edu                                  params->isa[0]);
912447SN/A    else
922447SN/A        thread = new SimpleThread(this, /* thread_num */ 0, params->system,
934661Sksewell@umich.edu                                  params->workload[0], params->itb,
944661Sksewell@umich.edu                                  params->dtb, params->isa[0]);
954661Sksewell@umich.edu
964661Sksewell@umich.edu    thread->setStatus(ThreadContext::Halted);
972447SN/A    tc = thread->getTC();
985222Sksewell@umich.edu    threadContexts.push_back(tc);
992447SN/A}
1002447SN/A
1015222Sksewell@umich.eduBaseKvmCPU::~BaseKvmCPU()
1025222Sksewell@umich.edu{
1035222Sksewell@umich.edu    if (_kvmRun)
1045222Sksewell@umich.edu        munmap(_kvmRun, vcpuMMapSize);
1055222Sksewell@umich.edu    close(vcpuFD);
1065222Sksewell@umich.edu}
1075222Sksewell@umich.edu
1085222Sksewell@umich.eduvoid
1095222Sksewell@umich.eduBaseKvmCPU::init()
1105222Sksewell@umich.edu{
1115222Sksewell@umich.edu    BaseCPU::init();
1125222Sksewell@umich.edu
1135222Sksewell@umich.edu    if (numThreads != 1)
1145222Sksewell@umich.edu        fatal("KVM: Multithreading not supported");
1155222Sksewell@umich.edu
1165222Sksewell@umich.edu    tc->initMemProxies(tc);
1175222Sksewell@umich.edu
1185222Sksewell@umich.edu    // initialize CPU, including PC
1195222Sksewell@umich.edu    if (FullSystem && !switchedOut())
1205222Sksewell@umich.edu        TheISA::initCPU(tc, tc->contextId());
1215222Sksewell@umich.edu}
1225222Sksewell@umich.edu
1235222Sksewell@umich.eduvoid
1245222Sksewell@umich.eduBaseKvmCPU::startup()
1255222Sksewell@umich.edu{
1265222Sksewell@umich.edu    const BaseKvmCPUParams * const p(
1275222Sksewell@umich.edu        dynamic_cast<const BaseKvmCPUParams *>(params()));
1285222Sksewell@umich.edu
1292447SN/A    Kvm &kvm(*vm.kvm);
1302447SN/A
1312447SN/A    BaseCPU::startup();
1322447SN/A
1332447SN/A    assert(vcpuFD == -1);
1342447SN/A
1352447SN/A    // Tell the VM that a CPU is about to start.
1362447SN/A    vm.cpuStartup();
1372447SN/A
1382447SN/A    // We can't initialize KVM CPUs in BaseKvmCPU::init() since we are
1392447SN/A    // not guaranteed that the parent KVM VM has initialized at that
1402447SN/A    // point. Initialize virtual CPUs here instead.
1412447SN/A    vcpuFD = vm.createVCPU(vcpuID);
1422447SN/A
1432447SN/A    // Map the KVM run structure */
1442447SN/A    vcpuMMapSize = kvm.getVCPUMMapSize();
1455222Sksewell@umich.edu    _kvmRun = (struct kvm_run *)mmap(0, vcpuMMapSize,
1465222Sksewell@umich.edu                                     PROT_READ | PROT_WRITE, MAP_SHARED,
1475222Sksewell@umich.edu                                     vcpuFD, 0);
1482447SN/A    if (_kvmRun == MAP_FAILED)
1495222Sksewell@umich.edu        panic("KVM: Failed to map run data structure\n");
1505222Sksewell@umich.edu
1515222Sksewell@umich.edu    // Setup a pointer to the MMIO ring buffer if coalesced MMIO is
1522447SN/A    // available. The offset into the KVM's communication page is
1535222Sksewell@umich.edu    // provided by the coalesced MMIO capability.
1545222Sksewell@umich.edu    int mmioOffset(kvm.capCoalescedMMIO());
1555222Sksewell@umich.edu    if (!p->useCoalescedMMIO) {
1562447SN/A        inform("KVM: Coalesced MMIO disabled by config.\n");
1575222Sksewell@umich.edu    } else if (mmioOffset) {
1582447SN/A        inform("KVM: Coalesced IO available\n");
1592447SN/A        mmioRing = (struct kvm_coalesced_mmio_ring *)(
1602447SN/A            (char *)_kvmRun + (mmioOffset * pageSize));
1615222Sksewell@umich.edu    } else {
1622447SN/A        inform("KVM: Coalesced not supported by host OS\n");
1632447SN/A    }
1642447SN/A
1655222Sksewell@umich.edu    thread->startup();
1664661Sksewell@umich.edu
1674661Sksewell@umich.edu    Event *startupEvent(
1684661Sksewell@umich.edu        new EventFunctionWrapper([this]{ startupThread(); }, name(), true));
1695222Sksewell@umich.edu    schedule(startupEvent, curTick());
1706378Sgblack@eecs.umich.edu}
1716378Sgblack@eecs.umich.edu
1725222Sksewell@umich.eduBaseKvmCPU::Status
1736378Sgblack@eecs.umich.eduBaseKvmCPU::KVMCpuPort::nextIOState() const
1746378Sgblack@eecs.umich.edu{
1756378Sgblack@eecs.umich.edu    return (activeMMIOReqs || pendingMMIOPkts.size())
1765222Sksewell@umich.edu        ? RunningMMIOPending : RunningServiceCompletion;
1775222Sksewell@umich.edu}
1786378Sgblack@eecs.umich.edu
1796379Sgblack@eecs.umich.eduTick
1805222Sksewell@umich.eduBaseKvmCPU::KVMCpuPort::submitIO(PacketPtr pkt)
1816378Sgblack@eecs.umich.edu{
1826383Sgblack@eecs.umich.edu    if (cpu->system->isAtomicMode()) {
1836379Sgblack@eecs.umich.edu        Tick delay = sendAtomic(pkt);
1846378Sgblack@eecs.umich.edu        delete pkt->req;
1856383Sgblack@eecs.umich.edu        delete pkt;
1866379Sgblack@eecs.umich.edu        return delay;
1876379Sgblack@eecs.umich.edu    } else {
1886383Sgblack@eecs.umich.edu        if (pendingMMIOPkts.empty() && sendTimingReq(pkt)) {
1895222Sksewell@umich.edu            activeMMIOReqs++;
1905222Sksewell@umich.edu        } else {
1916378Sgblack@eecs.umich.edu            pendingMMIOPkts.push(pkt);
1926379Sgblack@eecs.umich.edu        }
1936383Sgblack@eecs.umich.edu        // Return value is irrelevant for timing-mode accesses.
1945222Sksewell@umich.edu        return 0;
1956378Sgblack@eecs.umich.edu    }
1966378Sgblack@eecs.umich.edu}
1976378Sgblack@eecs.umich.edu
1986378Sgblack@eecs.umich.edubool
1996378Sgblack@eecs.umich.eduBaseKvmCPU::KVMCpuPort::recvTimingResp(PacketPtr pkt)
2006379Sgblack@eecs.umich.edu{
2016378Sgblack@eecs.umich.edu    DPRINTF(KvmIO, "KVM: Finished timing request\n");
2026383Sgblack@eecs.umich.edu
2036378Sgblack@eecs.umich.edu    delete pkt->req;
2046379Sgblack@eecs.umich.edu    delete pkt;
2056378Sgblack@eecs.umich.edu    activeMMIOReqs--;
2066383Sgblack@eecs.umich.edu
2076378Sgblack@eecs.umich.edu    // We can switch back into KVM when all pending and in-flight MMIO
2086379Sgblack@eecs.umich.edu    // operations have completed.
2096378Sgblack@eecs.umich.edu    if (!(activeMMIOReqs || pendingMMIOPkts.size())) {
2105222Sksewell@umich.edu        DPRINTF(KvmIO, "KVM: Finished all outstanding timing requests\n");
2116378Sgblack@eecs.umich.edu        cpu->finishMMIOPending();
2126383Sgblack@eecs.umich.edu    }
2136379Sgblack@eecs.umich.edu    return true;
2146379Sgblack@eecs.umich.edu}
2156379Sgblack@eecs.umich.edu
2166383Sgblack@eecs.umich.eduvoid
2176378Sgblack@eecs.umich.eduBaseKvmCPU::KVMCpuPort::recvReqRetry()
2186378Sgblack@eecs.umich.edu{
2196378Sgblack@eecs.umich.edu    DPRINTF(KvmIO, "KVM: Retry for timing request\n");
2206378Sgblack@eecs.umich.edu
2216378Sgblack@eecs.umich.edu    assert(pendingMMIOPkts.size());
2226378Sgblack@eecs.umich.edu
2236378Sgblack@eecs.umich.edu    // Assuming that we can issue infinite requests this cycle is a bit
2246378Sgblack@eecs.umich.edu    // unrealistic, but it's not worth modeling something more complex in
2256378Sgblack@eecs.umich.edu    // KVM.
2266378Sgblack@eecs.umich.edu    while (pendingMMIOPkts.size() && sendTimingReq(pendingMMIOPkts.front())) {
2276383Sgblack@eecs.umich.edu        pendingMMIOPkts.pop();
2286378Sgblack@eecs.umich.edu        activeMMIOReqs++;
2296378Sgblack@eecs.umich.edu    }
2306379Sgblack@eecs.umich.edu}
2316378Sgblack@eecs.umich.edu
2326383Sgblack@eecs.umich.eduvoid
2336378Sgblack@eecs.umich.eduBaseKvmCPU::finishMMIOPending()
2346378Sgblack@eecs.umich.edu{
2356378Sgblack@eecs.umich.edu    assert(_status = RunningMMIOPending);
2366378Sgblack@eecs.umich.edu    assert(!tickEvent.scheduled());
2376378Sgblack@eecs.umich.edu
2386378Sgblack@eecs.umich.edu    _status = RunningServiceCompletion;
2396378Sgblack@eecs.umich.edu    schedule(tickEvent, nextCycle());
2406378Sgblack@eecs.umich.edu}
2416378Sgblack@eecs.umich.edu
2426378Sgblack@eecs.umich.eduvoid
2436378Sgblack@eecs.umich.eduBaseKvmCPU::startupThread()
2446383Sgblack@eecs.umich.edu{
2456378Sgblack@eecs.umich.edu    // Do thread-specific initialization. We need to setup signal
2466378Sgblack@eecs.umich.edu    // delivery for counters and timers from within the thread that
2476378Sgblack@eecs.umich.edu    // will execute the event queue to ensure that signals are
2486378Sgblack@eecs.umich.edu    // delivered to the right threads.
2496383Sgblack@eecs.umich.edu    const BaseKvmCPUParams * const p(
2506378Sgblack@eecs.umich.edu        dynamic_cast<const BaseKvmCPUParams *>(params()));
2516378Sgblack@eecs.umich.edu
2526378Sgblack@eecs.umich.edu    vcpuThread = pthread_self();
2536378Sgblack@eecs.umich.edu
2546378Sgblack@eecs.umich.edu    // Setup signal handlers. This has to be done after the vCPU is
2556378Sgblack@eecs.umich.edu    // created since it manipulates the vCPU signal mask.
2566378Sgblack@eecs.umich.edu    setupSignalHandler();
2576378Sgblack@eecs.umich.edu
2586378Sgblack@eecs.umich.edu    setupCounters();
2596378Sgblack@eecs.umich.edu
2606378Sgblack@eecs.umich.edu    if (p->usePerfOverflow)
2616378Sgblack@eecs.umich.edu        runTimer.reset(new PerfKvmTimer(hwCycles,
2626383Sgblack@eecs.umich.edu                                        KVM_KICK_SIGNAL,
2636378Sgblack@eecs.umich.edu                                        p->hostFactor,
2646378Sgblack@eecs.umich.edu                                        p->hostFreq));
2656378Sgblack@eecs.umich.edu    else
2666378Sgblack@eecs.umich.edu        runTimer.reset(new PosixKvmTimer(KVM_KICK_SIGNAL, CLOCK_MONOTONIC,
2676378Sgblack@eecs.umich.edu                                         p->hostFactor,
2686378Sgblack@eecs.umich.edu                                         p->hostFreq));
2696378Sgblack@eecs.umich.edu
2706378Sgblack@eecs.umich.edu}
2716378Sgblack@eecs.umich.edu
2726378Sgblack@eecs.umich.eduvoid
2736378Sgblack@eecs.umich.eduBaseKvmCPU::regStats()
2746383Sgblack@eecs.umich.edu{
2756378Sgblack@eecs.umich.edu    using namespace Stats;
2766378Sgblack@eecs.umich.edu
2776378Sgblack@eecs.umich.edu    BaseCPU::regStats();
2786378Sgblack@eecs.umich.edu
2796378Sgblack@eecs.umich.edu    numInsts
2806378Sgblack@eecs.umich.edu        .name(name() + ".committedInsts")
2816378Sgblack@eecs.umich.edu        .desc("Number of instructions committed")
2826378Sgblack@eecs.umich.edu        ;
2836383Sgblack@eecs.umich.edu
2846383Sgblack@eecs.umich.edu    numVMExits
2856379Sgblack@eecs.umich.edu        .name(name() + ".numVMExits")
2866379Sgblack@eecs.umich.edu        .desc("total number of KVM exits")
2876379Sgblack@eecs.umich.edu        ;
2886383Sgblack@eecs.umich.edu
2896379Sgblack@eecs.umich.edu    numVMHalfEntries
2906383Sgblack@eecs.umich.edu        .name(name() + ".numVMHalfEntries")
2916379Sgblack@eecs.umich.edu        .desc("number of KVM entries to finalize pending operations")
2926383Sgblack@eecs.umich.edu        ;
2936378Sgblack@eecs.umich.edu
2946378Sgblack@eecs.umich.edu    numExitSignal
2956378Sgblack@eecs.umich.edu        .name(name() + ".numExitSignal")
2966378Sgblack@eecs.umich.edu        .desc("exits due to signal delivery")
2976378Sgblack@eecs.umich.edu        ;
2986378Sgblack@eecs.umich.edu
2996383Sgblack@eecs.umich.edu    numMMIO
3006379Sgblack@eecs.umich.edu        .name(name() + ".numMMIO")
3016378Sgblack@eecs.umich.edu        .desc("number of VM exits due to memory mapped IO")
3026378Sgblack@eecs.umich.edu        ;
3036378Sgblack@eecs.umich.edu
3046378Sgblack@eecs.umich.edu    numCoalescedMMIO
3056378Sgblack@eecs.umich.edu        .name(name() + ".numCoalescedMMIO")
3066378Sgblack@eecs.umich.edu        .desc("number of coalesced memory mapped IO requests")
3076378Sgblack@eecs.umich.edu        ;
3086383Sgblack@eecs.umich.edu
3096378Sgblack@eecs.umich.edu    numIO
3106378Sgblack@eecs.umich.edu        .name(name() + ".numIO")
3116378Sgblack@eecs.umich.edu        .desc("number of VM exits due to legacy IO")
3126378Sgblack@eecs.umich.edu        ;
3136383Sgblack@eecs.umich.edu
3146378Sgblack@eecs.umich.edu    numHalt
3156378Sgblack@eecs.umich.edu        .name(name() + ".numHalt")
3166378Sgblack@eecs.umich.edu        .desc("number of VM exits due to wait for interrupt instructions")
3176378Sgblack@eecs.umich.edu        ;
3186378Sgblack@eecs.umich.edu
3196378Sgblack@eecs.umich.edu    numInterrupts
3206378Sgblack@eecs.umich.edu        .name(name() + ".numInterrupts")
3216378Sgblack@eecs.umich.edu        .desc("number of interrupts delivered")
3226383Sgblack@eecs.umich.edu        ;
3236383Sgblack@eecs.umich.edu
3246379Sgblack@eecs.umich.edu    numHypercalls
3256379Sgblack@eecs.umich.edu        .name(name() + ".numHypercalls")
3266379Sgblack@eecs.umich.edu        .desc("number of hypercalls")
3276383Sgblack@eecs.umich.edu        ;
3286379Sgblack@eecs.umich.edu}
3296383Sgblack@eecs.umich.edu
3306379Sgblack@eecs.umich.eduvoid
3316383Sgblack@eecs.umich.eduBaseKvmCPU::serializeThread(CheckpointOut &cp, ThreadID tid) const
3326378Sgblack@eecs.umich.edu{
3336378Sgblack@eecs.umich.edu    if (DTRACE(Checkpoint)) {
3346378Sgblack@eecs.umich.edu        DPRINTF(Checkpoint, "KVM: Serializing thread %i:\n", tid);
3356378Sgblack@eecs.umich.edu        dump();
3366378Sgblack@eecs.umich.edu    }
3376383Sgblack@eecs.umich.edu
3386378Sgblack@eecs.umich.edu    assert(tid == 0);
3396379Sgblack@eecs.umich.edu    assert(_status == Idle);
3406383Sgblack@eecs.umich.edu    thread->serialize(cp);
3416378Sgblack@eecs.umich.edu}
3426378Sgblack@eecs.umich.edu
3436378Sgblack@eecs.umich.eduvoid
3446378Sgblack@eecs.umich.eduBaseKvmCPU::unserializeThread(CheckpointIn &cp, ThreadID tid)
3456378Sgblack@eecs.umich.edu{
3466383Sgblack@eecs.umich.edu    DPRINTF(Checkpoint, "KVM: Unserialize thread %i:\n", tid);
3476378Sgblack@eecs.umich.edu
3486383Sgblack@eecs.umich.edu    assert(tid == 0);
3496383Sgblack@eecs.umich.edu    assert(_status == Idle);
3506379Sgblack@eecs.umich.edu    thread->unserialize(cp);
3516379Sgblack@eecs.umich.edu    threadContextDirty = true;
3526379Sgblack@eecs.umich.edu}
3536383Sgblack@eecs.umich.edu
3546383Sgblack@eecs.umich.eduDrainState
3556379Sgblack@eecs.umich.eduBaseKvmCPU::drain()
3566383Sgblack@eecs.umich.edu{
3576378Sgblack@eecs.umich.edu    if (switchedOut())
3586383Sgblack@eecs.umich.edu        return DrainState::Drained;
3596378Sgblack@eecs.umich.edu
3606378Sgblack@eecs.umich.edu    DPRINTF(Drain, "BaseKvmCPU::drain\n");
3616379Sgblack@eecs.umich.edu
3626378Sgblack@eecs.umich.edu    // The event queue won't be locked when calling drain since that's
3636383Sgblack@eecs.umich.edu    // not done from an event. Lock the event queue here to make sure
3646378Sgblack@eecs.umich.edu    // that scoped migrations continue to work if we need to
3656378Sgblack@eecs.umich.edu    // synchronize the thread context.
3666383Sgblack@eecs.umich.edu    std::lock_guard<EventQueue> lock(*this->eventQueue());
3676378Sgblack@eecs.umich.edu
3686378Sgblack@eecs.umich.edu    switch (_status) {
3696378Sgblack@eecs.umich.edu      case Running:
3706378Sgblack@eecs.umich.edu        // The base KVM code is normally ready when it is in the
3716378Sgblack@eecs.umich.edu        // Running state, but the architecture specific code might be
3726378Sgblack@eecs.umich.edu        // of a different opinion. This may happen when the CPU been
3736378Sgblack@eecs.umich.edu        // notified of an event that hasn't been accepted by the vCPU
3746378Sgblack@eecs.umich.edu        // yet.
3756378Sgblack@eecs.umich.edu        if (!archIsDrained())
3766378Sgblack@eecs.umich.edu            return DrainState::Draining;
3776378Sgblack@eecs.umich.edu
3786378Sgblack@eecs.umich.edu        // The state of the CPU is consistent, so we don't need to do
3796383Sgblack@eecs.umich.edu        // anything special to drain it. We simply de-schedule the
3806383Sgblack@eecs.umich.edu        // tick event and enter the Idle state to prevent nasty things
3816379Sgblack@eecs.umich.edu        // like MMIOs from happening.
3826379Sgblack@eecs.umich.edu        if (tickEvent.scheduled())
3836379Sgblack@eecs.umich.edu            deschedule(tickEvent);
3846383Sgblack@eecs.umich.edu        _status = Idle;
3856378Sgblack@eecs.umich.edu
3866383Sgblack@eecs.umich.edu        /** FALLTHROUGH */
3876379Sgblack@eecs.umich.edu      case Idle:
3886383Sgblack@eecs.umich.edu        // Idle, no need to drain
3896379Sgblack@eecs.umich.edu        assert(!tickEvent.scheduled());
3906383Sgblack@eecs.umich.edu
3916378Sgblack@eecs.umich.edu        // Sync the thread context here since we'll need it when we
3926378Sgblack@eecs.umich.edu        // switch CPUs or checkpoint the CPU.
3936379Sgblack@eecs.umich.edu        syncThreadContext();
3946378Sgblack@eecs.umich.edu
3956383Sgblack@eecs.umich.edu        return DrainState::Drained;
3966378Sgblack@eecs.umich.edu
3976378Sgblack@eecs.umich.edu      case RunningServiceCompletion:
3986383Sgblack@eecs.umich.edu        // The CPU has just requested a service that was handled in
3996378Sgblack@eecs.umich.edu        // the RunningService state, but the results have still not
4006378Sgblack@eecs.umich.edu        // been reported to the CPU. Now, we /could/ probably just
4016378Sgblack@eecs.umich.edu        // update the register state ourselves instead of letting KVM
4026378Sgblack@eecs.umich.edu        // handle it, but that would be tricky. Instead, we enter KVM
4036378Sgblack@eecs.umich.edu        // and let it do its stuff.
4046378Sgblack@eecs.umich.edu        DPRINTF(Drain, "KVM CPU is waiting for service completion, "
4056378Sgblack@eecs.umich.edu                "requesting drain.\n");
4066378Sgblack@eecs.umich.edu        return DrainState::Draining;
4076378Sgblack@eecs.umich.edu
4086378Sgblack@eecs.umich.edu      case RunningMMIOPending:
4096378Sgblack@eecs.umich.edu        // We need to drain since there are in-flight timing accesses
4106383Sgblack@eecs.umich.edu        DPRINTF(Drain, "KVM CPU is waiting for timing accesses to complete, "
4116383Sgblack@eecs.umich.edu                "requesting drain.\n");
4126379Sgblack@eecs.umich.edu        return DrainState::Draining;
4136379Sgblack@eecs.umich.edu
4146379Sgblack@eecs.umich.edu      case RunningService:
4156383Sgblack@eecs.umich.edu        // We need to drain since the CPU is waiting for service (e.g., MMIOs)
4166379Sgblack@eecs.umich.edu        DPRINTF(Drain, "KVM CPU is waiting for service, requesting drain.\n");
4176383Sgblack@eecs.umich.edu        return DrainState::Draining;
4186379Sgblack@eecs.umich.edu
4196383Sgblack@eecs.umich.edu      default:
4206378Sgblack@eecs.umich.edu        panic("KVM: Unhandled CPU state in drain()\n");
4216378Sgblack@eecs.umich.edu        return DrainState::Drained;
4226378Sgblack@eecs.umich.edu    }
4236378Sgblack@eecs.umich.edu}
4246383Sgblack@eecs.umich.edu
4256378Sgblack@eecs.umich.eduvoid
4266378Sgblack@eecs.umich.eduBaseKvmCPU::drainResume()
4275222Sksewell@umich.edu{
4285222Sksewell@umich.edu    assert(!tickEvent.scheduled());
4295222Sksewell@umich.edu
4306378Sgblack@eecs.umich.edu    // We might have been switched out. In that case, we don't need to
4316378Sgblack@eecs.umich.edu    // do anything.
4325222Sksewell@umich.edu    if (switchedOut())
4336378Sgblack@eecs.umich.edu        return;
4346378Sgblack@eecs.umich.edu
4355222Sksewell@umich.edu    DPRINTF(Kvm, "drainResume\n");
4366378Sgblack@eecs.umich.edu    verifyMemoryMode();
4376378Sgblack@eecs.umich.edu
4386378Sgblack@eecs.umich.edu    // The tick event is de-scheduled as a part of the draining
4396383Sgblack@eecs.umich.edu    // process. Re-schedule it if the thread context is active.
4406378Sgblack@eecs.umich.edu    if (tc->status() == ThreadContext::Active) {
4415222Sksewell@umich.edu        schedule(tickEvent, nextCycle());
4425222Sksewell@umich.edu        _status = Running;
4436378Sgblack@eecs.umich.edu    } else {
4446378Sgblack@eecs.umich.edu        _status = Idle;
4455222Sksewell@umich.edu    }
4465222Sksewell@umich.edu}
4476378Sgblack@eecs.umich.edu
4486378Sgblack@eecs.umich.eduvoid
4496378Sgblack@eecs.umich.eduBaseKvmCPU::notifyFork()
4505222Sksewell@umich.edu{
4516383Sgblack@eecs.umich.edu    // We should have drained prior to forking, which means that the
4526379Sgblack@eecs.umich.edu    // tick event shouldn't be scheduled and the CPU is idle.
4536378Sgblack@eecs.umich.edu    assert(!tickEvent.scheduled());
4546383Sgblack@eecs.umich.edu    assert(_status == Idle);
4556378Sgblack@eecs.umich.edu
4566378Sgblack@eecs.umich.edu    if (vcpuFD != -1) {
4576383Sgblack@eecs.umich.edu        if (close(vcpuFD) == -1)
4586378Sgblack@eecs.umich.edu            warn("kvm CPU: notifyFork failed to close vcpuFD\n");
4595222Sksewell@umich.edu
4606378Sgblack@eecs.umich.edu        if (_kvmRun)
4615222Sksewell@umich.edu            munmap(_kvmRun, vcpuMMapSize);
4625222Sksewell@umich.edu
4635222Sksewell@umich.edu        vcpuFD = -1;
4645222Sksewell@umich.edu        _kvmRun = NULL;
4655222Sksewell@umich.edu
4666378Sgblack@eecs.umich.edu        hwInstructions.detach();
4676378Sgblack@eecs.umich.edu        hwCycles.detach();
4684661Sksewell@umich.edu    }
4695224Sksewell@umich.edu}
4706378Sgblack@eecs.umich.edu
4716378Sgblack@eecs.umich.eduvoid
4726378Sgblack@eecs.umich.eduBaseKvmCPU::switchOut()
4736378Sgblack@eecs.umich.edu{
4746378Sgblack@eecs.umich.edu    DPRINTF(Kvm, "switchOut\n");
4756379Sgblack@eecs.umich.edu
4765224Sksewell@umich.edu    BaseCPU::switchOut();
4775224Sksewell@umich.edu
4786378Sgblack@eecs.umich.edu    // We should have drained prior to executing a switchOut, which
4796383Sgblack@eecs.umich.edu    // means that the tick event shouldn't be scheduled and the CPU is
4806379Sgblack@eecs.umich.edu    // idle.
4816383Sgblack@eecs.umich.edu    assert(!tickEvent.scheduled());
4825222Sksewell@umich.edu    assert(_status == Idle);
4835222Sksewell@umich.edu}
4846378Sgblack@eecs.umich.edu
4856378Sgblack@eecs.umich.eduvoid
4865222Sksewell@umich.eduBaseKvmCPU::takeOverFrom(BaseCPU *cpu)
4875222Sksewell@umich.edu{
4886378Sgblack@eecs.umich.edu    DPRINTF(Kvm, "takeOverFrom\n");
4896378Sgblack@eecs.umich.edu
4906378Sgblack@eecs.umich.edu    BaseCPU::takeOverFrom(cpu);
4916378Sgblack@eecs.umich.edu
4926383Sgblack@eecs.umich.edu    // We should have drained prior to executing a switchOut, which
4936378Sgblack@eecs.umich.edu    // means that the tick event shouldn't be scheduled and the CPU is
4945222Sksewell@umich.edu    // idle.
4955222Sksewell@umich.edu    assert(!tickEvent.scheduled());
4965222Sksewell@umich.edu    assert(_status == Idle);
4975222Sksewell@umich.edu    assert(threadContexts.size() == 1);
4985222Sksewell@umich.edu
4996378Sgblack@eecs.umich.edu    // Force an update of the KVM state here instead of flagging the
5006378Sgblack@eecs.umich.edu    // TC as dirty. This is not ideal from a performance point of
5015222Sksewell@umich.edu    // view, but it makes debugging easier as it allows meaningful KVM
5026378Sgblack@eecs.umich.edu    // state to be dumped before and after a takeover.
5036378Sgblack@eecs.umich.edu    updateKvmState();
5045222Sksewell@umich.edu    threadContextDirty = false;
5055222Sksewell@umich.edu}
5066378Sgblack@eecs.umich.edu
5076378Sgblack@eecs.umich.eduvoid
5085222Sksewell@umich.eduBaseKvmCPU::verifyMemoryMode() const
5096378Sgblack@eecs.umich.edu{
5106378Sgblack@eecs.umich.edu    if (!(system->bypassCaches())) {
5114661Sksewell@umich.edu        fatal("The KVM-based CPUs requires the memory system to be in the "
5124661Sksewell@umich.edu              "'noncaching' mode.\n");
5136378Sgblack@eecs.umich.edu    }
5146378Sgblack@eecs.umich.edu}
5154661Sksewell@umich.edu
5165222Sksewell@umich.eduvoid
5176378Sgblack@eecs.umich.eduBaseKvmCPU::wakeup(ThreadID tid)
5186378Sgblack@eecs.umich.edu{
5196378Sgblack@eecs.umich.edu    DPRINTF(Kvm, "wakeup()\n");
5206378Sgblack@eecs.umich.edu    // This method might have been called from another
5216383Sgblack@eecs.umich.edu    // context. Migrate to this SimObject's event queue when
5226379Sgblack@eecs.umich.edu    // delivering the wakeup signal.
5236383Sgblack@eecs.umich.edu    EventQueue::ScopedMigration migrate(eventQueue());
5244661Sksewell@umich.edu
5256378Sgblack@eecs.umich.edu    // Kick the vCPU to get it to come out of KVM.
5266378Sgblack@eecs.umich.edu    kick();
5276383Sgblack@eecs.umich.edu
5286378Sgblack@eecs.umich.edu    if (thread->status() != ThreadContext::Suspended)
5294661Sksewell@umich.edu        return;
5305222Sksewell@umich.edu
5315224Sksewell@umich.edu    thread->activate();
5325222Sksewell@umich.edu}
5334661Sksewell@umich.edu
5344661Sksewell@umich.eduvoid
5352447SN/ABaseKvmCPU::activateContext(ThreadID thread_num)
5362447SN/A{
537    DPRINTF(Kvm, "ActivateContext %d\n", thread_num);
538
539    assert(thread_num == 0);
540    assert(thread);
541
542    assert(_status == Idle);
543    assert(!tickEvent.scheduled());
544
545    numCycles += ticksToCycles(thread->lastActivate - thread->lastSuspend);
546
547    schedule(tickEvent, clockEdge(Cycles(0)));
548    _status = Running;
549}
550
551
552void
553BaseKvmCPU::suspendContext(ThreadID thread_num)
554{
555    DPRINTF(Kvm, "SuspendContext %d\n", thread_num);
556
557    assert(thread_num == 0);
558    assert(thread);
559
560    if (_status == Idle)
561        return;
562
563    assert(_status == Running || _status == RunningServiceCompletion);
564
565    // The tick event may no be scheduled if the quest has requested
566    // the monitor to wait for interrupts. The normal CPU models can
567    // get their tick events descheduled by quiesce instructions, but
568    // that can't happen here.
569    if (tickEvent.scheduled())
570        deschedule(tickEvent);
571
572    _status = Idle;
573}
574
575void
576BaseKvmCPU::deallocateContext(ThreadID thread_num)
577{
578    // for now, these are equivalent
579    suspendContext(thread_num);
580}
581
582void
583BaseKvmCPU::haltContext(ThreadID thread_num)
584{
585    // for now, these are equivalent
586    suspendContext(thread_num);
587}
588
589ThreadContext *
590BaseKvmCPU::getContext(int tn)
591{
592    assert(tn == 0);
593    syncThreadContext();
594    return tc;
595}
596
597
598Counter
599BaseKvmCPU::totalInsts() const
600{
601    return ctrInsts;
602}
603
604Counter
605BaseKvmCPU::totalOps() const
606{
607    hack_once("Pretending totalOps is equivalent to totalInsts()\n");
608    return ctrInsts;
609}
610
611void
612BaseKvmCPU::dump() const
613{
614    inform("State dumping not implemented.");
615}
616
617void
618BaseKvmCPU::tick()
619{
620    Tick delay(0);
621    assert(_status != Idle && _status != RunningMMIOPending);
622
623    switch (_status) {
624      case RunningService:
625        // handleKvmExit() will determine the next state of the CPU
626        delay = handleKvmExit();
627
628        if (tryDrain())
629            _status = Idle;
630        break;
631
632      case RunningServiceCompletion:
633      case Running: {
634          const uint64_t nextInstEvent(
635              !comInstEventQueue[0]->empty() ?
636              comInstEventQueue[0]->nextTick() : UINT64_MAX);
637          // Enter into KVM and complete pending IO instructions if we
638          // have an instruction event pending.
639          const Tick ticksToExecute(
640              nextInstEvent > ctrInsts ?
641              curEventQueue()->nextTick() - curTick() : 0);
642
643          if (alwaysSyncTC)
644              threadContextDirty = true;
645
646          // We might need to update the KVM state.
647          syncKvmState();
648
649          // Setup any pending instruction count breakpoints using
650          // PerfEvent if we are going to execute more than just an IO
651          // completion.
652          if (ticksToExecute > 0)
653              setupInstStop();
654
655          DPRINTF(KvmRun, "Entering KVM...\n");
656          if (drainState() == DrainState::Draining) {
657              // Force an immediate exit from KVM after completing
658              // pending operations. The architecture-specific code
659              // takes care to run until it is in a state where it can
660              // safely be drained.
661              delay = kvmRunDrain();
662          } else {
663              delay = kvmRun(ticksToExecute);
664          }
665
666          // The CPU might have been suspended before entering into
667          // KVM. Assume that the CPU was suspended /before/ entering
668          // into KVM and skip the exit handling.
669          if (_status == Idle)
670              break;
671
672          // Entering into KVM implies that we'll have to reload the thread
673          // context from KVM if we want to access it. Flag the KVM state as
674          // dirty with respect to the cached thread context.
675          kvmStateDirty = true;
676
677          if (alwaysSyncTC)
678              syncThreadContext();
679
680          // Enter into the RunningService state unless the
681          // simulation was stopped by a timer.
682          if (_kvmRun->exit_reason !=  KVM_EXIT_INTR) {
683              _status = RunningService;
684          } else {
685              ++numExitSignal;
686              _status = Running;
687          }
688
689          // Service any pending instruction events. The vCPU should
690          // have exited in time for the event using the instruction
691          // counter configured by setupInstStop().
692          comInstEventQueue[0]->serviceEvents(ctrInsts);
693          system->instEventQueue.serviceEvents(system->totalNumInsts);
694
695          if (tryDrain())
696              _status = Idle;
697      } break;
698
699      default:
700        panic("BaseKvmCPU entered tick() in an illegal state (%i)\n",
701              _status);
702    }
703
704    // Schedule a new tick if we are still running
705    if (_status != Idle && _status != RunningMMIOPending)
706        schedule(tickEvent, clockEdge(ticksToCycles(delay)));
707}
708
709Tick
710BaseKvmCPU::kvmRunDrain()
711{
712    // By default, the only thing we need to drain is a pending IO
713    // operation which assumes that we are in the
714    // RunningServiceCompletion or RunningMMIOPending state.
715    assert(_status == RunningServiceCompletion ||
716           _status == RunningMMIOPending);
717
718    // Deliver the data from the pending IO operation and immediately
719    // exit.
720    return kvmRun(0);
721}
722
723uint64_t
724BaseKvmCPU::getHostCycles() const
725{
726    return hwCycles.read();
727}
728
729Tick
730BaseKvmCPU::kvmRun(Tick ticks)
731{
732    Tick ticksExecuted;
733    fatal_if(vcpuFD == -1,
734             "Trying to run a KVM CPU in a forked child process. "
735             "This is not supported.\n");
736    DPRINTF(KvmRun, "KVM: Executing for %i ticks\n", ticks);
737
738    if (ticks == 0) {
739        // Settings ticks == 0 is a special case which causes an entry
740        // into KVM that finishes pending operations (e.g., IO) and
741        // then immediately exits.
742        DPRINTF(KvmRun, "KVM: Delivering IO without full guest entry\n");
743
744        ++numVMHalfEntries;
745
746        // Send a KVM_KICK_SIGNAL to the vCPU thread (i.e., this
747        // thread). The KVM control signal is masked while executing
748        // in gem5 and gets unmasked temporarily as when entering
749        // KVM. See setSignalMask() and setupSignalHandler().
750        kick();
751
752        // Start the vCPU. KVM will check for signals after completing
753        // pending operations (IO). Since the KVM_KICK_SIGNAL is
754        // pending, this forces an immediate exit to gem5 again. We
755        // don't bother to setup timers since this shouldn't actually
756        // execute any code (other than completing half-executed IO
757        // instructions) in the guest.
758        ioctlRun();
759
760        // We always execute at least one cycle to prevent the
761        // BaseKvmCPU::tick() to be rescheduled on the same tick
762        // twice.
763        ticksExecuted = clockPeriod();
764    } else {
765        // This method is executed as a result of a tick event. That
766        // means that the event queue will be locked when entering the
767        // method. We temporarily unlock the event queue to allow
768        // other threads to steal control of this thread to inject
769        // interrupts. They will typically lock the queue and then
770        // force an exit from KVM by kicking the vCPU.
771        EventQueue::ScopedRelease release(curEventQueue());
772
773        if (ticks < runTimer->resolution()) {
774            DPRINTF(KvmRun, "KVM: Adjusting tick count (%i -> %i)\n",
775                    ticks, runTimer->resolution());
776            ticks = runTimer->resolution();
777        }
778
779        // Get hardware statistics after synchronizing contexts. The KVM
780        // state update might affect guest cycle counters.
781        uint64_t baseCycles(getHostCycles());
782        uint64_t baseInstrs(hwInstructions.read());
783
784        // Arm the run timer and start the cycle timer if it isn't
785        // controlled by the overflow timer. Starting/stopping the cycle
786        // timer automatically starts the other perf timers as they are in
787        // the same counter group.
788        runTimer->arm(ticks);
789        if (!perfControlledByTimer)
790            hwCycles.start();
791
792        ioctlRun();
793
794        runTimer->disarm();
795        if (!perfControlledByTimer)
796            hwCycles.stop();
797
798        // The control signal may have been delivered after we exited
799        // from KVM. It will be pending in that case since it is
800        // masked when we aren't executing in KVM. Discard it to make
801        // sure we don't deliver it immediately next time we try to
802        // enter into KVM.
803        discardPendingSignal(KVM_KICK_SIGNAL);
804
805        const uint64_t hostCyclesExecuted(getHostCycles() - baseCycles);
806        const uint64_t simCyclesExecuted(hostCyclesExecuted * hostFactor);
807        const uint64_t instsExecuted(hwInstructions.read() - baseInstrs);
808        ticksExecuted = runTimer->ticksFromHostCycles(hostCyclesExecuted);
809
810        /* Update statistics */
811        numCycles += simCyclesExecuted;;
812        numInsts += instsExecuted;
813        ctrInsts += instsExecuted;
814        system->totalNumInsts += instsExecuted;
815
816        DPRINTF(KvmRun,
817                "KVM: Executed %i instructions in %i cycles "
818                "(%i ticks, sim cycles: %i).\n",
819                instsExecuted, hostCyclesExecuted, ticksExecuted, simCyclesExecuted);
820    }
821
822    ++numVMExits;
823
824    return ticksExecuted + flushCoalescedMMIO();
825}
826
827void
828BaseKvmCPU::kvmNonMaskableInterrupt()
829{
830    ++numInterrupts;
831    if (ioctl(KVM_NMI) == -1)
832        panic("KVM: Failed to deliver NMI to virtual CPU\n");
833}
834
835void
836BaseKvmCPU::kvmInterrupt(const struct kvm_interrupt &interrupt)
837{
838    ++numInterrupts;
839    if (ioctl(KVM_INTERRUPT, (void *)&interrupt) == -1)
840        panic("KVM: Failed to deliver interrupt to virtual CPU\n");
841}
842
843void
844BaseKvmCPU::getRegisters(struct kvm_regs &regs) const
845{
846    if (ioctl(KVM_GET_REGS, &regs) == -1)
847        panic("KVM: Failed to get guest registers\n");
848}
849
850void
851BaseKvmCPU::setRegisters(const struct kvm_regs &regs)
852{
853    if (ioctl(KVM_SET_REGS, (void *)&regs) == -1)
854        panic("KVM: Failed to set guest registers\n");
855}
856
857void
858BaseKvmCPU::getSpecialRegisters(struct kvm_sregs &regs) const
859{
860    if (ioctl(KVM_GET_SREGS, &regs) == -1)
861        panic("KVM: Failed to get guest special registers\n");
862}
863
864void
865BaseKvmCPU::setSpecialRegisters(const struct kvm_sregs &regs)
866{
867    if (ioctl(KVM_SET_SREGS, (void *)&regs) == -1)
868        panic("KVM: Failed to set guest special registers\n");
869}
870
871void
872BaseKvmCPU::getFPUState(struct kvm_fpu &state) const
873{
874    if (ioctl(KVM_GET_FPU, &state) == -1)
875        panic("KVM: Failed to get guest FPU state\n");
876}
877
878void
879BaseKvmCPU::setFPUState(const struct kvm_fpu &state)
880{
881    if (ioctl(KVM_SET_FPU, (void *)&state) == -1)
882        panic("KVM: Failed to set guest FPU state\n");
883}
884
885
886void
887BaseKvmCPU::setOneReg(uint64_t id, const void *addr)
888{
889#ifdef KVM_SET_ONE_REG
890    struct kvm_one_reg reg;
891    reg.id = id;
892    reg.addr = (uint64_t)addr;
893
894    if (ioctl(KVM_SET_ONE_REG, &reg) == -1) {
895        panic("KVM: Failed to set register (0x%x) value (errno: %i)\n",
896              id, errno);
897    }
898#else
899    panic("KVM_SET_ONE_REG is unsupported on this platform.\n");
900#endif
901}
902
903void
904BaseKvmCPU::getOneReg(uint64_t id, void *addr) const
905{
906#ifdef KVM_GET_ONE_REG
907    struct kvm_one_reg reg;
908    reg.id = id;
909    reg.addr = (uint64_t)addr;
910
911    if (ioctl(KVM_GET_ONE_REG, &reg) == -1) {
912        panic("KVM: Failed to get register (0x%x) value (errno: %i)\n",
913              id, errno);
914    }
915#else
916    panic("KVM_GET_ONE_REG is unsupported on this platform.\n");
917#endif
918}
919
920std::string
921BaseKvmCPU::getAndFormatOneReg(uint64_t id) const
922{
923#ifdef KVM_GET_ONE_REG
924    std::ostringstream ss;
925
926    ss.setf(std::ios::hex, std::ios::basefield);
927    ss.setf(std::ios::showbase);
928#define HANDLE_INTTYPE(len)                      \
929    case KVM_REG_SIZE_U ## len: {                \
930        uint ## len ## _t value;                 \
931        getOneReg(id, &value);                   \
932        ss << value;                             \
933    }  break
934
935#define HANDLE_ARRAY(len)                               \
936    case KVM_REG_SIZE_U ## len: {                       \
937        uint8_t value[len / 8];                         \
938        getOneReg(id, value);                           \
939        ccprintf(ss, "[0x%x", value[0]);                \
940        for (int i = 1; i < len  / 8; ++i)              \
941            ccprintf(ss, ", 0x%x", value[i]);           \
942        ccprintf(ss, "]");                              \
943      } break
944
945    switch (id & KVM_REG_SIZE_MASK) {
946        HANDLE_INTTYPE(8);
947        HANDLE_INTTYPE(16);
948        HANDLE_INTTYPE(32);
949        HANDLE_INTTYPE(64);
950        HANDLE_ARRAY(128);
951        HANDLE_ARRAY(256);
952        HANDLE_ARRAY(512);
953        HANDLE_ARRAY(1024);
954      default:
955        ss << "??";
956    }
957
958#undef HANDLE_INTTYPE
959#undef HANDLE_ARRAY
960
961    return ss.str();
962#else
963    panic("KVM_GET_ONE_REG is unsupported on this platform.\n");
964#endif
965}
966
967void
968BaseKvmCPU::syncThreadContext()
969{
970    if (!kvmStateDirty)
971        return;
972
973    assert(!threadContextDirty);
974
975    updateThreadContext();
976    kvmStateDirty = false;
977}
978
979void
980BaseKvmCPU::syncKvmState()
981{
982    if (!threadContextDirty)
983        return;
984
985    assert(!kvmStateDirty);
986
987    updateKvmState();
988    threadContextDirty = false;
989}
990
991Tick
992BaseKvmCPU::handleKvmExit()
993{
994    DPRINTF(KvmRun, "handleKvmExit (exit_reason: %i)\n", _kvmRun->exit_reason);
995    assert(_status == RunningService);
996
997    // Switch into the running state by default. Individual handlers
998    // can override this.
999    _status = Running;
1000    switch (_kvmRun->exit_reason) {
1001      case KVM_EXIT_UNKNOWN:
1002        return handleKvmExitUnknown();
1003
1004      case KVM_EXIT_EXCEPTION:
1005        return handleKvmExitException();
1006
1007      case KVM_EXIT_IO:
1008      {
1009        ++numIO;
1010        Tick ticks = handleKvmExitIO();
1011        _status = dataPort.nextIOState();
1012        return ticks;
1013      }
1014
1015      case KVM_EXIT_HYPERCALL:
1016        ++numHypercalls;
1017        return handleKvmExitHypercall();
1018
1019      case KVM_EXIT_HLT:
1020        /* The guest has halted and is waiting for interrupts */
1021        DPRINTF(Kvm, "handleKvmExitHalt\n");
1022        ++numHalt;
1023
1024        // Suspend the thread until the next interrupt arrives
1025        thread->suspend();
1026
1027        // This is actually ignored since the thread is suspended.
1028        return 0;
1029
1030      case KVM_EXIT_MMIO:
1031      {
1032        /* Service memory mapped IO requests */
1033        DPRINTF(KvmIO, "KVM: Handling MMIO (w: %u, addr: 0x%x, len: %u)\n",
1034                _kvmRun->mmio.is_write,
1035                _kvmRun->mmio.phys_addr, _kvmRun->mmio.len);
1036
1037        ++numMMIO;
1038        Tick ticks = doMMIOAccess(_kvmRun->mmio.phys_addr, _kvmRun->mmio.data,
1039                                  _kvmRun->mmio.len, _kvmRun->mmio.is_write);
1040        // doMMIOAccess could have triggered a suspend, in which case we don't
1041        // want to overwrite the _status.
1042        if (_status != Idle)
1043            _status = dataPort.nextIOState();
1044        return ticks;
1045      }
1046
1047      case KVM_EXIT_IRQ_WINDOW_OPEN:
1048        return handleKvmExitIRQWindowOpen();
1049
1050      case KVM_EXIT_FAIL_ENTRY:
1051        return handleKvmExitFailEntry();
1052
1053      case KVM_EXIT_INTR:
1054        /* KVM was interrupted by a signal, restart it in the next
1055         * tick. */
1056        return 0;
1057
1058      case KVM_EXIT_INTERNAL_ERROR:
1059        panic("KVM: Internal error (suberror: %u)\n",
1060              _kvmRun->internal.suberror);
1061
1062      default:
1063        dump();
1064        panic("KVM: Unexpected exit (exit_reason: %u)\n", _kvmRun->exit_reason);
1065    }
1066}
1067
1068Tick
1069BaseKvmCPU::handleKvmExitIO()
1070{
1071    panic("KVM: Unhandled guest IO (dir: %i, size: %i, port: 0x%x, count: %i)\n",
1072          _kvmRun->io.direction, _kvmRun->io.size,
1073          _kvmRun->io.port, _kvmRun->io.count);
1074}
1075
1076Tick
1077BaseKvmCPU::handleKvmExitHypercall()
1078{
1079    panic("KVM: Unhandled hypercall\n");
1080}
1081
1082Tick
1083BaseKvmCPU::handleKvmExitIRQWindowOpen()
1084{
1085    warn("KVM: Unhandled IRQ window.\n");
1086    return 0;
1087}
1088
1089
1090Tick
1091BaseKvmCPU::handleKvmExitUnknown()
1092{
1093    dump();
1094    panic("KVM: Unknown error when starting vCPU (hw reason: 0x%llx)\n",
1095          _kvmRun->hw.hardware_exit_reason);
1096}
1097
1098Tick
1099BaseKvmCPU::handleKvmExitException()
1100{
1101    dump();
1102    panic("KVM: Got exception when starting vCPU "
1103          "(exception: %u, error_code: %u)\n",
1104          _kvmRun->ex.exception, _kvmRun->ex.error_code);
1105}
1106
1107Tick
1108BaseKvmCPU::handleKvmExitFailEntry()
1109{
1110    dump();
1111    panic("KVM: Failed to enter virtualized mode (hw reason: 0x%llx)\n",
1112          _kvmRun->fail_entry.hardware_entry_failure_reason);
1113}
1114
1115Tick
1116BaseKvmCPU::doMMIOAccess(Addr paddr, void *data, int size, bool write)
1117{
1118    ThreadContext *tc(thread->getTC());
1119    syncThreadContext();
1120
1121    RequestPtr mmio_req = new Request(paddr, size, Request::UNCACHEABLE,
1122                                      dataMasterId());
1123    mmio_req->setContext(tc->contextId());
1124    // Some architectures do need to massage physical addresses a bit
1125    // before they are inserted into the memory system. This enables
1126    // APIC accesses on x86 and m5ops where supported through a MMIO
1127    // interface.
1128    BaseTLB::Mode tlb_mode(write ? BaseTLB::Write : BaseTLB::Read);
1129    Fault fault(tc->getDTBPtr()->finalizePhysical(mmio_req, tc, tlb_mode));
1130    if (fault != NoFault)
1131        warn("Finalization of MMIO address failed: %s\n", fault->name());
1132
1133
1134    const MemCmd cmd(write ? MemCmd::WriteReq : MemCmd::ReadReq);
1135    PacketPtr pkt = new Packet(mmio_req, cmd);
1136    pkt->dataStatic(data);
1137
1138    if (mmio_req->isMmappedIpr()) {
1139        // We currently assume that there is no need to migrate to a
1140        // different event queue when doing IPRs. Currently, IPRs are
1141        // only used for m5ops, so it should be a valid assumption.
1142        const Cycles ipr_delay(write ?
1143                             TheISA::handleIprWrite(tc, pkt) :
1144                             TheISA::handleIprRead(tc, pkt));
1145        threadContextDirty = true;
1146        delete pkt->req;
1147        delete pkt;
1148        return clockPeriod() * ipr_delay;
1149    } else {
1150        // Temporarily lock and migrate to the device event queue to
1151        // prevent races in multi-core mode.
1152        EventQueue::ScopedMigration migrate(deviceEventQueue());
1153
1154        return dataPort.submitIO(pkt);
1155    }
1156}
1157
1158void
1159BaseKvmCPU::setSignalMask(const sigset_t *mask)
1160{
1161    std::unique_ptr<struct kvm_signal_mask> kvm_mask;
1162
1163    if (mask) {
1164        kvm_mask.reset((struct kvm_signal_mask *)operator new(
1165                           sizeof(struct kvm_signal_mask) + sizeof(*mask)));
1166        // The kernel and the user-space headers have different ideas
1167        // about the size of sigset_t. This seems like a massive hack,
1168        // but is actually what qemu does.
1169        assert(sizeof(*mask) >= 8);
1170        kvm_mask->len = 8;
1171        memcpy(kvm_mask->sigset, mask, kvm_mask->len);
1172    }
1173
1174    if (ioctl(KVM_SET_SIGNAL_MASK, (void *)kvm_mask.get()) == -1)
1175        panic("KVM: Failed to set vCPU signal mask (errno: %i)\n",
1176              errno);
1177}
1178
1179int
1180BaseKvmCPU::ioctl(int request, long p1) const
1181{
1182    if (vcpuFD == -1)
1183        panic("KVM: CPU ioctl called before initialization\n");
1184
1185    return ::ioctl(vcpuFD, request, p1);
1186}
1187
1188Tick
1189BaseKvmCPU::flushCoalescedMMIO()
1190{
1191    if (!mmioRing)
1192        return 0;
1193
1194    DPRINTF(KvmIO, "KVM: Flushing the coalesced MMIO ring buffer\n");
1195
1196    // TODO: We might need to do synchronization when we start to
1197    // support multiple CPUs
1198    Tick ticks(0);
1199    while (mmioRing->first != mmioRing->last) {
1200        struct kvm_coalesced_mmio &ent(
1201            mmioRing->coalesced_mmio[mmioRing->first]);
1202
1203        DPRINTF(KvmIO, "KVM: Handling coalesced MMIO (addr: 0x%x, len: %u)\n",
1204                ent.phys_addr, ent.len);
1205
1206        ++numCoalescedMMIO;
1207        ticks += doMMIOAccess(ent.phys_addr, ent.data, ent.len, true);
1208
1209        mmioRing->first = (mmioRing->first + 1) % KVM_COALESCED_MMIO_MAX;
1210    }
1211
1212    return ticks;
1213}
1214
1215/**
1216 * Dummy handler for KVM kick signals.
1217 *
1218 * @note This function is usually not called since the kernel doesn't
1219 * seem to deliver signals when the signal is only unmasked when
1220 * running in KVM. This doesn't matter though since we are only
1221 * interested in getting KVM to exit, which happens as expected. See
1222 * setupSignalHandler() and kvmRun() for details about KVM signal
1223 * handling.
1224 */
1225static void
1226onKickSignal(int signo, siginfo_t *si, void *data)
1227{
1228}
1229
1230void
1231BaseKvmCPU::setupSignalHandler()
1232{
1233    struct sigaction sa;
1234
1235    memset(&sa, 0, sizeof(sa));
1236    sa.sa_sigaction = onKickSignal;
1237    sa.sa_flags = SA_SIGINFO | SA_RESTART;
1238    if (sigaction(KVM_KICK_SIGNAL, &sa, NULL) == -1)
1239        panic("KVM: Failed to setup vCPU timer signal handler\n");
1240
1241    sigset_t sigset;
1242    if (pthread_sigmask(SIG_BLOCK, NULL, &sigset) == -1)
1243        panic("KVM: Failed get signal mask\n");
1244
1245    // Request KVM to setup the same signal mask as we're currently
1246    // running with except for the KVM control signal. We'll sometimes
1247    // need to raise the KVM_KICK_SIGNAL to cause immediate exits from
1248    // KVM after servicing IO requests. See kvmRun().
1249    sigdelset(&sigset, KVM_KICK_SIGNAL);
1250    setSignalMask(&sigset);
1251
1252    // Mask our control signals so they aren't delivered unless we're
1253    // actually executing inside KVM.
1254    sigaddset(&sigset, KVM_KICK_SIGNAL);
1255    if (pthread_sigmask(SIG_SETMASK, &sigset, NULL) == -1)
1256        panic("KVM: Failed mask the KVM control signals\n");
1257}
1258
1259bool
1260BaseKvmCPU::discardPendingSignal(int signum) const
1261{
1262    int discardedSignal;
1263
1264    // Setting the timeout to zero causes sigtimedwait to return
1265    // immediately.
1266    struct timespec timeout;
1267    timeout.tv_sec = 0;
1268    timeout.tv_nsec = 0;
1269
1270    sigset_t sigset;
1271    sigemptyset(&sigset);
1272    sigaddset(&sigset, signum);
1273
1274    do {
1275        discardedSignal = sigtimedwait(&sigset, NULL, &timeout);
1276    } while (discardedSignal == -1 && errno == EINTR);
1277
1278    if (discardedSignal == signum)
1279        return true;
1280    else if (discardedSignal == -1 && errno == EAGAIN)
1281        return false;
1282    else
1283        panic("Unexpected return value from sigtimedwait: %i (errno: %i)\n",
1284              discardedSignal, errno);
1285}
1286
1287void
1288BaseKvmCPU::setupCounters()
1289{
1290    DPRINTF(Kvm, "Attaching cycle counter...\n");
1291    PerfKvmCounterConfig cfgCycles(PERF_TYPE_HARDWARE,
1292                                PERF_COUNT_HW_CPU_CYCLES);
1293    cfgCycles.disabled(true)
1294        .pinned(true);
1295
1296    // Try to exclude the host. We set both exclude_hv and
1297    // exclude_host since different architectures use slightly
1298    // different APIs in the kernel.
1299    cfgCycles.exclude_hv(true)
1300        .exclude_host(true);
1301
1302    if (perfControlledByTimer) {
1303        // We need to configure the cycles counter to send overflows
1304        // since we are going to use it to trigger timer signals that
1305        // trap back into m5 from KVM. In practice, this means that we
1306        // need to set some non-zero sample period that gets
1307        // overridden when the timer is armed.
1308        cfgCycles.wakeupEvents(1)
1309            .samplePeriod(42);
1310    }
1311
1312    hwCycles.attach(cfgCycles,
1313                    0); // TID (0 => currentThread)
1314
1315    setupInstCounter();
1316}
1317
1318bool
1319BaseKvmCPU::tryDrain()
1320{
1321    if (drainState() != DrainState::Draining)
1322        return false;
1323
1324    if (!archIsDrained()) {
1325        DPRINTF(Drain, "tryDrain: Architecture code is not ready.\n");
1326        return false;
1327    }
1328
1329    if (_status == Idle || _status == Running) {
1330        DPRINTF(Drain,
1331                "tryDrain: CPU transitioned into the Idle state, drain done\n");
1332        signalDrainDone();
1333        return true;
1334    } else {
1335        DPRINTF(Drain, "tryDrain: CPU not ready.\n");
1336        return false;
1337    }
1338}
1339
1340void
1341BaseKvmCPU::ioctlRun()
1342{
1343    if (ioctl(KVM_RUN) == -1) {
1344        if (errno != EINTR)
1345            panic("KVM: Failed to start virtual CPU (errno: %i)\n",
1346                  errno);
1347    }
1348}
1349
1350void
1351BaseKvmCPU::setupInstStop()
1352{
1353    if (comInstEventQueue[0]->empty()) {
1354        setupInstCounter(0);
1355    } else {
1356        const uint64_t next(comInstEventQueue[0]->nextTick());
1357
1358        assert(next > ctrInsts);
1359        setupInstCounter(next - ctrInsts);
1360    }
1361}
1362
1363void
1364BaseKvmCPU::setupInstCounter(uint64_t period)
1365{
1366    // No need to do anything if we aren't attaching for the first
1367    // time or the period isn't changing.
1368    if (period == activeInstPeriod && hwInstructions.attached())
1369        return;
1370
1371    PerfKvmCounterConfig cfgInstructions(PERF_TYPE_HARDWARE,
1372                                         PERF_COUNT_HW_INSTRUCTIONS);
1373
1374    // Try to exclude the host. We set both exclude_hv and
1375    // exclude_host since different architectures use slightly
1376    // different APIs in the kernel.
1377    cfgInstructions.exclude_hv(true)
1378        .exclude_host(true);
1379
1380    if (period) {
1381        // Setup a sampling counter if that has been requested.
1382        cfgInstructions.wakeupEvents(1)
1383            .samplePeriod(period);
1384    }
1385
1386    // We need to detach and re-attach the counter to reliably change
1387    // sampling settings. See PerfKvmCounter::period() for details.
1388    if (hwInstructions.attached())
1389        hwInstructions.detach();
1390    assert(hwCycles.attached());
1391    hwInstructions.attach(cfgInstructions,
1392                          0, // TID (0 => currentThread)
1393                          hwCycles);
1394
1395    if (period)
1396        hwInstructions.enableSignals(KVM_KICK_SIGNAL);
1397
1398    activeInstPeriod = period;
1399}
1400