base.hh revision 3894:60a7b0a3602f
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32#ifndef __CPU_BASE_HH__ 33#define __CPU_BASE_HH__ 34 35#include <vector> 36 37#include "base/statistics.hh" 38#include "config/full_system.hh" 39#include "sim/eventq.hh" 40#include "mem/mem_object.hh" 41#include "arch/isa_traits.hh" 42 43#if FULL_SYSTEM 44#include "arch/interrupts.hh" 45#endif 46 47class BranchPred; 48class CheckerCPU; 49class ThreadContext; 50class System; 51class Port; 52 53class CPUProgressEvent : public Event 54{ 55 protected: 56 Tick interval; 57 Counter lastNumInst; 58 BaseCPU *cpu; 59 60 public: 61 CPUProgressEvent(EventQueue *q, Tick ival, BaseCPU *_cpu); 62 63 void process(); 64 65 virtual const char *description(); 66}; 67 68class BaseCPU : public MemObject 69{ 70 protected: 71 // CPU's clock period in terms of the number of ticks of curTime. 72 Tick clock; 73 // @todo remove me after debugging with legion done 74 Tick instCnt; 75 76 public: 77// Tick currentTick; 78 inline Tick frequency() const { return Clock::Frequency / clock; } 79 inline Tick cycles(int numCycles) const { return clock * numCycles; } 80 inline Tick curCycle() const { return curTick / clock; } 81 // @todo remove me after debugging with legion done 82 Tick instCount() { return instCnt; } 83 84 /** The next cycle the CPU should be scheduled, given a cache 85 * access or quiesce event returning on this cycle. This function 86 * may return curTick if the CPU should run on the current cycle. 87 */ 88 Tick nextCycle(); 89 90 /** The next cycle the CPU should be scheduled, given a cache 91 * access or quiesce event returning on the given Tick. This 92 * function may return curTick if the CPU should run on the 93 * current cycle. 94 * @param begin_tick The tick that the event is completing on. 95 */ 96 Tick nextCycle(Tick begin_tick); 97 98#if FULL_SYSTEM 99 protected: 100// uint64_t interrupts[TheISA::NumInterruptLevels]; 101// uint64_t intstatus; 102 TheISA::Interrupts interrupts; 103 104 public: 105 virtual void post_interrupt(int int_type); 106 virtual void post_interrupt(int int_num, int index); 107 virtual void clear_interrupt(int int_num, int index); 108 virtual void clear_interrupts(); 109 bool checkInterrupts; 110 111 bool check_interrupts(ThreadContext * tc) const 112 { return interrupts.check_interrupts(tc); } 113 114 class ProfileEvent : public Event 115 { 116 private: 117 BaseCPU *cpu; 118 int interval; 119 120 public: 121 ProfileEvent(BaseCPU *cpu, int interval); 122 void process(); 123 }; 124 ProfileEvent *profileEvent; 125#endif 126 127 protected: 128 std::vector<ThreadContext *> threadContexts; 129 130 public: 131 132 /// Notify the CPU that the indicated context is now active. The 133 /// delay parameter indicates the number of ticks to wait before 134 /// executing (typically 0 or 1). 135 virtual void activateContext(int thread_num, int delay) {} 136 137 /// Notify the CPU that the indicated context is now suspended. 138 virtual void suspendContext(int thread_num) {} 139 140 /// Notify the CPU that the indicated context is now deallocated. 141 virtual void deallocateContext(int thread_num) {} 142 143 /// Notify the CPU that the indicated context is now halted. 144 virtual void haltContext(int thread_num) {} 145 146 public: 147 struct Params 148 { 149 std::string name; 150 int numberOfThreads; 151 bool deferRegistration; 152 Counter max_insts_any_thread; 153 Counter max_insts_all_threads; 154 Counter max_loads_any_thread; 155 Counter max_loads_all_threads; 156 Tick clock; 157 bool functionTrace; 158 Tick functionTraceStart; 159 System *system; 160 int cpu_id; 161 Tick phase; 162#if FULL_SYSTEM 163 Tick profile; 164 165 bool do_statistics_insts; 166 bool do_checkpoint_insts; 167 bool do_quiesce; 168#endif 169 Tick progress_interval; 170 BaseCPU *checker; 171 172 Params(); 173 }; 174 175 const Params *params; 176 177 BaseCPU(Params *params); 178 virtual ~BaseCPU(); 179 180 virtual void init(); 181 virtual void startup(); 182 virtual void regStats(); 183 184 virtual void activateWhenReady(int tid) {}; 185 186 void registerThreadContexts(); 187 188 /// Prepare for another CPU to take over execution. When it is 189 /// is ready (drained pipe) it signals the sampler. 190 virtual void switchOut(); 191 192 /// Take over execution from the given CPU. Used for warm-up and 193 /// sampling. 194 virtual void takeOverFrom(BaseCPU *); 195 196 /** 197 * Number of threads we're actually simulating (<= SMT_MAX_THREADS). 198 * This is a constant for the duration of the simulation. 199 */ 200 int number_of_threads; 201 202 /** 203 * Vector of per-thread instruction-based event queues. Used for 204 * scheduling events based on number of instructions committed by 205 * a particular thread. 206 */ 207 EventQueue **comInstEventQueue; 208 209 /** 210 * Vector of per-thread load-based event queues. Used for 211 * scheduling events based on number of loads committed by 212 *a particular thread. 213 */ 214 EventQueue **comLoadEventQueue; 215 216 System *system; 217 218 Tick phase; 219 220#if FULL_SYSTEM 221 /** 222 * Serialize this object to the given output stream. 223 * @param os The stream to serialize to. 224 */ 225 virtual void serialize(std::ostream &os); 226 227 /** 228 * Reconstruct the state of this object from a checkpoint. 229 * @param cp The checkpoint use. 230 * @param section The section name of this object 231 */ 232 virtual void unserialize(Checkpoint *cp, const std::string §ion); 233 234#endif 235 236 /** 237 * Return pointer to CPU's branch predictor (NULL if none). 238 * @return Branch predictor pointer. 239 */ 240 virtual BranchPred *getBranchPred() { return NULL; }; 241 242 virtual Counter totalInstructions() const { return 0; } 243 244 // Function tracing 245 private: 246 bool functionTracingEnabled; 247 std::ostream *functionTraceStream; 248 Addr currentFunctionStart; 249 Addr currentFunctionEnd; 250 Tick functionEntryTick; 251 void enableFunctionTrace(); 252 void traceFunctionsInternal(Addr pc); 253 254 protected: 255 void traceFunctions(Addr pc) 256 { 257 if (functionTracingEnabled) 258 traceFunctionsInternal(pc); 259 } 260 261 private: 262 static std::vector<BaseCPU *> cpuList; //!< Static global cpu list 263 264 public: 265 static int numSimulatedCPUs() { return cpuList.size(); } 266 static Counter numSimulatedInstructions() 267 { 268 Counter total = 0; 269 270 int size = cpuList.size(); 271 for (int i = 0; i < size; ++i) 272 total += cpuList[i]->totalInstructions(); 273 274 return total; 275 } 276 277 public: 278 // Number of CPU cycles simulated 279 Stats::Scalar<> numCycles; 280}; 281 282#endif // __CPU_BASE_HH__ 283