base.cc revision 5529
12SN/A/*
21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt
292665Ssaidi@eecs.umich.edu *          Nathan Binkert
302SN/A */
312SN/A
321388SN/A#include <iostream>
332SN/A#include <string>
342SN/A#include <sstream>
352SN/A
361191SN/A#include "base/cprintf.hh"
371191SN/A#include "base/loader/symtab.hh"
381191SN/A#include "base/misc.hh"
391388SN/A#include "base/output.hh"
405529Snate@binkert.org#include "base/trace.hh"
411717SN/A#include "cpu/base.hh"
422651Ssaidi@eecs.umich.edu#include "cpu/cpuevent.hh"
432680Sktlim@umich.edu#include "cpu/thread_context.hh"
441977SN/A#include "cpu/profile.hh"
455529Snate@binkert.org#include "params/BaseCPU.hh"
463144Shsul@eecs.umich.edu#include "sim/sim_exit.hh"
472190SN/A#include "sim/process.hh"
4856SN/A#include "sim/sim_events.hh"
492190SN/A#include "sim/system.hh"
502SN/A
512359SN/A// Hack
522359SN/A#include "sim/stat_control.hh"
532359SN/A
542SN/Ausing namespace std;
552SN/A
562SN/Avector<BaseCPU *> BaseCPU::cpuList;
572SN/A
582SN/A// This variable reflects the max number of threads in any CPU.  Be
592SN/A// careful to only use it once all the CPUs that you care about have
602SN/A// been initialized
612SN/Aint maxThreadsPerCPU = 1;
622SN/A
633126Sktlim@umich.eduCPUProgressEvent::CPUProgressEvent(EventQueue *q, Tick ival,
643126Sktlim@umich.edu                                   BaseCPU *_cpu)
654075Sbinkertn@umich.edu    : Event(q, Event::Progress_Event_Pri), interval(ival),
663126Sktlim@umich.edu      lastNumInst(0), cpu(_cpu)
673126Sktlim@umich.edu{
683126Sktlim@umich.edu    if (interval)
693126Sktlim@umich.edu        schedule(curTick + interval);
703126Sktlim@umich.edu}
713126Sktlim@umich.edu
722356SN/Avoid
732356SN/ACPUProgressEvent::process()
742356SN/A{
752367SN/A    Counter temp = cpu->totalInstructions();
762356SN/A#ifndef NDEBUG
775100Ssaidi@eecs.umich.edu    double ipc = double(temp - lastNumInst) / (interval / cpu->ticks(1));
782367SN/A
792356SN/A    DPRINTFN("%s progress event, instructions committed: %lli, IPC: %0.8d\n",
802356SN/A             cpu->name(), temp - lastNumInst, ipc);
812356SN/A    ipc = 0.0;
822367SN/A#else
832367SN/A    cprintf("%lli: %s progress event, instructions committed: %lli\n",
842367SN/A            curTick, cpu->name(), temp - lastNumInst);
852367SN/A#endif
862356SN/A    lastNumInst = temp;
872356SN/A    schedule(curTick + interval);
882356SN/A}
892356SN/A
902356SN/Aconst char *
915336Shines@cs.fsu.eduCPUProgressEvent::description() const
922356SN/A{
934873Sstever@eecs.umich.edu    return "CPU Progress";
942356SN/A}
952356SN/A
961858SN/A#if FULL_SYSTEM
971400SN/ABaseCPU::BaseCPU(Params *p)
985529Snate@binkert.org    : MemObject(p), clock(p->clock), instCnt(0),
995529Snate@binkert.org      number_of_threads(p->numThreads), system(p->system),
1003661Srdreslin@umich.edu      phase(p->phase)
1012SN/A#else
1021400SN/ABaseCPU::BaseCPU(Params *p)
1035529Snate@binkert.org    : MemObject(p), clock(p->clock),
1045529Snate@binkert.org      number_of_threads(p->numThreads), system(p->system),
1053661Srdreslin@umich.edu      phase(p->phase)
1062SN/A#endif
1072SN/A{
1082359SN/A//    currentTick = curTick;
1091062SN/A
1102SN/A    // add self to global list of CPUs
1112SN/A    cpuList.push_back(this);
1122SN/A
1132SN/A    if (number_of_threads > maxThreadsPerCPU)
1142SN/A        maxThreadsPerCPU = number_of_threads;
1152SN/A
1162SN/A    // allocate per-thread instruction-based event queues
1171354SN/A    comInstEventQueue = new EventQueue *[number_of_threads];
1182SN/A    for (int i = 0; i < number_of_threads; ++i)
119503SN/A        comInstEventQueue[i] = new EventQueue("instruction-based event queue");
1202SN/A
1212SN/A    //
1222SN/A    // set up instruction-count-based termination events, if any
1232SN/A    //
1241400SN/A    if (p->max_insts_any_thread != 0)
1252SN/A        for (int i = 0; i < number_of_threads; ++i)
1263144Shsul@eecs.umich.edu            schedExitSimLoop("a thread reached the max instruction count",
1273144Shsul@eecs.umich.edu                             p->max_insts_any_thread, 0,
1283144Shsul@eecs.umich.edu                             comInstEventQueue[i]);
1292SN/A
1301400SN/A    if (p->max_insts_all_threads != 0) {
1312SN/A        // allocate & initialize shared downcounter: each event will
1322SN/A        // decrement this when triggered; simulation will terminate
1332SN/A        // when counter reaches 0
1342SN/A        int *counter = new int;
1352SN/A        *counter = number_of_threads;
1362SN/A        for (int i = 0; i < number_of_threads; ++i)
137503SN/A            new CountedExitEvent(comInstEventQueue[i],
1382SN/A                "all threads reached the max instruction count",
1391400SN/A                p->max_insts_all_threads, *counter);
1402SN/A    }
1412SN/A
142124SN/A    // allocate per-thread load-based event queues
1431354SN/A    comLoadEventQueue = new EventQueue *[number_of_threads];
144124SN/A    for (int i = 0; i < number_of_threads; ++i)
145124SN/A        comLoadEventQueue[i] = new EventQueue("load-based event queue");
146124SN/A
147124SN/A    //
148124SN/A    // set up instruction-count-based termination events, if any
149124SN/A    //
1501400SN/A    if (p->max_loads_any_thread != 0)
151124SN/A        for (int i = 0; i < number_of_threads; ++i)
1523144Shsul@eecs.umich.edu            schedExitSimLoop("a thread reached the max load count",
1533144Shsul@eecs.umich.edu                             p->max_loads_any_thread, 0,
1543144Shsul@eecs.umich.edu                             comLoadEventQueue[i]);
155124SN/A
1561400SN/A    if (p->max_loads_all_threads != 0) {
157124SN/A        // allocate & initialize shared downcounter: each event will
158124SN/A        // decrement this when triggered; simulation will terminate
159124SN/A        // when counter reaches 0
160124SN/A        int *counter = new int;
161124SN/A        *counter = number_of_threads;
162124SN/A        for (int i = 0; i < number_of_threads; ++i)
163124SN/A            new CountedExitEvent(comLoadEventQueue[i],
164124SN/A                "all threads reached the max load count",
1651400SN/A                p->max_loads_all_threads, *counter);
166124SN/A    }
167124SN/A
1681191SN/A    functionTracingEnabled = false;
1695529Snate@binkert.org    if (p->function_trace) {
1701388SN/A        functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
1711191SN/A        currentFunctionStart = currentFunctionEnd = 0;
1725529Snate@binkert.org        functionEntryTick = p->function_trace_start;
1731191SN/A
1745529Snate@binkert.org        if (p->function_trace_start == 0) {
1751191SN/A            functionTracingEnabled = true;
1761191SN/A        } else {
1775529Snate@binkert.org            new EventWrapper<BaseCPU,
1785529Snate@binkert.org                &BaseCPU::enableFunctionTrace>(
1795529Snate@binkert.org                this, p->function_trace_start, true);
1801191SN/A        }
1811191SN/A    }
1821917SN/A#if FULL_SYSTEM
1831917SN/A    profileEvent = NULL;
1845529Snate@binkert.org    if (params()->profile)
1855529Snate@binkert.org        profileEvent = new ProfileEvent(this, params()->profile);
1861917SN/A#endif
1875529Snate@binkert.org    tracer = params()->tracer;
1881917SN/A}
1891191SN/A
1901191SN/Avoid
1911191SN/ABaseCPU::enableFunctionTrace()
1921191SN/A{
1931191SN/A    functionTracingEnabled = true;
1941191SN/A}
1951191SN/A
1961191SN/ABaseCPU::~BaseCPU()
1971191SN/A{
1981191SN/A}
1991191SN/A
2001129SN/Avoid
2011129SN/ABaseCPU::init()
2021129SN/A{
2035529Snate@binkert.org    if (!params()->defer_registration)
2042680Sktlim@umich.edu        registerThreadContexts();
2051129SN/A}
206180SN/A
2072SN/Avoid
2081917SN/ABaseCPU::startup()
2091917SN/A{
2101917SN/A#if FULL_SYSTEM
2115529Snate@binkert.org    if (!params()->defer_registration && profileEvent)
2121917SN/A        profileEvent->schedule(curTick);
2131917SN/A#endif
2142356SN/A
2155529Snate@binkert.org    if (params()->progress_interval) {
2164031Sktlim@umich.edu        new CPUProgressEvent(&mainEventQueue,
2175529Snate@binkert.org                             ticks(params()->progress_interval),
2182356SN/A                             this);
2192356SN/A    }
2201917SN/A}
2211917SN/A
2221917SN/A
2231917SN/Avoid
2242SN/ABaseCPU::regStats()
2252SN/A{
226729SN/A    using namespace Stats;
227707SN/A
228707SN/A    numCycles
229707SN/A        .name(name() + ".numCycles")
230707SN/A        .desc("number of cpu cycles simulated")
231707SN/A        ;
232707SN/A
2332680Sktlim@umich.edu    int size = threadContexts.size();
2342SN/A    if (size > 1) {
2352SN/A        for (int i = 0; i < size; ++i) {
2362SN/A            stringstream namestr;
2372SN/A            ccprintf(namestr, "%s.ctx%d", name(), i);
2382680Sktlim@umich.edu            threadContexts[i]->regStats(namestr.str());
2392SN/A        }
2402SN/A    } else if (size == 1)
2412680Sktlim@umich.edu        threadContexts[0]->regStats(name());
2422190SN/A
2432190SN/A#if FULL_SYSTEM
2442190SN/A#endif
2452SN/A}
2462SN/A
2473495Sktlim@umich.eduTick
2483495Sktlim@umich.eduBaseCPU::nextCycle()
2493495Sktlim@umich.edu{
2503661Srdreslin@umich.edu    Tick next_tick = curTick - phase + clock - 1;
2513495Sktlim@umich.edu    next_tick -= (next_tick % clock);
2523661Srdreslin@umich.edu    next_tick += phase;
2533495Sktlim@umich.edu    return next_tick;
2543495Sktlim@umich.edu}
2553495Sktlim@umich.edu
2563495Sktlim@umich.eduTick
2573495Sktlim@umich.eduBaseCPU::nextCycle(Tick begin_tick)
2583495Sktlim@umich.edu{
2593495Sktlim@umich.edu    Tick next_tick = begin_tick;
2604599Sacolyte@umich.edu    if (next_tick % clock != 0)
2614599Sacolyte@umich.edu        next_tick = next_tick - (next_tick % clock) + clock;
2623661Srdreslin@umich.edu    next_tick += phase;
2633495Sktlim@umich.edu
2643495Sktlim@umich.edu    assert(next_tick >= curTick);
2653495Sktlim@umich.edu    return next_tick;
2663495Sktlim@umich.edu}
267180SN/A
268180SN/Avoid
2692680Sktlim@umich.eduBaseCPU::registerThreadContexts()
270180SN/A{
2712680Sktlim@umich.edu    for (int i = 0; i < threadContexts.size(); ++i) {
2722680Sktlim@umich.edu        ThreadContext *tc = threadContexts[i];
2732378SN/A
2741858SN/A#if FULL_SYSTEM
2755529Snate@binkert.org        int id = params()->cpu_id;
2761806SN/A        if (id != -1)
2771806SN/A            id += i;
278180SN/A
2792680Sktlim@umich.edu        tc->setCpuId(system->registerThreadContext(tc, id));
280180SN/A#else
2812680Sktlim@umich.edu        tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc));
282180SN/A#endif
283180SN/A    }
284180SN/A}
285180SN/A
286180SN/A
2874000Ssaidi@eecs.umich.eduint
2884000Ssaidi@eecs.umich.eduBaseCPU::findContext(ThreadContext *tc)
2894000Ssaidi@eecs.umich.edu{
2904000Ssaidi@eecs.umich.edu    for (int i = 0; i < threadContexts.size(); ++i) {
2914000Ssaidi@eecs.umich.edu        if (tc == threadContexts[i])
2924000Ssaidi@eecs.umich.edu            return i;
2934000Ssaidi@eecs.umich.edu    }
2944000Ssaidi@eecs.umich.edu    return 0;
2954000Ssaidi@eecs.umich.edu}
2964000Ssaidi@eecs.umich.edu
297180SN/Avoid
2982798Sktlim@umich.eduBaseCPU::switchOut()
299180SN/A{
3002359SN/A//    panic("This CPU doesn't support sampling!");
3012359SN/A#if FULL_SYSTEM
3022359SN/A    if (profileEvent && profileEvent->scheduled())
3032359SN/A        profileEvent->deschedule();
3042359SN/A#endif
305180SN/A}
306180SN/A
307180SN/Avoid
3084192Sktlim@umich.eduBaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
309180SN/A{
3102680Sktlim@umich.edu    assert(threadContexts.size() == oldCPU->threadContexts.size());
311180SN/A
3122680Sktlim@umich.edu    for (int i = 0; i < threadContexts.size(); ++i) {
3132680Sktlim@umich.edu        ThreadContext *newTC = threadContexts[i];
3142680Sktlim@umich.edu        ThreadContext *oldTC = oldCPU->threadContexts[i];
315180SN/A
3162680Sktlim@umich.edu        newTC->takeOverFrom(oldTC);
3172651Ssaidi@eecs.umich.edu
3182680Sktlim@umich.edu        CpuEvent::replaceThreadContext(oldTC, newTC);
3192651Ssaidi@eecs.umich.edu
3202680Sktlim@umich.edu        assert(newTC->readCpuId() == oldTC->readCpuId());
3211858SN/A#if FULL_SYSTEM
3222680Sktlim@umich.edu        system->replaceThreadContext(newTC, newTC->readCpuId());
323180SN/A#else
3242680Sktlim@umich.edu        assert(newTC->getProcessPtr() == oldTC->getProcessPtr());
3252680Sktlim@umich.edu        newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId());
326180SN/A#endif
3272359SN/A
3285217Ssaidi@eecs.umich.edu        if (DTRACE(Context))
3295217Ssaidi@eecs.umich.edu            ThreadContext::compare(oldTC, newTC);
330180SN/A    }
331605SN/A
3321858SN/A#if FULL_SYSTEM
3333520Sgblack@eecs.umich.edu    interrupts = oldCPU->interrupts;
3342254SN/A
3352680Sktlim@umich.edu    for (int i = 0; i < threadContexts.size(); ++i)
3362680Sktlim@umich.edu        threadContexts[i]->profileClear();
3372254SN/A
3384947Snate@binkert.org    if (profileEvent)
3394947Snate@binkert.org        profileEvent->schedule(curTick);
340612SN/A#endif
3414192Sktlim@umich.edu
3424192Sktlim@umich.edu    // Connect new CPU to old CPU's memory only if new CPU isn't
3434192Sktlim@umich.edu    // connected to anything.  Also connect old CPU's memory to new
3444192Sktlim@umich.edu    // CPU.
3455476Snate@binkert.org    if (!ic->isConnected()) {
3465476Snate@binkert.org        Port *peer = oldCPU->getPort("icache_port")->getPeer();
3474192Sktlim@umich.edu        ic->setPeer(peer);
3485476Snate@binkert.org        peer->setPeer(ic);
3494192Sktlim@umich.edu    }
3504192Sktlim@umich.edu
3515476Snate@binkert.org    if (!dc->isConnected()) {
3525476Snate@binkert.org        Port *peer = oldCPU->getPort("dcache_port")->getPeer();
3534192Sktlim@umich.edu        dc->setPeer(peer);
3545476Snate@binkert.org        peer->setPeer(dc);
3554192Sktlim@umich.edu    }
356180SN/A}
357180SN/A
358180SN/A
3591858SN/A#if FULL_SYSTEM
3601917SN/ABaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
3611917SN/A    : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
3621917SN/A{ }
3631917SN/A
3641917SN/Avoid
3651917SN/ABaseCPU::ProfileEvent::process()
3661917SN/A{
3672680Sktlim@umich.edu    for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) {
3682680Sktlim@umich.edu        ThreadContext *tc = cpu->threadContexts[i];
3692680Sktlim@umich.edu        tc->profileSample();
3701917SN/A    }
3712254SN/A
3721917SN/A    schedule(curTick + interval);
3731917SN/A}
3741917SN/A
3752SN/Avoid
3762SN/ABaseCPU::post_interrupt(int int_num, int index)
3772SN/A{
3783520Sgblack@eecs.umich.edu    interrupts.post(int_num, index);
3792SN/A}
3802SN/A
3812SN/Avoid
3822SN/ABaseCPU::clear_interrupt(int int_num, int index)
3832SN/A{
3843520Sgblack@eecs.umich.edu    interrupts.clear(int_num, index);
3852SN/A}
3862SN/A
3872SN/Avoid
3882SN/ABaseCPU::clear_interrupts()
3892SN/A{
3903520Sgblack@eecs.umich.edu    interrupts.clear_all();
3912SN/A}
3922SN/A
3934103Ssaidi@eecs.umich.eduuint64_t
3944103Ssaidi@eecs.umich.eduBaseCPU::get_interrupts(int int_num)
3954103Ssaidi@eecs.umich.edu{
3964103Ssaidi@eecs.umich.edu    return interrupts.get_vec(int_num);
3974103Ssaidi@eecs.umich.edu}
398921SN/A
399921SN/Avoid
400921SN/ABaseCPU::serialize(std::ostream &os)
401921SN/A{
4024000Ssaidi@eecs.umich.edu    SERIALIZE_SCALAR(instCnt);
4033520Sgblack@eecs.umich.edu    interrupts.serialize(os);
404921SN/A}
405921SN/A
406921SN/Avoid
407921SN/ABaseCPU::unserialize(Checkpoint *cp, const std::string &section)
408921SN/A{
4094000Ssaidi@eecs.umich.edu    UNSERIALIZE_SCALAR(instCnt);
4103520Sgblack@eecs.umich.edu    interrupts.unserialize(cp, section);
411921SN/A}
412921SN/A
4132SN/A#endif // FULL_SYSTEM
4142SN/A
4151191SN/Avoid
4161191SN/ABaseCPU::traceFunctionsInternal(Addr pc)
4171191SN/A{
4181191SN/A    if (!debugSymbolTable)
4191191SN/A        return;
4201191SN/A
4211191SN/A    // if pc enters different function, print new function symbol and
4221191SN/A    // update saved range.  Otherwise do nothing.
4231191SN/A    if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
4241191SN/A        string sym_str;
4251191SN/A        bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
4261191SN/A                                                         currentFunctionStart,
4271191SN/A                                                         currentFunctionEnd);
4281191SN/A
4291191SN/A        if (!found) {
4301191SN/A            // no symbol found: use addr as label
4311191SN/A            sym_str = csprintf("0x%x", pc);
4321191SN/A            currentFunctionStart = pc;
4331191SN/A            currentFunctionEnd = pc + 1;
4341191SN/A        }
4351191SN/A
4361191SN/A        ccprintf(*functionTraceStream, " (%d)\n%d: %s",
4371191SN/A                 curTick - functionEntryTick, curTick, sym_str);
4381191SN/A        functionEntryTick = curTick;
4391191SN/A    }
4401191SN/A}
441