CheckerCPU.py revision 5529
111524Sdavid.guillen@arm.com# Copyright (c) 2007 The Regents of The University of Michigan 29157Sandreas.hansson@arm.com# All rights reserved. 39157Sandreas.hansson@arm.com# 49157Sandreas.hansson@arm.com# Redistribution and use in source and binary forms, with or without 59157Sandreas.hansson@arm.com# modification, are permitted provided that the following conditions are 69157Sandreas.hansson@arm.com# met: redistributions of source code must retain the above copyright 79157Sandreas.hansson@arm.com# notice, this list of conditions and the following disclaimer; 89157Sandreas.hansson@arm.com# redistributions in binary form must reproduce the above copyright 99157Sandreas.hansson@arm.com# notice, this list of conditions and the following disclaimer in the 109157Sandreas.hansson@arm.com# documentation and/or other materials provided with the distribution; 119157Sandreas.hansson@arm.com# neither the name of the copyright holders nor the names of its 129157Sandreas.hansson@arm.com# contributors may be used to endorse or promote products derived from 139157Sandreas.hansson@arm.com# this software without specific prior written permission. 149157Sandreas.hansson@arm.com# 159157Sandreas.hansson@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 169157Sandreas.hansson@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 179157Sandreas.hansson@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 189157Sandreas.hansson@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 199157Sandreas.hansson@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 209157Sandreas.hansson@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 219157Sandreas.hansson@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 229157Sandreas.hansson@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 239157Sandreas.hansson@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 249157Sandreas.hansson@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 259157Sandreas.hansson@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 269157Sandreas.hansson@arm.com# 279157Sandreas.hansson@arm.com# Authors: Nathan Binkert 289157Sandreas.hansson@arm.com 299157Sandreas.hansson@arm.comfrom m5.params import * 309157Sandreas.hansson@arm.comfrom m5 import build_env 319157Sandreas.hansson@arm.comfrom BaseCPU import BaseCPU 329157Sandreas.hansson@arm.com 339157Sandreas.hansson@arm.comclass CheckerCPU(BaseCPU): 349157Sandreas.hansson@arm.com type = 'CheckerCPU' 359157Sandreas.hansson@arm.com abstract = True 369157Sandreas.hansson@arm.com exitOnError = Param.Bool(False, "Exit on an error") 379157Sandreas.hansson@arm.com updateOnError = Param.Bool(False, 389157Sandreas.hansson@arm.com "Update the checker with the main CPU's state on an error") 399157Sandreas.hansson@arm.com warnOnlyOnLoadError = Param.Bool(False, 409281Sandreas.hansson@arm.com "If a load result is incorrect, only print a warning and do not exit") 419157Sandreas.hansson@arm.com function_trace = Param.Bool(False, "Enable function trace") 4211524Sdavid.guillen@arm.com function_trace_start = Param.Tick(0, "Cycle to start function trace") 4311524Sdavid.guillen@arm.com if build_env['FULL_SYSTEM']: 4411524Sdavid.guillen@arm.com profile = Param.Latency('0ns', "trace the kernel stack") 4511524Sdavid.guillen@arm.com