microasm.isa revision 6801 
1// -*- mode:c++ -*-
2
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56// Authors: Gabe Black
57
58//Include the definitions of the micro ops.
59//These are python representations of static insts which stand on their own
60//and make up an internal instruction set. They are used by the micro
61//assembler.
62##include "microops/microops.isa"
63
64//Include code to build macroops in both C++ and python.
65##include "macroop.isa"
66
67//Include code to fill out the microcode ROM in both C++ and python.
68##include "rom.isa"
69
70let {{
71    import sys
72    sys.path[0:0] = ["src/arch/x86/isa/"]
73    from insts import microcode
74    # print microcode
75    from micro_asm import MicroAssembler, Rom_Macroop
76    mainRom = X86MicrocodeRom('main ROM')
77    assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
78
79    def regIdx(idx):
80        return "InstRegIndex(%s)" % idx
81
82    assembler.symbols["regIdx"] = regIdx
83
84    # Add in symbols for the microcode registers
85    for num in range(16):
86        assembler.symbols["t%d" % num] = regIdx("NUM_INTREGS+%d" % num)
87    for num in range(8):
88        assembler.symbols["ufp%d" % num] = \
89            regIdx("FLOATREG_MICROFP(%d)" % num)
90    # Add in symbols for the segment descriptor registers
91    for letter in ("C", "D", "E", "F", "G", "H", "S"):
92        assembler.symbols["%ss" % letter.lower()] = \
93            regIdx("SEGMENT_REG_%sS" % letter)
94
95    # Add in symbols for the various checks of segment selectors.
96    for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
97                  "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
98                  "TRCheck", "TSSCheck", "InGDTCheck", "LDTCheck"):
99        assembler.symbols[check] = "Seg%s" % check
100
101    for reg in ("TR", "IDTR"):
102        assembler.symbols[reg.lower()] = regIdx("SYS_SEGMENT_REG_%s" % reg)
103
104    for reg in ("TSL", "TSG"):
105        assembler.symbols[reg.lower()] = regIdx("SEGMENT_REG_%s" % reg)
106
107    # Miscellaneous symbols
108    symbols = {
109        "reg" : regIdx("env.reg"),
110        "xmml" : regIdx("FLOATREG_XMM_LOW(env.reg)"),
111        "xmmh" : regIdx("FLOATREG_XMM_HIGH(env.reg)"),
112        "regm" : regIdx("env.regm"),
113        "xmmlm" : regIdx("FLOATREG_XMM_LOW(env.regm)"),
114        "xmmhm" : regIdx("FLOATREG_XMM_HIGH(env.regm)"),
115        "mmx" : regIdx("FLOATREG_MMX(env.reg)"),
116        "mmxm" : regIdx("FLOATREG_MMX(env.regm)"),
117        "imm" : "adjustedImm",
118        "disp" : "adjustedDisp",
119        "seg" : regIdx("env.seg"),
120        "scale" : "env.scale",
121        "index" : regIdx("env.index"),
122        "base" : regIdx("env.base"),
123        "dsz" : "env.dataSize",
124        "asz" : "env.addressSize",
125        "ssz" : "env.stackSize"
126    }
127    assembler.symbols.update(symbols)
128
129    assembler.symbols["ldsz"] = \
130        "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"
131
132    assembler.symbols["lasz"] = \
133        "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)"
134
135    assembler.symbols["lssz"] = \
136        "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)"
137
138    # Short hand for common scale-index-base combinations.
139    assembler.symbols["sib"] = \
140        [symbols["scale"], symbols["index"], symbols["base"]]
141    assembler.symbols["riprel"] = \
142        ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
143
144    # This segment selects an internal address space mapped to MSRs,
145    # CPUID info, etc.
146    assembler.symbols["intseg"] = regIdx("SEGMENT_REG_MS")
147    # This segment always has base 0, and doesn't imply any special handling
148    # like the internal segment above
149    assembler.symbols["flatseg"] = regIdx("SEGMENT_REG_LS")
150
151    for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
152                '8',  '9',  '10', '11', '12', '13', '14', '15'):
153        assembler.symbols["r%s" % reg] = \
154            regIdx("INTREG_R%s" % reg.upper())
155
156    for reg in ('ah', 'bh', 'ch', 'dh'):
157        assembler.symbols[reg] = \
158            regIdx("INTREG_FOLDED(INTREG_%s, IntFoldBit)" % reg.upper())
159
160    for reg in range(16):
161        assembler.symbols["cr%d" % reg] = regIdx("MISCREG_CR%d" % reg)
162
163    for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
164                 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
165        assembler.symbols[flag] = flag + "Bit"
166
167    for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
168                 'MSTRZ', 'STRZ', 'MSTRC',
169                 'OF', 'CF', 'ZF', 'CvZF',
170                 'SF', 'PF', 'SxOF', 'SxOvZF'):
171        assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
172        assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
173    assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
174    assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
175
176    assembler.symbols["CTrue"] = "ConditionTests::True"
177    assembler.symbols["CFalse"] = "ConditionTests::False"
178
179    for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
180                'star', 'lstar', 'cstar', 'sf_mask',
181                'kernel_gs_base'):
182        assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper())
183
184    for flag in ('Scalar', 'MultHi', 'Signed'):
185        assembler.symbols[flag] = 'Media%sOp' % flag
186
187    # Code literal which forces a default 64 bit operand size in 64 bit mode.
188    assembler.symbols["oszIn64Override"] = '''
189    if (machInst.mode.submode == SixtyFourBitMode &&
190            env.dataSize == 4)
191        env.dataSize = 8;
192    '''
193
194    assembler.symbols["maxOsz"] = '''
195    if (machInst.mode.submode == SixtyFourBitMode)
196        env.dataSize = 8;
197    else
198        env.dataSize = 4;
199    '''
200
201    def trimImm(width):
202        return "adjustedImm = adjustedImm & mask(%s);" % width
203
204    assembler.symbols["trimImm"] = trimImm
205
206    def labeler(labelStr):
207        return "label_%s" % labelStr
208
209    assembler.symbols["label"] = labeler
210
211    def rom_labeler(labelStr):
212        return "romMicroPC(RomLabels::extern_label_%s)" % labelStr
213
214    assembler.symbols["rom_label"] = rom_labeler
215
216    def rom_local_labeler(labelStr):
217        return "romMicroPC(RomLabels::label_%s)" % labelStr
218
219    assembler.symbols["rom_local_label"] = rom_local_labeler
220
221    def stack_index(index):
222        return regIdx("NUM_FLOATREGS + (((%s) + 8) %% 8)" % index)
223
224    assembler.symbols["st"] = stack_index
225    assembler.symbols["sti"] = stack_index("env.reg")
226    assembler.symbols["stim"] = stack_index("env.regm")
227
228    macroopDict = assembler.assemble(microcode)
229
230    decoder_output += mainRom.getDefinition()
231    header_output += mainRom.getDeclaration()
232}};
233