microasm.isa revision 5930:ec124ac0984b 
1// -*- mode:c++ -*-
2
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56// Authors: Gabe Black
57
58//Include the definitions of the micro ops.
59//These are python representations of static insts which stand on their own
60//and make up an internal instruction set. They are used by the micro
61//assembler.
62##include "microops/microops.isa"
63
64//Include code to build macroops in both C++ and python.
65##include "macroop.isa"
66
67//Include code to fill out the microcode ROM in both C++ and python.
68##include "rom.isa"
69
70let {{
71    import sys
72    sys.path[0:0] = ["src/arch/x86/isa/"]
73    from insts import microcode
74    # print microcode
75    from micro_asm import MicroAssembler, Rom_Macroop
76    mainRom = X86MicrocodeRom('main ROM')
77    assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
78    # Add in symbols for the microcode registers
79    for num in range(16):
80        assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
81    for num in range(8):
82        assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
83    # Add in symbols for the segment descriptor registers
84    for letter in ("C", "D", "E", "F", "G", "H", "S"):
85        assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
86
87    # Add in symbols for the various checks of segment selectors.
88    for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
89                  "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
90                  "TRCheck", "TSSCheck"):
91        assembler.symbols[check] = "Seg%s" % check
92
93    for reg in ("TR", "IDTR"):
94        assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg
95
96    for reg in ("TSL", "TSG"):
97        assembler.symbols[reg.lower()] = "SEGMENT_REG_%s" % reg
98
99    # Miscellaneous symbols
100    symbols = {
101        "reg" : "env.reg",
102        "xmml" : "FLOATREG_XMM_LOW(env.reg)",
103        "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
104        "regm" : "env.regm",
105        "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
106        "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",
107        "imm" : "adjustedImm",
108        "disp" : "adjustedDisp",
109        "seg" : "env.seg",
110        "scale" : "env.scale",
111        "index" : "env.index",
112        "base" : "env.base",
113        "dsz" : "env.dataSize",
114        "asz" : "env.addressSize",
115        "ssz" : "env.stackSize"
116    }
117    assembler.symbols.update(symbols)
118
119    assembler.symbols["ldsz"] = \
120        "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"
121
122    assembler.symbols["lasz"] = \
123        "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)"
124
125    assembler.symbols["lssz"] = \
126        "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)"
127
128    # Short hand for common scale-index-base combinations.
129    assembler.symbols["sib"] = \
130        [symbols["scale"], symbols["index"], symbols["base"]]
131    assembler.symbols["riprel"] = \
132        ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
133
134    # This segment selects an internal address space mapped to MSRs,
135    # CPUID info, etc.
136    assembler.symbols["intseg"] = "SEGMENT_REG_MS"
137    # This segment always has base 0, and doesn't imply any special handling
138    # like the internal segment above
139    assembler.symbols["flatseg"] = "SEGMENT_REG_LS"
140
141    for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
142                '8',  '9',  '10', '11', '12', '13', '14', '15'):
143        assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
144
145    for reg in range(16):
146        assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg
147
148    for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
149                 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
150        assembler.symbols[flag] = flag + "Bit"
151
152    for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
153                 'MSTRZ', 'STRZ', 'MSTRC',
154                 'OF', 'CF', 'ZF', 'CvZF',
155                 'SF', 'PF', 'SxOF', 'SxOvZF'):
156        assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
157        assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
158    assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
159    assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
160
161    assembler.symbols["CTrue"] = "ConditionTests::True"
162    assembler.symbols["CFalse"] = "ConditionTests::False"
163
164    for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
165                'star', 'lstar', 'cstar', 'sf_mask',
166                'kernel_gs_base'):
167        assembler.symbols[reg] = "MISCREG_%s" % reg.upper()
168
169    # Code literal which forces a default 64 bit operand size in 64 bit mode.
170    assembler.symbols["oszIn64Override"] = '''
171    if (machInst.mode.submode == SixtyFourBitMode &&
172            env.dataSize == 4)
173        env.dataSize = 8;
174    '''
175
176    assembler.symbols["maxOsz"] = '''
177    if (machInst.mode.submode == SixtyFourBitMode)
178        env.dataSize = 8;
179    else
180        env.dataSize = 4;
181    '''
182
183    def trimImm(width):
184        return "adjustedImm = adjustedImm & mask(%s);" % width
185
186    assembler.symbols["trimImm"] = trimImm
187
188    def labeler(labelStr):
189        return "label_%s" % labelStr
190
191    assembler.symbols["label"] = labeler
192
193    def rom_labeler(labelStr):
194        return "romMicroPC(RomLabels::extern_label_%s)" % labelStr
195
196    assembler.symbols["rom_label"] = rom_labeler
197
198    def rom_local_labeler(labelStr):
199        return "romMicroPC(RomLabels::label_%s)" % labelStr
200
201    assembler.symbols["rom_local_label"] = rom_local_labeler
202
203    def stack_index(index):
204        return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
205
206    assembler.symbols["st"] = stack_index
207
208    macroopDict = assembler.assemble(microcode)
209
210    decoder_output += mainRom.getDefinition()
211    header_output += mainRom.getDeclaration()
212}};
213