microasm.isa revision 9372
14309Sgblack@eecs.umich.edu// -*- mode:c++ -*- 24309Sgblack@eecs.umich.edu 35426Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 44309Sgblack@eecs.umich.edu// All rights reserved. 54309Sgblack@eecs.umich.edu// 67087Snate@binkert.org// The license below extends only to copyright in the software and shall 77087Snate@binkert.org// not be construed as granting a license to any other intellectual 87087Snate@binkert.org// property including but not limited to intellectual property relating 97087Snate@binkert.org// to a hardware implementation of the functionality of the software 107087Snate@binkert.org// licensed hereunder. You may use the software subject to the license 117087Snate@binkert.org// terms below provided that you ensure that this notice is replicated 127087Snate@binkert.org// unmodified and in its entirety in all distributions of the software, 137087Snate@binkert.org// modified or unmodified, in source code or in binary form. 144309Sgblack@eecs.umich.edu// 157087Snate@binkert.org// Redistribution and use in source and binary forms, with or without 167087Snate@binkert.org// modification, are permitted provided that the following conditions are 177087Snate@binkert.org// met: redistributions of source code must retain the above copyright 187087Snate@binkert.org// notice, this list of conditions and the following disclaimer; 197087Snate@binkert.org// redistributions in binary form must reproduce the above copyright 207087Snate@binkert.org// notice, this list of conditions and the following disclaimer in the 217087Snate@binkert.org// documentation and/or other materials provided with the distribution; 227087Snate@binkert.org// neither the name of the copyright holders nor the names of its 234309Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 247087Snate@binkert.org// this software without specific prior written permission. 254309Sgblack@eecs.umich.edu// 264309Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 274309Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 284309Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 294309Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 304309Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 314309Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 324309Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 334309Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 344309Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 354309Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 364309Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 374309Sgblack@eecs.umich.edu// 384309Sgblack@eecs.umich.edu// Authors: Gabe Black 394309Sgblack@eecs.umich.edu 404533Sgblack@eecs.umich.edu//Include the definitions of the micro ops. 414679Sgblack@eecs.umich.edu//These are python representations of static insts which stand on their own 424679Sgblack@eecs.umich.edu//and make up an internal instruction set. They are used by the micro 434679Sgblack@eecs.umich.edu//assembler. 444533Sgblack@eecs.umich.edu##include "microops/microops.isa" 454533Sgblack@eecs.umich.edu 464537Sgblack@eecs.umich.edu//Include code to build macroops in both C++ and python. 474533Sgblack@eecs.umich.edu##include "macroop.isa" 484528Sgblack@eecs.umich.edu 495666Sgblack@eecs.umich.edu//Include code to fill out the microcode ROM in both C++ and python. 505666Sgblack@eecs.umich.edu##include "rom.isa" 515666Sgblack@eecs.umich.edu 524528Sgblack@eecs.umich.edulet {{ 534528Sgblack@eecs.umich.edu import sys 544528Sgblack@eecs.umich.edu sys.path[0:0] = ["src/arch/x86/isa/"] 554528Sgblack@eecs.umich.edu from insts import microcode 564605Sgblack@eecs.umich.edu # print microcode 575666Sgblack@eecs.umich.edu from micro_asm import MicroAssembler, Rom_Macroop 585666Sgblack@eecs.umich.edu mainRom = X86MicrocodeRom('main ROM') 594528Sgblack@eecs.umich.edu assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop) 606345Sgblack@eecs.umich.edu 616345Sgblack@eecs.umich.edu def regIdx(idx): 626345Sgblack@eecs.umich.edu return "InstRegIndex(%s)" % idx 636345Sgblack@eecs.umich.edu 646345Sgblack@eecs.umich.edu assembler.symbols["regIdx"] = regIdx 656345Sgblack@eecs.umich.edu 664615Sgblack@eecs.umich.edu # Add in symbols for the microcode registers 675854Sgblack@eecs.umich.edu for num in range(16): 686345Sgblack@eecs.umich.edu assembler.symbols["t%d" % num] = regIdx("NUM_INTREGS+%d" % num) 695854Sgblack@eecs.umich.edu for num in range(8): 706345Sgblack@eecs.umich.edu assembler.symbols["ufp%d" % num] = \ 716345Sgblack@eecs.umich.edu regIdx("FLOATREG_MICROFP(%d)" % num) 724615Sgblack@eecs.umich.edu # Add in symbols for the segment descriptor registers 735671Sgblack@eecs.umich.edu for letter in ("C", "D", "E", "F", "G", "H", "S"): 746345Sgblack@eecs.umich.edu assembler.symbols["%ss" % letter.lower()] = \ 756345Sgblack@eecs.umich.edu regIdx("SEGMENT_REG_%sS" % letter) 765291Sgblack@eecs.umich.edu 775428Sgblack@eecs.umich.edu # Add in symbols for the various checks of segment selectors. 785674Sgblack@eecs.umich.edu for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck", 795899Sgblack@eecs.umich.edu "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck", 805936Sgblack@eecs.umich.edu "TRCheck", "TSSCheck", "InGDTCheck", "LDTCheck"): 815428Sgblack@eecs.umich.edu assembler.symbols[check] = "Seg%s" % check 825428Sgblack@eecs.umich.edu 835294Sgblack@eecs.umich.edu for reg in ("TR", "IDTR"): 846345Sgblack@eecs.umich.edu assembler.symbols[reg.lower()] = regIdx("SYS_SEGMENT_REG_%s" % reg) 855291Sgblack@eecs.umich.edu 865294Sgblack@eecs.umich.edu for reg in ("TSL", "TSG"): 876345Sgblack@eecs.umich.edu assembler.symbols[reg.lower()] = regIdx("SEGMENT_REG_%s" % reg) 885294Sgblack@eecs.umich.edu 894615Sgblack@eecs.umich.edu # Miscellaneous symbols 904615Sgblack@eecs.umich.edu symbols = { 916345Sgblack@eecs.umich.edu "reg" : regIdx("env.reg"), 926345Sgblack@eecs.umich.edu "xmml" : regIdx("FLOATREG_XMM_LOW(env.reg)"), 936345Sgblack@eecs.umich.edu "xmmh" : regIdx("FLOATREG_XMM_HIGH(env.reg)"), 946345Sgblack@eecs.umich.edu "regm" : regIdx("env.regm"), 956345Sgblack@eecs.umich.edu "xmmlm" : regIdx("FLOATREG_XMM_LOW(env.regm)"), 966345Sgblack@eecs.umich.edu "xmmhm" : regIdx("FLOATREG_XMM_HIGH(env.regm)"), 976517Sgblack@eecs.umich.edu "mmx" : regIdx("FLOATREG_MMX(env.reg)"), 986517Sgblack@eecs.umich.edu "mmxm" : regIdx("FLOATREG_MMX(env.regm)"), 995161Sgblack@eecs.umich.edu "imm" : "adjustedImm", 1005161Sgblack@eecs.umich.edu "disp" : "adjustedDisp", 1016345Sgblack@eecs.umich.edu "seg" : regIdx("env.seg"), 1024615Sgblack@eecs.umich.edu "scale" : "env.scale", 1036345Sgblack@eecs.umich.edu "index" : regIdx("env.index"), 1046345Sgblack@eecs.umich.edu "base" : regIdx("env.base"), 1054615Sgblack@eecs.umich.edu "dsz" : "env.dataSize", 1064953Sgblack@eecs.umich.edu "asz" : "env.addressSize", 1074615Sgblack@eecs.umich.edu "ssz" : "env.stackSize" 1084615Sgblack@eecs.umich.edu } 1094863Sgblack@eecs.umich.edu assembler.symbols.update(symbols) 1104863Sgblack@eecs.umich.edu 1115326Sgblack@eecs.umich.edu assembler.symbols["ldsz"] = \ 1125326Sgblack@eecs.umich.edu "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)" 1135326Sgblack@eecs.umich.edu 1145326Sgblack@eecs.umich.edu assembler.symbols["lasz"] = \ 1155326Sgblack@eecs.umich.edu "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)" 1165326Sgblack@eecs.umich.edu 1175326Sgblack@eecs.umich.edu assembler.symbols["lssz"] = \ 1185326Sgblack@eecs.umich.edu "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)" 1195326Sgblack@eecs.umich.edu 1204863Sgblack@eecs.umich.edu # Short hand for common scale-index-base combinations. 1214863Sgblack@eecs.umich.edu assembler.symbols["sib"] = \ 1224863Sgblack@eecs.umich.edu [symbols["scale"], symbols["index"], symbols["base"]] 1234863Sgblack@eecs.umich.edu assembler.symbols["riprel"] = \ 1244863Sgblack@eecs.umich.edu ["1", assembler.symbols["t0"], assembler.symbols["t7"]] 1254620Sgblack@eecs.umich.edu 1265149Sgblack@eecs.umich.edu # This segment selects an internal address space mapped to MSRs, 1275149Sgblack@eecs.umich.edu # CPUID info, etc. 1286345Sgblack@eecs.umich.edu assembler.symbols["intseg"] = regIdx("SEGMENT_REG_MS") 1295294Sgblack@eecs.umich.edu # This segment always has base 0, and doesn't imply any special handling 1305294Sgblack@eecs.umich.edu # like the internal segment above 1316345Sgblack@eecs.umich.edu assembler.symbols["flatseg"] = regIdx("SEGMENT_REG_LS") 1325149Sgblack@eecs.umich.edu 1335906Sgblack@eecs.umich.edu for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \ 1345906Sgblack@eecs.umich.edu '8', '9', '10', '11', '12', '13', '14', '15'): 1356345Sgblack@eecs.umich.edu assembler.symbols["r%s" % reg] = \ 1366345Sgblack@eecs.umich.edu regIdx("INTREG_R%s" % reg.upper()) 1374615Sgblack@eecs.umich.edu 1386457Sgblack@eecs.umich.edu for reg in ('ah', 'bh', 'ch', 'dh'): 1396457Sgblack@eecs.umich.edu assembler.symbols[reg] = \ 1406457Sgblack@eecs.umich.edu regIdx("INTREG_FOLDED(INTREG_%s, IntFoldBit)" % reg.upper()) 1416457Sgblack@eecs.umich.edu 1425854Sgblack@eecs.umich.edu for reg in range(16): 1436345Sgblack@eecs.umich.edu assembler.symbols["cr%d" % reg] = regIdx("MISCREG_CR%d" % reg) 1445241Sgblack@eecs.umich.edu 1455426Sgblack@eecs.umich.edu for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \ 1465426Sgblack@eecs.umich.edu 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'): 1474686Sgblack@eecs.umich.edu assembler.symbols[flag] = flag + "Bit" 1484686Sgblack@eecs.umich.edu 1494686Sgblack@eecs.umich.edu for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF', 1504953Sgblack@eecs.umich.edu 'MSTRZ', 'STRZ', 'MSTRC', 1514686Sgblack@eecs.umich.edu 'OF', 'CF', 'ZF', 'CvZF', 1524686Sgblack@eecs.umich.edu 'SF', 'PF', 'SxOF', 'SxOvZF'): 1534686Sgblack@eecs.umich.edu assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond 1544686Sgblack@eecs.umich.edu assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond 1554953Sgblack@eecs.umich.edu assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF" 1564953Sgblack@eecs.umich.edu assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF" 1574686Sgblack@eecs.umich.edu 1584686Sgblack@eecs.umich.edu assembler.symbols["CTrue"] = "ConditionTests::True" 1594686Sgblack@eecs.umich.edu assembler.symbols["CFalse"] = "ConditionTests::False" 1604686Sgblack@eecs.umich.edu 1615682Sgblack@eecs.umich.edu for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip', 1625682Sgblack@eecs.umich.edu 'star', 'lstar', 'cstar', 'sf_mask', 1635682Sgblack@eecs.umich.edu 'kernel_gs_base'): 1646345Sgblack@eecs.umich.edu assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper()) 1655682Sgblack@eecs.umich.edu 1666801Sgblack@eecs.umich.edu for flag in ('Scalar', 'MultHi', 'Signed'): 1676799Sgblack@eecs.umich.edu assembler.symbols[flag] = 'Media%sOp' % flag 1686799Sgblack@eecs.umich.edu 1694615Sgblack@eecs.umich.edu # Code literal which forces a default 64 bit operand size in 64 bit mode. 1704615Sgblack@eecs.umich.edu assembler.symbols["oszIn64Override"] = ''' 1714615Sgblack@eecs.umich.edu if (machInst.mode.submode == SixtyFourBitMode && 1724615Sgblack@eecs.umich.edu env.dataSize == 4) 1734615Sgblack@eecs.umich.edu env.dataSize = 8; 1744615Sgblack@eecs.umich.edu ''' 1754615Sgblack@eecs.umich.edu 1765930Sgblack@eecs.umich.edu assembler.symbols["maxOsz"] = ''' 1775291Sgblack@eecs.umich.edu if (machInst.mode.submode == SixtyFourBitMode) 1785291Sgblack@eecs.umich.edu env.dataSize = 8; 1795291Sgblack@eecs.umich.edu else 1805291Sgblack@eecs.umich.edu env.dataSize = 4; 1815291Sgblack@eecs.umich.edu ''' 1825291Sgblack@eecs.umich.edu 1835161Sgblack@eecs.umich.edu def trimImm(width): 1845161Sgblack@eecs.umich.edu return "adjustedImm = adjustedImm & mask(%s);" % width 1855161Sgblack@eecs.umich.edu 1865161Sgblack@eecs.umich.edu assembler.symbols["trimImm"] = trimImm 1875161Sgblack@eecs.umich.edu 1885008Sgblack@eecs.umich.edu def labeler(labelStr): 1895008Sgblack@eecs.umich.edu return "label_%s" % labelStr 1905008Sgblack@eecs.umich.edu 1915008Sgblack@eecs.umich.edu assembler.symbols["label"] = labeler 1925008Sgblack@eecs.umich.edu 1935667Sgblack@eecs.umich.edu def rom_labeler(labelStr): 1945667Sgblack@eecs.umich.edu return "romMicroPC(RomLabels::extern_label_%s)" % labelStr 1955667Sgblack@eecs.umich.edu 1965667Sgblack@eecs.umich.edu assembler.symbols["rom_label"] = rom_labeler 1975667Sgblack@eecs.umich.edu 1985676Sgblack@eecs.umich.edu def rom_local_labeler(labelStr): 1995676Sgblack@eecs.umich.edu return "romMicroPC(RomLabels::label_%s)" % labelStr 2005676Sgblack@eecs.umich.edu 2015676Sgblack@eecs.umich.edu assembler.symbols["rom_local_label"] = rom_local_labeler 2025676Sgblack@eecs.umich.edu 2035082Sgblack@eecs.umich.edu def stack_index(index): 2046345Sgblack@eecs.umich.edu return regIdx("NUM_FLOATREGS + (((%s) + 8) %% 8)" % index) 2055082Sgblack@eecs.umich.edu 2065082Sgblack@eecs.umich.edu assembler.symbols["st"] = stack_index 2076618Sgblack@eecs.umich.edu assembler.symbols["sti"] = stack_index("env.reg") 2086618Sgblack@eecs.umich.edu assembler.symbols["stim"] = stack_index("env.regm") 2095082Sgblack@eecs.umich.edu 2109372Snilay@cs.wisc.edu def readFpReg(reg_name): 2119372Snilay@cs.wisc.edu return regIdx("MISCREG_%s" % reg_name) 2129372Snilay@cs.wisc.edu 2139372Snilay@cs.wisc.edu assembler.symbols["fsw"] = readFpReg("FSW") 2149372Snilay@cs.wisc.edu assembler.symbols["fcw"] = readFpReg("FCW") 2159372Snilay@cs.wisc.edu 2164528Sgblack@eecs.umich.edu macroopDict = assembler.assemble(microcode) 2175666Sgblack@eecs.umich.edu 2185666Sgblack@eecs.umich.edu decoder_output += mainRom.getDefinition() 2195666Sgblack@eecs.umich.edu header_output += mainRom.getDeclaration() 2204528Sgblack@eecs.umich.edu}}; 221