microasm.isa revision 5082
14170SN/A// -*- mode:c++ -*-
24170SN/A
34170SN/A// Copyright (c) 2007 The Hewlett-Packard Development Company
410036SAli.Saidi@ARM.com// All rights reserved.
58835SAli.Saidi@ARM.com//
610036SAli.Saidi@ARM.com// Redistribution and use of this software in source and binary forms,
77935SN/A// with or without modification, are permitted provided that the
87935SN/A// following conditions are met:
97935SN/A//
104170SN/A// The software must be used only for Non-Commercial Use which means any
114170SN/A// use which is NOT directed to receiving any direct monetary
124170SN/A// compensation for, or commercial advantage from such use.  Illustrative
139885Sstever@gmail.com// examples of non-commercial use are academic research, personal study,
148835SAli.Saidi@ARM.com// teaching, education and corporate research & development.
159885Sstever@gmail.com// Illustrative examples of commercial use are distributing products for
169885Sstever@gmail.com// commercial advantage and providing services using the software for
1710036SAli.Saidi@ARM.com// commercial advantage.
188835SAli.Saidi@ARM.com//
198835SAli.Saidi@ARM.com// If you wish to use this software or functionality therein that may be
208835SAli.Saidi@ARM.com// covered by patents for commercial use, please contact:
214170SN/A//     Director of Intellectual Property Licensing
229481Snilay@cs.wisc.edu//     Office of Strategy and Technology
238721SN/A//     Hewlett-Packard Company
248721SN/A//     1501 Page Mill Road
258835SAli.Saidi@ARM.com//     Palo Alto, California  94304
268835SAli.Saidi@ARM.com//
277935SN/A// Redistributions of source code must retain the above copyright notice,
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337935SN/A// contributors may be used to endorse or promote products derived from
348983Snate@binkert.org// this software without specific prior written permission.  No right of
354170SN/A// sublicense is granted herewith.  Derivatives of the software and
369885Sstever@gmail.com// output created using the software may be prepared, but only for
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3910036SAli.Saidi@ARM.com// conditions herein which includes the Non-Commercial Use restrictions;
409885Sstever@gmail.com// and (ii) such Derivatives of the software include the above copyright
419885Sstever@gmail.com// notice to acknowledge the contribution from this software where
424170SN/A// applicable, this list of conditions and the disclaimer below.
434170SN/A//
449481Snilay@cs.wisc.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
455876SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
469885Sstever@gmail.com// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
474170SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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538983Snate@binkert.org// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
544170SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
554170SN/A//
568835SAli.Saidi@ARM.com// Authors: Gabe Black
579481Snilay@cs.wisc.edu
585000SN/A//Include the definitions of the micro ops.
594170SN/A//These are python representations of static insts which stand on their own
604170SN/A//and make up an internal instruction set. They are used by the micro
614170SN/A//assembler.
624170SN/A##include "microops/microops.isa"
635575SN/A
648835SAli.Saidi@ARM.com//Include code to build macroops in both C++ and python.
654170SN/A##include "macroop.isa"
669885Sstever@gmail.com
679885Sstever@gmail.comlet {{
689885Sstever@gmail.com    import sys
699885Sstever@gmail.com    sys.path[0:0] = ["src/arch/x86/isa/"]
705509SN/A    from insts import microcode
715509SN/A    # print microcode
729481Snilay@cs.wisc.edu    from micro_asm import MicroAssembler, Rom_Macroop, Rom
734170SN/A    mainRom = Rom('main ROM')
745000SN/A    assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
754170SN/A    # Add in symbols for the microcode registers
764170SN/A    for num in range(15):
778983Snate@binkert.org        assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
788983Snate@binkert.org    for num in range(7):
794170SN/A        assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
805000SN/A    # Add in symbols for the segment descriptor registers
816024SN/A    for letter in ("C", "D", "E", "F", "G", "S"):
8210036SAli.Saidi@ARM.com        assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
835000SN/A    # Miscellaneous symbols
845000SN/A    symbols = {
858835SAli.Saidi@ARM.com        "reg" : "env.reg",
868835SAli.Saidi@ARM.com        "xmml" : "FLOATREG_XMM_LOW(env.reg)",
8710036SAli.Saidi@ARM.com        "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
888835SAli.Saidi@ARM.com        "regm" : "env.regm",
899481Snilay@cs.wisc.edu        "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
909481Snilay@cs.wisc.edu        "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",
9110036SAli.Saidi@ARM.com        "imm" : "IMMEDIATE",
929481Snilay@cs.wisc.edu        "disp" : "DISPLACEMENT",
935000SN/A        "seg" : "env.seg",
946024SN/A        "scale" : "env.scale",
9510036SAli.Saidi@ARM.com        "index" : "env.index",
965000SN/A        "base" : "env.base",
975000SN/A        "dsz" : "env.dataSize",
985000SN/A        "asz" : "env.addressSize",
995000SN/A        "ssz" : "env.stackSize"
10010036SAli.Saidi@ARM.com    }
1015000SN/A    assembler.symbols.update(symbols)
1024170SN/A
1034170SN/A    # Short hand for common scale-index-base combinations.
1044170SN/A    assembler.symbols["sib"] = \
1054170SN/A        [symbols["scale"], symbols["index"], symbols["base"]]
1064170SN/A    assembler.symbols["riprel"] = \
1074170SN/A        ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
1085516SN/A
1094170SN/A    for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
11010036SAli.Saidi@ARM.com        assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
11110036SAli.Saidi@ARM.com
1124170SN/A    for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF'):
1134170SN/A        assembler.symbols[flag] = flag + "Bit"
1145285SN/A
1154170SN/A    for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
1164170SN/A                 'MSTRZ', 'STRZ', 'MSTRC',
1174170SN/A                 'OF', 'CF', 'ZF', 'CvZF',
1185509SN/A                 'SF', 'PF', 'SxOF', 'SxOvZF'):
1194170SN/A        assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
1204170SN/A        assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
1214170SN/A    assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
1229885Sstever@gmail.com    assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
1239885Sstever@gmail.com
1249885Sstever@gmail.com    assembler.symbols["CTrue"] = "ConditionTests::True"
12510036SAli.Saidi@ARM.com    assembler.symbols["CFalse"] = "ConditionTests::False"
1269885Sstever@gmail.com
1279885Sstever@gmail.com    # Code literal which forces a default 64 bit operand size in 64 bit mode.
1284170SN/A    assembler.symbols["oszIn64Override"] = '''
1299055Ssaidi@eecs.umich.edu    if (machInst.mode.submode == SixtyFourBitMode &&
1309885Sstever@gmail.com            env.dataSize == 4)
13110036SAli.Saidi@ARM.com        env.dataSize = 8;
1325509SN/A    '''
1339885Sstever@gmail.com
1347524SN/A    def labeler(labelStr):
1359150SAli.Saidi@ARM.com        return "label_%s" % labelStr
1369150SAli.Saidi@ARM.com
1378983Snate@binkert.org    assembler.symbols["label"] = labeler
1384170SN/A
1394170SN/A    def stack_index(index):
1408983Snate@binkert.org        return "(NUM_FLOATREGS + (%s))" % index
1419276Snilay@cs.wisc.edu
1429885Sstever@gmail.com    assembler.symbols["st"] = stack_index
1439885Sstever@gmail.com
14410036SAli.Saidi@ARM.com    macroopDict = assembler.assemble(microcode)
1458983Snate@binkert.org}};
1465575SN/A