microregop.cc revision 4954:17d8fe61258e 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
9 * The software must be used only for Non-Commercial Use which means any
10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use.  Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
16 * commercial advantage.
17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 *     Director of Intellectual Property Licensing
21 *     Office of Strategy and Technology
22 *     Hewlett-Packard Company
23 *     1501 Page Mill Road
24 *     Palo Alto, California  94304
25 *
26 * Redistributions of source code must retain the above copyright notice,
27 * this list of conditions and the following disclaimer.  Redistributions
28 * in binary form must reproduce the above copyright notice, this list of
29 * conditions and the following disclaimer in the documentation and/or
30 * other materials provided with the distribution.  Neither the name of
31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
32 * contributors may be used to endorse or promote products derived from
33 * this software without specific prior written permission.  No right of
34 * sublicense is granted herewith.  Derivatives of the software and
35 * output created using the software may be prepared, but only for
36 * Non-Commercial Uses.  Derivatives of the software may be shared with
37 * others provided: (i) the others agree to abide by the list of
38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58#include "arch/x86/insts/microregop.hh"
59#include "arch/x86/miscregs.hh"
60#include "base/condcodes.hh"
61#include <string>
62
63namespace X86ISA
64{
65    uint64_t RegOpBase::genFlags(uint64_t oldFlags, uint64_t flagMask,
66            uint64_t _dest, uint64_t _src1, uint64_t _src2,
67            bool subtract) const
68    {
69        DPRINTF(Sparc, "flagMask = %#x\n", flagMask);
70        uint64_t flags = oldFlags & ~flagMask;
71        if(flagMask & CFBit)
72        {
73            if(findCarry(dataSize*8, _dest, _src1, _src2))
74                flags |= CFBit;
75            if(subtract)
76                flags ^= CFBit;
77        }
78        if(flagMask & PFBit && findParity(dataSize*8, _dest))
79            flags |= PFBit;
80        if(flagMask & ECFBit && findCarry(dataSize*8, _dest, _src1, _src2))
81            flags |= ECFBit;
82        if(flagMask & AFBit)
83        {
84            if(findCarry(4, _dest, _src1, _src2))
85                flags |= AFBit;
86            if(subtract)
87                flags ^= AFBit;
88        }
89        if(flagMask & EZFBit && findZero(dataSize*8, _dest))
90            flags |= EZFBit;
91        if(flagMask & ZFBit && findZero(dataSize*8, _dest))
92            flags |= ZFBit;
93        if(flagMask & SFBit && findNegative(dataSize*8, _dest))
94            flags |= SFBit;
95        if(flagMask & OFBit && findOverflow(dataSize*8, _dest, _src1, _src2))
96            flags |= OFBit;
97        return flags;
98    }
99
100    bool RegOpBase::checkCondition(uint64_t flags) const
101    {
102        CCFlagBits ccflags = flags;
103        switch(ext)
104        {
105          case ConditionTests::True:
106            return true;
107          case ConditionTests::ECF:
108            return ccflags.ECF;
109          case ConditionTests::EZF:
110            return ccflags.EZF;
111          case ConditionTests::SZnZF:
112            return !(!ccflags.EZF & ccflags.ZF);
113          case ConditionTests::MSTRZ:
114            panic("This condition is not implemented!");
115          case ConditionTests::STRZ:
116            panic("This condition is not implemented!");
117          case ConditionTests::MSTRC:
118            panic("This condition is not implemented!");
119          case ConditionTests::STRZnEZF:
120            return !ccflags.EZF & ccflags.ZF;
121                //And no interrupts or debug traps are waiting
122          case ConditionTests::OF:
123            return ccflags.OF;
124          case ConditionTests::CF:
125            return ccflags.CF;
126          case ConditionTests::ZF:
127            return ccflags.ZF;
128          case ConditionTests::CvZF:
129            return ccflags.CF | ccflags.ZF;
130          case ConditionTests::SF:
131            return ccflags.SF;
132          case ConditionTests::PF:
133            return ccflags.PF;
134          case ConditionTests::SxOF:
135            return ccflags.SF ^ ccflags.OF;
136          case ConditionTests::SxOvZF:
137            return ccflags.SF ^ ccflags.OF | ccflags.ZF;
138          case ConditionTests::False:
139            return false;
140          case ConditionTests::NotECF:
141            return !ccflags.ECF;
142          case ConditionTests::NotEZF:
143            return !ccflags.EZF;
144          case ConditionTests::NotSZnZF:
145            return !ccflags.EZF & ccflags.ZF;
146          case ConditionTests::NotMSTRZ:
147            panic("This condition is not implemented!");
148          case ConditionTests::NotSTRZ:
149            panic("This condition is not implemented!");
150          case ConditionTests::NotMSTRC:
151            panic("This condition is not implemented!");
152          case ConditionTests::STRnZnEZF:
153            return !ccflags.EZF & !ccflags.ZF;
154                //And no interrupts or debug traps are waiting
155          case ConditionTests::NotOF:
156            return !ccflags.OF;
157          case ConditionTests::NotCF:
158            return !ccflags.CF;
159          case ConditionTests::NotZF:
160            return !ccflags.ZF;
161          case ConditionTests::NotCvZF:
162            return !(ccflags.CF | ccflags.ZF);
163          case ConditionTests::NotSF:
164            return !ccflags.SF;
165          case ConditionTests::NotPF:
166            return !ccflags.PF;
167          case ConditionTests::NotSxOF:
168            return !(ccflags.SF ^ ccflags.OF);
169          case ConditionTests::NotSxOvZF:
170            return !(ccflags.SF ^ ccflags.OF | ccflags.ZF);
171        }
172        panic("Unknown condition: %d\n", ext);
173        return true;
174    }
175
176    std::string RegOp::generateDisassembly(Addr pc,
177            const SymbolTable *symtab) const
178    {
179        std::stringstream response;
180
181        printMnemonic(response, instMnem, mnemonic);
182        printDestReg(response, 0, dataSize);
183        response << ", ";
184        printSrcReg(response, 0, dataSize);
185        response << ", ";
186        printSrcReg(response, 1, dataSize);
187        return response.str();
188    }
189
190    std::string RegOpImm::generateDisassembly(Addr pc,
191            const SymbolTable *symtab) const
192    {
193        std::stringstream response;
194
195        printMnemonic(response, instMnem, mnemonic);
196        printDestReg(response, 0, dataSize);
197        response << ", ";
198        printSrcReg(response, 0, dataSize);
199        ccprintf(response, ", %#x", imm8);
200        return response.str();
201    }
202}
203