microldstop.hh revision 4767:5e55d650692e
12381SN/A/* 22592SN/A * Copyright (c) 2007 The Hewlett-Packard Development Company 32381SN/A * All rights reserved. 42381SN/A * 52381SN/A * Redistribution and use of this software in source and binary forms, 62381SN/A * with or without modification, are permitted provided that the 72381SN/A * following conditions are met: 82381SN/A * 92381SN/A * The software must be used only for Non-Commercial Use which means any 102381SN/A * use which is NOT directed to receiving any direct monetary 112381SN/A * compensation for, or commercial advantage from such use. Illustrative 122381SN/A * examples of non-commercial use are academic research, personal study, 132381SN/A * teaching, education and corporate research & development. 142381SN/A * Illustrative examples of commercial use are distributing products for 152381SN/A * commercial advantage and providing services using the software for 162381SN/A * commercial advantage. 172381SN/A * 182381SN/A * If you wish to use this software or functionality therein that may be 192381SN/A * covered by patents for commercial use, please contact: 202381SN/A * Director of Intellectual Property Licensing 212381SN/A * Office of Strategy and Technology 222381SN/A * Hewlett-Packard Company 232381SN/A * 1501 Page Mill Road 242381SN/A * Palo Alto, California 94304 252381SN/A * 262381SN/A * Redistributions of source code must retain the above copyright notice, 272665Ssaidi@eecs.umich.edu * this list of conditions and the following disclaimer. Redistributions 282665Ssaidi@eecs.umich.edu * in binary form must reproduce the above copyright notice, this list of 292665Ssaidi@eecs.umich.edu * conditions and the following disclaimer in the documentation and/or 302665Ssaidi@eecs.umich.edu * other materials provided with the distribution. Neither the name of 312381SN/A * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 322381SN/A * contributors may be used to endorse or promote products derived from 332381SN/A * this software without specific prior written permission. No right of 342381SN/A * sublicense is granted herewith. Derivatives of the software and 352662Sstever@eecs.umich.edu * output created using the software may be prepared, but only for 362381SN/A * Non-Commercial Uses. Derivatives of the software may be shared with 372381SN/A * others provided: (i) the others agree to abide by the list of 382381SN/A * conditions herein which includes the Non-Commercial Use restrictions; 392381SN/A * and (ii) such Derivatives of the software include the above copyright 402381SN/A * notice to acknowledge the contribution from this software where 413348Sbinkertn@umich.edu * applicable, this list of conditions and the disclaimer below. 423348Sbinkertn@umich.edu * 434022Sstever@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 443348Sbinkertn@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 453940Ssaidi@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 462392SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 472980Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 482394SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 492394SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 503940Ssaidi@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 512394SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 523349Sbinkertn@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 532394SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 542812Srdreslin@umich.edu * 552812Srdreslin@umich.edu * Authors: Gabe Black 562812Srdreslin@umich.edu */ 573366Sstever@eecs.umich.edu 583366Sstever@eecs.umich.edu#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__ 593366Sstever@eecs.umich.edu#define __ARCH_X86_INSTS_MICROLDSTOP_HH__ 603366Sstever@eecs.umich.edu 613366Sstever@eecs.umich.edu#include "arch/x86/insts/microop.hh" 623366Sstever@eecs.umich.edu 633366Sstever@eecs.umich.edunamespace X86ISA 642382SN/A{ 654022Sstever@eecs.umich.edu /** 664022Sstever@eecs.umich.edu * Base class for load and store ops 674022Sstever@eecs.umich.edu */ 684022Sstever@eecs.umich.edu class LdStOp : public X86MicroopBase 694022Sstever@eecs.umich.edu { 704022Sstever@eecs.umich.edu protected: 714022Sstever@eecs.umich.edu const uint8_t scale; 724022Sstever@eecs.umich.edu const RegIndex index; 734022Sstever@eecs.umich.edu const RegIndex base; 744022Sstever@eecs.umich.edu const uint64_t disp; 754022Sstever@eecs.umich.edu const uint8_t segment; 764022Sstever@eecs.umich.edu const RegIndex data; 774022Sstever@eecs.umich.edu const uint8_t dataSize; 784022Sstever@eecs.umich.edu const uint8_t addressSize; 794022Sstever@eecs.umich.edu 804022Sstever@eecs.umich.edu //Constructor 814022Sstever@eecs.umich.edu LdStOp(ExtMachInst _machInst, 824022Sstever@eecs.umich.edu const char * mnem, const char * _instMnem, 834022Sstever@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 844022Sstever@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 854022Sstever@eecs.umich.edu uint64_t _disp, uint8_t _segment, 864022Sstever@eecs.umich.edu RegIndex _data, 874022Sstever@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 884022Sstever@eecs.umich.edu OpClass __opClass) : 894022Sstever@eecs.umich.edu X86MicroopBase(machInst, mnem, _instMnem, 904022Sstever@eecs.umich.edu isMicro, isDelayed, isFirst, isLast, __opClass), 914022Sstever@eecs.umich.edu scale(_scale), index(_index), base(_base), 924022Sstever@eecs.umich.edu disp(_disp), segment(_segment), 934022Sstever@eecs.umich.edu data(_data), 944022Sstever@eecs.umich.edu dataSize(_dataSize), addressSize(_addressSize) 954022Sstever@eecs.umich.edu {} 964022Sstever@eecs.umich.edu 974022Sstever@eecs.umich.edu std::string generateDisassembly(Addr pc, 984022Sstever@eecs.umich.edu const SymbolTable *symtab) const; 994022Sstever@eecs.umich.edu 1004022Sstever@eecs.umich.edu template<class Context, class MemType> 1014022Sstever@eecs.umich.edu Fault read(Context *xc, Addr EA, MemType & Mem, unsigned flags) const 1024022Sstever@eecs.umich.edu { 1034022Sstever@eecs.umich.edu Fault fault = NoFault; 1044022Sstever@eecs.umich.edu int size = dataSize; 1054022Sstever@eecs.umich.edu Addr alignedEA = EA & ~(dataSize - 1); 1064022Sstever@eecs.umich.edu if (EA != alignedEA) 1074022Sstever@eecs.umich.edu size *= 2; 1084022Sstever@eecs.umich.edu switch(size) 1094022Sstever@eecs.umich.edu { 1104022Sstever@eecs.umich.edu case 1: 1114022Sstever@eecs.umich.edu fault = xc->read(alignedEA, (uint8_t&)Mem, flags); 1124022Sstever@eecs.umich.edu break; 1134022Sstever@eecs.umich.edu case 2: 1144022Sstever@eecs.umich.edu fault = xc->read(alignedEA, (uint16_t&)Mem, flags); 1154022Sstever@eecs.umich.edu break; 1164022Sstever@eecs.umich.edu case 4: 1174022Sstever@eecs.umich.edu fault = xc->read(alignedEA, (uint32_t&)Mem, flags); 1184022Sstever@eecs.umich.edu break; 1194022Sstever@eecs.umich.edu case 8: 1204022Sstever@eecs.umich.edu fault = xc->read(alignedEA, (uint64_t&)Mem, flags); 1214022Sstever@eecs.umich.edu break; 1224022Sstever@eecs.umich.edu default: 1234022Sstever@eecs.umich.edu panic("Bad operand size %d!\n", size); 1244022Sstever@eecs.umich.edu } 1254022Sstever@eecs.umich.edu return fault; 1264022Sstever@eecs.umich.edu } 1274022Sstever@eecs.umich.edu 1284022Sstever@eecs.umich.edu template<class Context, class MemType> 1294022Sstever@eecs.umich.edu Fault write(Context *xc, MemType & Mem, Addr EA, unsigned flags) const 1304022Sstever@eecs.umich.edu { 1314022Sstever@eecs.umich.edu Fault fault = NoFault; 1324022Sstever@eecs.umich.edu int size = dataSize; 1334022Sstever@eecs.umich.edu Addr alignedEA = EA & ~(dataSize - 1); 1344022Sstever@eecs.umich.edu if (EA != alignedEA) 1354022Sstever@eecs.umich.edu size *= 2; 1364022Sstever@eecs.umich.edu switch(size) 1374022Sstever@eecs.umich.edu { 1384022Sstever@eecs.umich.edu case 1: 1394022Sstever@eecs.umich.edu fault = xc->write((uint8_t&)Mem, alignedEA, flags, 0); 1404022Sstever@eecs.umich.edu break; 1414022Sstever@eecs.umich.edu case 2: 1424022Sstever@eecs.umich.edu fault = xc->write((uint16_t&)Mem, alignedEA, flags, 0); 1434022Sstever@eecs.umich.edu break; 1444022Sstever@eecs.umich.edu case 4: 1454022Sstever@eecs.umich.edu fault = xc->write((uint32_t&)Mem, alignedEA, flags, 0); 1464022Sstever@eecs.umich.edu break; 1474022Sstever@eecs.umich.edu case 8: 1484022Sstever@eecs.umich.edu fault = xc->write((uint64_t&)Mem, alignedEA, flags, 0); 1494022Sstever@eecs.umich.edu break; 1504022Sstever@eecs.umich.edu default: 1514022Sstever@eecs.umich.edu panic("Bad operand size %d!\n", size); 1524022Sstever@eecs.umich.edu } 1534022Sstever@eecs.umich.edu return fault; 1544022Sstever@eecs.umich.edu } 1554022Sstever@eecs.umich.edu }; 1564022Sstever@eecs.umich.edu} 1574022Sstever@eecs.umich.edu 1584022Sstever@eecs.umich.edu#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__ 1594022Sstever@eecs.umich.edu