microldstop.hh revision 7620
14679Sgblack@eecs.umich.edu/* 24679Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company 34679Sgblack@eecs.umich.edu * All rights reserved. 44679Sgblack@eecs.umich.edu * 57087Snate@binkert.org * The license below extends only to copyright in the software and shall 67087Snate@binkert.org * not be construed as granting a license to any other intellectual 77087Snate@binkert.org * property including but not limited to intellectual property relating 87087Snate@binkert.org * to a hardware implementation of the functionality of the software 97087Snate@binkert.org * licensed hereunder. You may use the software subject to the license 107087Snate@binkert.org * terms below provided that you ensure that this notice is replicated 117087Snate@binkert.org * unmodified and in its entirety in all distributions of the software, 127087Snate@binkert.org * modified or unmodified, in source code or in binary form. 134679Sgblack@eecs.umich.edu * 147087Snate@binkert.org * Redistribution and use in source and binary forms, with or without 157087Snate@binkert.org * modification, are permitted provided that the following conditions are 167087Snate@binkert.org * met: redistributions of source code must retain the above copyright 177087Snate@binkert.org * notice, this list of conditions and the following disclaimer; 187087Snate@binkert.org * redistributions in binary form must reproduce the above copyright 197087Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 207087Snate@binkert.org * documentation and/or other materials provided with the distribution; 217087Snate@binkert.org * neither the name of the copyright holders nor the names of its 224679Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 237087Snate@binkert.org * this software without specific prior written permission. 244679Sgblack@eecs.umich.edu * 254679Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 264679Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 274679Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 284679Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 294679Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 304679Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 314679Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 324679Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 334679Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 344679Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 354679Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 364679Sgblack@eecs.umich.edu * 374679Sgblack@eecs.umich.edu * Authors: Gabe Black 384679Sgblack@eecs.umich.edu */ 394679Sgblack@eecs.umich.edu 404679Sgblack@eecs.umich.edu#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__ 414679Sgblack@eecs.umich.edu#define __ARCH_X86_INSTS_MICROLDSTOP_HH__ 424679Sgblack@eecs.umich.edu 434679Sgblack@eecs.umich.edu#include "arch/x86/insts/microop.hh" 445727Sgblack@eecs.umich.edu#include "mem/packet.hh" 455912Sgblack@eecs.umich.edu#include "mem/request.hh" 464679Sgblack@eecs.umich.edu 474679Sgblack@eecs.umich.edunamespace X86ISA 484679Sgblack@eecs.umich.edu{ 496622Snate@binkert.org const Request::FlagsType SegmentFlagMask = mask(4); 506622Snate@binkert.org const int FlagShift = 4; 515912Sgblack@eecs.umich.edu enum FlagBit { 525965Sgblack@eecs.umich.edu CPL0FlagBit = 1, 536132Sgblack@eecs.umich.edu AddrSizeFlagBit = 2, 546132Sgblack@eecs.umich.edu StoreCheck = 4 555912Sgblack@eecs.umich.edu }; 565912Sgblack@eecs.umich.edu 574679Sgblack@eecs.umich.edu /** 584679Sgblack@eecs.umich.edu * Base class for load and store ops 594679Sgblack@eecs.umich.edu */ 604679Sgblack@eecs.umich.edu class LdStOp : public X86MicroopBase 614679Sgblack@eecs.umich.edu { 624679Sgblack@eecs.umich.edu protected: 634679Sgblack@eecs.umich.edu const uint8_t scale; 644679Sgblack@eecs.umich.edu const RegIndex index; 654679Sgblack@eecs.umich.edu const RegIndex base; 664679Sgblack@eecs.umich.edu const uint64_t disp; 674679Sgblack@eecs.umich.edu const uint8_t segment; 684679Sgblack@eecs.umich.edu const RegIndex data; 694679Sgblack@eecs.umich.edu const uint8_t dataSize; 704679Sgblack@eecs.umich.edu const uint8_t addressSize; 715912Sgblack@eecs.umich.edu const Request::FlagsType memFlags; 724804Sgblack@eecs.umich.edu RegIndex foldOBit, foldABit; 734679Sgblack@eecs.umich.edu 744679Sgblack@eecs.umich.edu //Constructor 754679Sgblack@eecs.umich.edu LdStOp(ExtMachInst _machInst, 764679Sgblack@eecs.umich.edu const char * mnem, const char * _instMnem, 777620Sgblack@eecs.umich.edu uint64_t setFlags, 786345Sgblack@eecs.umich.edu uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 796345Sgblack@eecs.umich.edu uint64_t _disp, InstRegIndex _segment, 806345Sgblack@eecs.umich.edu InstRegIndex _data, 814679Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 825912Sgblack@eecs.umich.edu Request::FlagsType _memFlags, 834679Sgblack@eecs.umich.edu OpClass __opClass) : 847620Sgblack@eecs.umich.edu X86MicroopBase(machInst, mnem, _instMnem, setFlags, __opClass), 856345Sgblack@eecs.umich.edu scale(_scale), index(_index.idx), base(_base.idx), 866345Sgblack@eecs.umich.edu disp(_disp), segment(_segment.idx), 876345Sgblack@eecs.umich.edu data(_data.idx), 885912Sgblack@eecs.umich.edu dataSize(_dataSize), addressSize(_addressSize), 896345Sgblack@eecs.umich.edu memFlags(_memFlags | _segment.idx) 904804Sgblack@eecs.umich.edu { 916345Sgblack@eecs.umich.edu assert(_segment.idx < NUM_SEGMENTREGS); 924804Sgblack@eecs.umich.edu foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 934804Sgblack@eecs.umich.edu foldABit = 944804Sgblack@eecs.umich.edu (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 954804Sgblack@eecs.umich.edu } 964679Sgblack@eecs.umich.edu 974679Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, 984679Sgblack@eecs.umich.edu const SymbolTable *symtab) const; 994767Sgblack@eecs.umich.edu 1004767Sgblack@eecs.umich.edu template<class Context, class MemType> 1014767Sgblack@eecs.umich.edu Fault read(Context *xc, Addr EA, MemType & Mem, unsigned flags) const 1024767Sgblack@eecs.umich.edu { 1034767Sgblack@eecs.umich.edu Fault fault = NoFault; 1045002Sgblack@eecs.umich.edu switch(dataSize) 1054767Sgblack@eecs.umich.edu { 1064767Sgblack@eecs.umich.edu case 1: 1075002Sgblack@eecs.umich.edu fault = xc->read(EA, (uint8_t&)Mem, flags); 1084767Sgblack@eecs.umich.edu break; 1094767Sgblack@eecs.umich.edu case 2: 1105002Sgblack@eecs.umich.edu fault = xc->read(EA, (uint16_t&)Mem, flags); 1114767Sgblack@eecs.umich.edu break; 1124767Sgblack@eecs.umich.edu case 4: 1135002Sgblack@eecs.umich.edu fault = xc->read(EA, (uint32_t&)Mem, flags); 1144767Sgblack@eecs.umich.edu break; 1154767Sgblack@eecs.umich.edu case 8: 1165002Sgblack@eecs.umich.edu fault = xc->read(EA, (uint64_t&)Mem, flags); 1174767Sgblack@eecs.umich.edu break; 1184767Sgblack@eecs.umich.edu default: 1195002Sgblack@eecs.umich.edu panic("Bad operand size %d for read at %#x.\n", dataSize, EA); 1204767Sgblack@eecs.umich.edu } 1214767Sgblack@eecs.umich.edu return fault; 1224767Sgblack@eecs.umich.edu } 1234767Sgblack@eecs.umich.edu 1244767Sgblack@eecs.umich.edu template<class Context, class MemType> 1254767Sgblack@eecs.umich.edu Fault write(Context *xc, MemType & Mem, Addr EA, unsigned flags) const 1264767Sgblack@eecs.umich.edu { 1274767Sgblack@eecs.umich.edu Fault fault = NoFault; 1285002Sgblack@eecs.umich.edu switch(dataSize) 1294767Sgblack@eecs.umich.edu { 1304767Sgblack@eecs.umich.edu case 1: 1315002Sgblack@eecs.umich.edu fault = xc->write((uint8_t&)Mem, EA, flags, 0); 1324767Sgblack@eecs.umich.edu break; 1334767Sgblack@eecs.umich.edu case 2: 1345002Sgblack@eecs.umich.edu fault = xc->write((uint16_t&)Mem, EA, flags, 0); 1354767Sgblack@eecs.umich.edu break; 1364767Sgblack@eecs.umich.edu case 4: 1375002Sgblack@eecs.umich.edu fault = xc->write((uint32_t&)Mem, EA, flags, 0); 1384767Sgblack@eecs.umich.edu break; 1394767Sgblack@eecs.umich.edu case 8: 1405002Sgblack@eecs.umich.edu fault = xc->write((uint64_t&)Mem, EA, flags, 0); 1414767Sgblack@eecs.umich.edu break; 1424767Sgblack@eecs.umich.edu default: 1435002Sgblack@eecs.umich.edu panic("Bad operand size %d for write at %#x.\n", dataSize, EA); 1444767Sgblack@eecs.umich.edu } 1454767Sgblack@eecs.umich.edu return fault; 1464767Sgblack@eecs.umich.edu } 1475727Sgblack@eecs.umich.edu 1485727Sgblack@eecs.umich.edu uint64_t 1495727Sgblack@eecs.umich.edu get(PacketPtr pkt) const 1505727Sgblack@eecs.umich.edu { 1515727Sgblack@eecs.umich.edu switch(dataSize) 1525727Sgblack@eecs.umich.edu { 1535727Sgblack@eecs.umich.edu case 1: 1545727Sgblack@eecs.umich.edu return pkt->get<uint8_t>(); 1555727Sgblack@eecs.umich.edu case 2: 1565727Sgblack@eecs.umich.edu return pkt->get<uint16_t>(); 1575727Sgblack@eecs.umich.edu case 4: 1585727Sgblack@eecs.umich.edu return pkt->get<uint32_t>(); 1595727Sgblack@eecs.umich.edu case 8: 1605727Sgblack@eecs.umich.edu return pkt->get<uint64_t>(); 1615727Sgblack@eecs.umich.edu default: 1625727Sgblack@eecs.umich.edu panic("Bad operand size %d for read at %#x.\n", 1635727Sgblack@eecs.umich.edu dataSize, pkt->getAddr()); 1645727Sgblack@eecs.umich.edu } 1655727Sgblack@eecs.umich.edu } 1664679Sgblack@eecs.umich.edu }; 1674679Sgblack@eecs.umich.edu} 1684679Sgblack@eecs.umich.edu 1694679Sgblack@eecs.umich.edu#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__ 170