faults.hh revision 5114
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
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5 * Redistribution and use of this software in source and binary forms,
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35 * output created using the software may be prepared, but only for
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39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_FAULTS_HH__
59#define __ARCH_X86_FAULTS_HH__
60
61#include "base/misc.hh"
62#include "sim/faults.hh"
63
64namespace X86ISA
65{
66    // Base class for all x86 "faults" where faults is in the m5 sense
67    class X86FaultBase : public FaultBase
68    {
69      protected:
70        const char * faultName;
71        const char * mnem;
72
73        X86FaultBase(const char * _faultName, const char * _mnem) :
74            faultName(_faultName), mnem(_mnem)
75        {
76        }
77
78        const char * name() const
79        {
80            return faultName;
81        }
82
83        virtual bool isBenign()
84        {
85            return true;
86        }
87
88        virtual const char * mnemonic() const
89        {
90            return mnem;
91        }
92    };
93
94    // Base class for x86 faults which behave as if the underlying instruction
95    // didn't happen.
96    class X86Fault : public X86FaultBase
97    {
98      protected:
99        X86Fault(const char * name, const char * mnem) :
100            X86FaultBase(name, mnem)
101        {}
102    };
103
104    // Base class for x86 traps which behave as if the underlying instruction
105    // completed.
106    class X86Trap : public X86FaultBase
107    {
108      protected:
109        X86Trap(const char * name, const char * mnem) :
110            X86FaultBase(name, mnem)
111        {}
112
113#if FULL_SYSTEM
114        void invoke(ThreadContext * tc)
115        {
116            panic("X86 faults are not implemented!");
117        }
118#endif
119    };
120
121    // Base class for x86 aborts which seem to be catastrophic failures.
122    class X86Abort : public X86FaultBase
123    {
124      protected:
125        X86Abort(const char * name, const char * mnem) :
126            X86FaultBase(name, mnem)
127        {}
128
129#if FULL_SYSTEM
130        void invoke(ThreadContext * tc)
131        {
132            panic("X86 faults are not implemented!");
133        }
134#endif
135    };
136
137    // Base class for x86 interrupts.
138    class X86Interrupt : public X86FaultBase
139    {
140      protected:
141        X86Interrupt(const char * name, const char * mnem) :
142            X86FaultBase(name, mnem)
143        {}
144
145#if FULL_SYSTEM
146        void invoke(ThreadContext * tc)
147        {
148            panic("X86 faults are not implemented!");
149        }
150#endif
151    };
152
153    class UnimpInstFault : public FaultBase
154    {
155      public:
156        const char * name() const
157        {
158            return "unimplemented_micro";
159        }
160
161        void invoke(ThreadContext * tc)
162        {
163            panic("Unimplemented instruction!");
164        }
165    };
166
167    static inline Fault genMachineCheckFault()
168    {
169        panic("Machine check fault not implemented in x86!\n");
170    }
171
172    // Below is a summary of the interrupt/exception information in the
173    // architecture manuals.
174
175    // Class  |  Type    | vector |               Cause                 | mnem
176    //------------------------------------------------------------------------
177    //Contrib   Fault     0         Divide-by-Zero-Error                  #DE
178    //Benign    Either    1         Debug                                 #DB
179    //Benign    Interrupt 2         Non-Maskable-Interrupt                #NMI
180    //Benign    Trap      3         Breakpoint                            #BP
181    //Benign    Trap      4         Overflow                              #OF
182    //Benign    Fault     5         Bound-Range                           #BR
183    //Benign    Fault     6         Invalid-Opcode                        #UD
184    //Benign    Fault     7         Device-Not-Available                  #NM
185    //Benign    Abort     8         Double-Fault                          #DF
186    //                    9         Coprocessor-Segment-Overrun
187    //Contrib   Fault     10        Invalid-TSS                           #TS
188    //Contrib   Fault     11        Segment-Not-Present                   #NP
189    //Contrib   Fault     12        Stack                                 #SS
190    //Contrib   Fault     13        General-Protection                    #GP
191    //Either    Fault     14        Page-Fault                            #PF
192    //                    15        Reserved
193    //Benign    Fault     16        x87 Floating-Point Exception Pending  #MF
194    //Benign    Fault     17        Alignment-Check                       #AC
195    //Benign    Abort     18        Machine-Check                         #MC
196    //Benign    Fault     19        SIMD Floating-Point                   #XF
197    //                    20-29     Reserved
198    //Contrib   ?         30        Security Exception                    #SX
199    //                    31        Reserved
200    //Benign    Interrupt 0-255     External Interrupts                   #INTR
201    //Benign    Interrupt 0-255     Software Interrupts                   INTn
202
203    class DivideByZero : public X86Fault
204    {
205      public:
206        DivideByZero() :
207            X86Fault("Divide-by-Zero-Error", "#DE")
208        {}
209    };
210
211    class DebugException : public X86FaultBase
212    {
213      public:
214        DebugException() :
215            X86FaultBase("Debug", "#DB")
216        {}
217    };
218
219    class NonMaskableInterrupt : public X86Interrupt
220    {
221      public:
222        NonMaskableInterrupt() :
223            X86Interrupt("Non-Maskable-Interrupt", "#NMI")
224        {}
225    };
226
227    class Breakpoint : public X86Trap
228    {
229      public:
230        Breakpoint() :
231            X86Trap("Breakpoint", "#BP")
232        {}
233    };
234
235    class OverflowTrap : public X86Trap
236    {
237      public:
238        OverflowTrap() :
239            X86Trap("Overflow", "#OF")
240        {}
241    };
242
243    class BoundRange : public X86Fault
244    {
245      public:
246        BoundRange() :
247            X86Fault("Bound-Range", "#BR")
248        {}
249    };
250
251    class InvalidOpcode : public X86Fault
252    {
253      public:
254        InvalidOpcode() :
255            X86Fault("Invalid-Opcode", "#UD")
256        {}
257    };
258
259    class DeviceNotAvailable : public X86Fault
260    {
261      public:
262        DeviceNotAvailable() :
263            X86Fault("Device-Not-Available", "#NM")
264        {}
265    };
266
267    class DoubleFault : public X86Abort
268    {
269      public:
270        DoubleFault() :
271            X86Abort("Double-Fault", "#DF")
272        {}
273    };
274
275    class InvalidTSS : public X86Fault
276    {
277      public:
278        InvalidTSS() :
279            X86Fault("Invalid-TSS", "#TS")
280        {}
281    };
282
283    class SegmentNotPresent : public X86Fault
284    {
285      public:
286        SegmentNotPresent() :
287            X86Fault("Segment-Not-Present", "#NP")
288        {}
289    };
290
291    class StackFault : public X86Fault
292    {
293      public:
294        StackFault() :
295            X86Fault("Stack", "#SS")
296        {}
297    };
298
299    class GeneralProtection : public X86Fault
300    {
301      public:
302        GeneralProtection() :
303            X86Fault("General-Protection", "#GP")
304        {}
305    };
306
307    class PageFault : public X86Fault
308    {
309      public:
310        PageFault() :
311            X86Fault("Page-Fault", "#PF")
312        {}
313    };
314
315    class X87FpExceptionPending : public X86Fault
316    {
317      public:
318        X87FpExceptionPending() :
319            X86Fault("x87 Floating-Point Exception Pending", "#MF")
320        {}
321    };
322
323    class AlignmentCheck : X86Fault
324    {
325      public:
326        AlignmentCheck() :
327            X86Fault("Alignment-Check", "#AC")
328        {}
329    };
330
331    class MachineCheck : X86Abort
332    {
333      public:
334        MachineCheck() :
335            X86Abort("Machine-Check", "#MC")
336        {}
337    };
338
339    class SIMDFloatingPointFault : X86Fault
340    {
341      public:
342        SIMDFloatingPointFault() :
343            X86Fault("SIMD Floating-Point", "#XF")
344        {}
345    };
346
347    class SecurityException : X86FaultBase
348    {
349      public:
350        SecurityException() :
351            X86FaultBase("Security Exception", "#SX")
352        {}
353    };
354
355    class ExternalInterrupt : X86Interrupt
356    {
357      public:
358        ExternalInterrupt() :
359            X86Interrupt("External Interrupt", "#INTR")
360        {}
361    };
362
363    class SoftwareInterrupt : X86Interrupt
364    {
365      public:
366        SoftwareInterrupt() :
367            X86Interrupt("Software Interrupt", "INTn")
368        {}
369    };
370
371    // These faults aren't part of the ISA definition. They trigger filling
372    // the tlb on a miss and are to take the place of a hardware table walker.
373    class FakeITLBFault : public X86Fault
374    {
375      public:
376        FakeITLBFault() :
377            X86Fault("fake instruction tlb fault", "itlb")
378        {}
379    };
380
381    class FakeDTLBFault : public X86Fault
382    {
383      public:
384        FakeDTLBFault() :
385            X86Fault("fake data tlb fault", "dtlb")
386        {}
387    };
388};
389
390#endif // __ARCH_X86_FAULTS_HH__
391