registers.hh revision 7741:340b6f01d69b
1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32#ifndef __ARCH_SPARC_REGISTERS_HH__ 33#define __ARCH_SPARC_REGISTERS_HH__ 34 35#include "arch/sparc/max_inst_regs.hh" 36#include "arch/sparc/miscregs.hh" 37#include "arch/sparc/sparc_traits.hh" 38#include "base/types.hh" 39 40namespace SparcISA 41{ 42 43using SparcISAInst::MaxInstSrcRegs; 44using SparcISAInst::MaxInstDestRegs; 45 46typedef uint64_t IntReg; 47typedef uint64_t MiscReg; 48typedef float FloatReg; 49typedef uint32_t FloatRegBits; 50typedef union 51{ 52 IntReg intReg; 53 FloatReg fpreg; 54 MiscReg ctrlreg; 55} AnyReg; 56 57typedef uint16_t RegIndex; 58 59// These enumerate all the registers for dependence tracking. 60enum DependenceTags { 61 FP_Base_DepTag = 32*3+9, 62 Ctrl_Base_DepTag = FP_Base_DepTag + 64, 63 Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs 64}; 65 66// semantically meaningful register indices 67const int ZeroReg = 0; // architecturally meaningful 68// the rest of these depend on the ABI 69const int ReturnAddressReg = 31; // post call, precall is 15 70const int ReturnValueReg = 8; // Post return, 24 is pre-return. 71const int StackPointerReg = 14; 72const int FramePointerReg = 30; 73 74// Some OS syscall use a second register (o1) to return a second value 75const int SyscallPseudoReturnReg = 9; 76 77const int NumIntArchRegs = 32; 78const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs; 79 80} // namespace SparcISA 81 82#endif 83