1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 */
30
31#ifndef __ARCH_SPARC_INSTS_UNIMP_HH__
32#define __ARCH_SPARC_INSTS_UNIMP_HH__
33
34#include <memory>
35
36#include "arch/generic/debugfaults.hh"
37#include "arch/sparc/insts/static_inst.hh"
38#include "base/cprintf.hh"
39
40namespace SparcISA
41{
42
43////////////////////////////////////////////////////////////////////
44//
45// Unimplemented instructions
46//
47
48/**
49 * Static instruction class for unimplemented instructions that
50 * cause simulator termination.  Note that these are recognized
51 * (legal) instructions that the simulator does not support; the
52 * 'Unknown' class is used for unrecognized/illegal instructions.
53 * This is a leaf class.
54 */
55class FailUnimplemented : public SparcStaticInst
56{
57  public:
58    /// Constructor
59    FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst) :
60            SparcStaticInst(_mnemonic, _machInst, No_OpClass)
61    {}
62
63    Fault
64    execute(ExecContext *xc, Trace::InstRecord *traceData) const override
65    {
66        return std::make_shared<GenericISA::M5PanicFault>(
67            "attempt to execute unimplemented instruction '%s' (inst %#08x)",
68            mnemonic, machInst);
69    }
70
71    std::string
72    generateDisassembly(Addr pc, const SymbolTable *symtab) const override
73    {
74        return csprintf("%-10s (unimplemented)", mnemonic);
75    }
76};
77
78/**
79 * Base class for unimplemented instructions that cause a warning
80 * to be printed (but do not terminate simulation).  This
81 * implementation is a little screwy in that it will print a
82 * warning for each instance of a particular unimplemented machine
83 * instruction, not just for each unimplemented opcode.  Should
84 * probably make the 'warned' flag a static member of the derived
85 * class.
86 */
87class WarnUnimplemented : public SparcStaticInst
88{
89  private:
90    /// Have we warned on this instruction yet?
91    mutable bool warned;
92
93  public:
94    /// Constructor
95    WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst) :
96            SparcStaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
97    {}
98
99    Fault
100    execute(ExecContext *xc, Trace::InstRecord *traceData) const override
101    {
102        if (!warned) {
103            return std::make_shared<GenericISA::M5WarnFault>(
104                "instruction '%s' unimplemented\n", mnemonic);
105            warned = true;
106        }
107        return NoFault;
108    }
109
110    std::string
111    generateDisassembly(Addr pc, const SymbolTable *symtab) const override
112    {
113        return csprintf("%-10s (unimplemented)", mnemonic);
114    }
115};
116
117}
118
119#endif // __ARCH_SPARC_INSTS_UNIMP_HH__
120