decoder.hh revision 9375 
1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_SPARC_DECODER_HH__
32#define __ARCH_SPARC_DECODER_HH__
33
34#include "arch/generic/decode_cache.hh"
35#include "arch/sparc/registers.hh"
36#include "arch/types.hh"
37#include "cpu/static_inst.hh"
38#include "cpu/thread_context.hh"
39
40class ThreadContext;
41
42namespace SparcISA
43{
44
45class Decoder
46{
47  protected:
48    ThreadContext * tc;
49    // The extended machine instruction being generated
50    ExtMachInst emi;
51    bool instDone;
52    MiscReg asi;
53
54  public:
55    Decoder(ThreadContext * _tc) : tc(_tc), instDone(false), asi(0)
56    {}
57
58    ThreadContext *
59    getTC()
60    {
61        return tc;
62    }
63
64    void
65    setTC(ThreadContext * _tc)
66    {
67        tc = _tc;
68    }
69
70    void process() {}
71
72    void
73    reset()
74    {
75        instDone = false;
76    }
77
78    // Use this to give data to the predecoder. This should be used
79    // when there is control flow.
80    void
81    moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
82    {
83        emi = inst;
84        // The I bit, bit 13, is used to figure out where the ASI
85        // should come from. Use that in the ExtMachInst. This is
86        // slightly redundant, but it removes the need to put a condition
87        // into all the execute functions
88        if (inst & (1 << 13)) {
89            emi |= (static_cast<ExtMachInst>(
90                        asi << (sizeof(MachInst) * 8)));
91        } else {
92            emi |= (static_cast<ExtMachInst>(bits(inst, 12, 5))
93                    << (sizeof(MachInst) * 8));
94        }
95        instDone = true;
96    }
97
98    bool
99    needMoreBytes()
100    {
101        return true;
102    }
103
104    bool
105    instReady()
106    {
107        return instDone;
108    }
109
110    void
111    setContext(MiscReg _asi)
112    {
113        asi = _asi;
114    }
115
116  protected:
117    /// A cache of decoded instruction objects.
118    static GenericISA::BasicDecodeCache defaultCache;
119
120  public:
121    StaticInstPtr decodeInst(ExtMachInst mach_inst);
122
123    /// Decode a machine instruction.
124    /// @param mach_inst The binary instruction to decode.
125    /// @retval A pointer to the corresponding StaticInst object.
126    StaticInstPtr
127    decode(ExtMachInst mach_inst, Addr addr)
128    {
129        return defaultCache.decode(this, mach_inst, addr);
130    }
131
132    StaticInstPtr
133    decode(SparcISA::PCState &nextPC)
134    {
135        if (!instDone)
136            return NULL;
137        instDone = false;
138        return decode(emi, nextPC.instAddr());
139    }
140};
141
142} // namespace SparcISA
143
144#endif // __ARCH_SPARC_DECODER_HH__
145