1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Ali Saidi
30 *          Nathan Binkert
31 *          Jaidev Patwardhan
32 *          Robert Scheffel
33 */
34
35#include "arch/riscv/system.hh"
36
37#include "arch/vtophys.hh"
38#include "base/loader/hex_file.hh"
39#include "base/loader/object_file.hh"
40#include "base/loader/symtab.hh"
41#include "base/trace.hh"
42#include "mem/physical.hh"
43#include "params/RiscvSystem.hh"
44#include "sim/byteswap.hh"
45
46using namespace LittleEndianGuest;
47
48RiscvSystem::RiscvSystem(Params *p)
49    : System(p),
50      _isBareMetal(p->bare_metal),
51      _resetVect(p->reset_vect)
52{
53}
54
55RiscvSystem::~RiscvSystem()
56{
57}
58
59Addr
60RiscvSystem::fixFuncEventAddr(Addr addr)
61{
62    return addr;
63}
64
65void
66RiscvSystem::setRiscvAccess(Addr access)
67{}
68
69bool
70RiscvSystem::breakpoint()
71{
72    return 0;
73}
74
75RiscvSystem *
76RiscvSystemParams::create()
77{
78    return new RiscvSystem(this);
79}
80
81