decoder.isa revision 13633
111723Sar4jc@virginia.edu// -*- mode:c++ -*- 211723Sar4jc@virginia.edu 311723Sar4jc@virginia.edu// Copyright (c) 2015 RISC-V Foundation 412120Sar4jc@virginia.edu// Copyright (c) 2017 The University of Virginia 511723Sar4jc@virginia.edu// All rights reserved. 611723Sar4jc@virginia.edu// 711723Sar4jc@virginia.edu// Redistribution and use in source and binary forms, with or without 811723Sar4jc@virginia.edu// modification, are permitted provided that the following conditions are 911723Sar4jc@virginia.edu// met: redistributions of source code must retain the above copyright 1011723Sar4jc@virginia.edu// notice, this list of conditions and the following disclaimer; 1111723Sar4jc@virginia.edu// redistributions in binary form must reproduce the above copyright 1211723Sar4jc@virginia.edu// notice, this list of conditions and the following disclaimer in the 1311723Sar4jc@virginia.edu// documentation and/or other materials provided with the distribution; 1411723Sar4jc@virginia.edu// neither the name of the copyright holders nor the names of its 1511723Sar4jc@virginia.edu// contributors may be used to endorse or promote products derived from 1611723Sar4jc@virginia.edu// this software without specific prior written permission. 1711723Sar4jc@virginia.edu// 1811723Sar4jc@virginia.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1911723Sar4jc@virginia.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2011723Sar4jc@virginia.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2111723Sar4jc@virginia.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2211723Sar4jc@virginia.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2311723Sar4jc@virginia.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2411723Sar4jc@virginia.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2511723Sar4jc@virginia.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2611723Sar4jc@virginia.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2711723Sar4jc@virginia.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2811723Sar4jc@virginia.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2911723Sar4jc@virginia.edu// 3011723Sar4jc@virginia.edu// Authors: Alec Roelke 3111723Sar4jc@virginia.edu 3211723Sar4jc@virginia.edu//////////////////////////////////////////////////////////////////// 3311723Sar4jc@virginia.edu// 3411723Sar4jc@virginia.edu// The RISC-V ISA decoder 3511723Sar4jc@virginia.edu// 3611723Sar4jc@virginia.edu 3712120Sar4jc@virginia.edudecode QUADRANT default Unknown::unknown() { 3812120Sar4jc@virginia.edu 0x0: decode COPCODE { 3912428Sar4jc@virginia.edu 0x0: CIOp::c_addi4spn({{ 4012120Sar4jc@virginia.edu imm = CIMM8<1:1> << 2 | 4112120Sar4jc@virginia.edu CIMM8<0:0> << 3 | 4212120Sar4jc@virginia.edu CIMM8<7:6> << 4 | 4312120Sar4jc@virginia.edu CIMM8<5:2> << 6; 4412120Sar4jc@virginia.edu }}, {{ 4512136Sar4jc@virginia.edu if (machInst == 0) 4612849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("zero instruction", 4712849Sar4jc@virginia.edu machInst); 4812120Sar4jc@virginia.edu Rp2 = sp + imm; 4912428Sar4jc@virginia.edu }}, uint64_t); 5012120Sar4jc@virginia.edu format CompressedLoad { 5112120Sar4jc@virginia.edu 0x1: c_fld({{ 5212322Sar4jc@virginia.edu offset = CIMM3 << 3 | CIMM2 << 6; 5312120Sar4jc@virginia.edu }}, {{ 5412120Sar4jc@virginia.edu Fp2_bits = Mem; 5512120Sar4jc@virginia.edu }}, {{ 5612322Sar4jc@virginia.edu EA = Rp1 + offset; 5711723Sar4jc@virginia.edu }}); 5812120Sar4jc@virginia.edu 0x2: c_lw({{ 5912322Sar4jc@virginia.edu offset = CIMM2<1:1> << 2 | 6012322Sar4jc@virginia.edu CIMM3 << 3 | 6112322Sar4jc@virginia.edu CIMM2<0:0> << 6; 6212120Sar4jc@virginia.edu }}, {{ 6312120Sar4jc@virginia.edu Rp2_sd = Mem_sw; 6412120Sar4jc@virginia.edu }}, {{ 6512322Sar4jc@virginia.edu EA = Rp1 + offset; 6611723Sar4jc@virginia.edu }}); 6712120Sar4jc@virginia.edu 0x3: c_ld({{ 6812322Sar4jc@virginia.edu offset = CIMM3 << 3 | CIMM2 << 6; 6912120Sar4jc@virginia.edu }}, {{ 7012120Sar4jc@virginia.edu Rp2_sd = Mem_sd; 7112120Sar4jc@virginia.edu }}, {{ 7212322Sar4jc@virginia.edu EA = Rp1 + offset; 7311723Sar4jc@virginia.edu }}); 7412120Sar4jc@virginia.edu } 7512120Sar4jc@virginia.edu format CompressedStore { 7612120Sar4jc@virginia.edu 0x5: c_fsd({{ 7712322Sar4jc@virginia.edu offset = CIMM3 << 3 | CIMM2 << 6; 7812120Sar4jc@virginia.edu }}, {{ 7912120Sar4jc@virginia.edu Mem = Fp2_bits; 8012120Sar4jc@virginia.edu }}, {{ 8112322Sar4jc@virginia.edu EA = Rp1 + offset; 8211723Sar4jc@virginia.edu }}); 8312120Sar4jc@virginia.edu 0x6: c_sw({{ 8412322Sar4jc@virginia.edu offset = CIMM2<1:1> << 2 | 8512322Sar4jc@virginia.edu CIMM3 << 3 | 8612322Sar4jc@virginia.edu CIMM2<0:0> << 6; 8712120Sar4jc@virginia.edu }}, {{ 8812120Sar4jc@virginia.edu Mem_uw = Rp2_uw; 8912120Sar4jc@virginia.edu }}, ea_code={{ 9012322Sar4jc@virginia.edu EA = Rp1 + offset; 9111723Sar4jc@virginia.edu }}); 9212120Sar4jc@virginia.edu 0x7: c_sd({{ 9312322Sar4jc@virginia.edu offset = CIMM3 << 3 | CIMM2 << 6; 9412120Sar4jc@virginia.edu }}, {{ 9512120Sar4jc@virginia.edu Mem_ud = Rp2_ud; 9612120Sar4jc@virginia.edu }}, {{ 9712322Sar4jc@virginia.edu EA = Rp1 + offset; 9811723Sar4jc@virginia.edu }}); 9911723Sar4jc@virginia.edu } 10011723Sar4jc@virginia.edu } 10112120Sar4jc@virginia.edu 0x1: decode COPCODE { 10212120Sar4jc@virginia.edu format CIOp { 10312120Sar4jc@virginia.edu 0x0: c_addi({{ 10412120Sar4jc@virginia.edu imm = CIMM5; 10512120Sar4jc@virginia.edu if (CIMM1 > 0) 10612120Sar4jc@virginia.edu imm |= ~((uint64_t)0x1F); 10712120Sar4jc@virginia.edu }}, {{ 10812136Sar4jc@virginia.edu if ((RC1 == 0) != (imm == 0)) { 10912136Sar4jc@virginia.edu if (RC1 == 0) { 11012849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 11112849Sar4jc@virginia.edu machInst); 11212136Sar4jc@virginia.edu } else // imm == 0 11312849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("immediate = 0", 11412849Sar4jc@virginia.edu machInst); 11512136Sar4jc@virginia.edu } 11612120Sar4jc@virginia.edu Rc1_sd = Rc1_sd + imm; 11712120Sar4jc@virginia.edu }}); 11812120Sar4jc@virginia.edu 0x1: c_addiw({{ 11912120Sar4jc@virginia.edu imm = CIMM5; 12012120Sar4jc@virginia.edu if (CIMM1 > 0) 12112120Sar4jc@virginia.edu imm |= ~((uint64_t)0x1F); 12212120Sar4jc@virginia.edu }}, {{ 12312596Sqtt2@cornell.edu if (RC1 == 0) { 12412849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 12512849Sar4jc@virginia.edu machInst); 12612596Sqtt2@cornell.edu } 12712120Sar4jc@virginia.edu Rc1_sd = (int32_t)Rc1_sd + imm; 12812120Sar4jc@virginia.edu }}); 12912120Sar4jc@virginia.edu 0x2: c_li({{ 13012120Sar4jc@virginia.edu imm = CIMM5; 13112120Sar4jc@virginia.edu if (CIMM1 > 0) 13212120Sar4jc@virginia.edu imm |= ~((uint64_t)0x1F); 13312120Sar4jc@virginia.edu }}, {{ 13412596Sqtt2@cornell.edu if (RC1 == 0) { 13512849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 13612849Sar4jc@virginia.edu machInst); 13712596Sqtt2@cornell.edu } 13812120Sar4jc@virginia.edu Rc1_sd = imm; 13912120Sar4jc@virginia.edu }}); 14012120Sar4jc@virginia.edu 0x3: decode RC1 { 14112120Sar4jc@virginia.edu 0x2: c_addi16sp({{ 14212120Sar4jc@virginia.edu imm = CIMM5<4:4> << 4 | 14312120Sar4jc@virginia.edu CIMM5<0:0> << 5 | 14412120Sar4jc@virginia.edu CIMM5<3:3> << 6 | 14512120Sar4jc@virginia.edu CIMM5<2:1> << 7; 14612120Sar4jc@virginia.edu if (CIMM1 > 0) 14712120Sar4jc@virginia.edu imm |= ~((int64_t)0x1FF); 14812120Sar4jc@virginia.edu }}, {{ 14912596Sqtt2@cornell.edu if (imm == 0) { 15012849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("immediate = 0", 15112849Sar4jc@virginia.edu machInst); 15212596Sqtt2@cornell.edu } 15312120Sar4jc@virginia.edu sp_sd = sp_sd + imm; 15412120Sar4jc@virginia.edu }}); 15512120Sar4jc@virginia.edu default: c_lui({{ 15612120Sar4jc@virginia.edu imm = CIMM5 << 12; 15712120Sar4jc@virginia.edu if (CIMM1 > 0) 15812120Sar4jc@virginia.edu imm |= ~((uint64_t)0x1FFFF); 15912120Sar4jc@virginia.edu }}, {{ 16012596Sqtt2@cornell.edu if (RC1 == 0 || RC1 == 2) { 16112849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 16212849Sar4jc@virginia.edu machInst); 16312596Sqtt2@cornell.edu } 16412596Sqtt2@cornell.edu if (imm == 0) { 16512849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("immediate = 0", 16612849Sar4jc@virginia.edu machInst); 16712596Sqtt2@cornell.edu } 16812120Sar4jc@virginia.edu Rc1_sd = imm; 16912120Sar4jc@virginia.edu }}); 17012120Sar4jc@virginia.edu } 17112120Sar4jc@virginia.edu } 17212120Sar4jc@virginia.edu 0x4: decode CFUNCT2HIGH { 17312428Sar4jc@virginia.edu format CIOp { 17412120Sar4jc@virginia.edu 0x0: c_srli({{ 17512120Sar4jc@virginia.edu imm = CIMM5 | (CIMM1 << 5); 17612120Sar4jc@virginia.edu }}, {{ 17712596Sqtt2@cornell.edu if (imm == 0) { 17812849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("immediate = 0", 17912849Sar4jc@virginia.edu machInst); 18012596Sqtt2@cornell.edu } 18112120Sar4jc@virginia.edu Rp1 = Rp1 >> imm; 18212428Sar4jc@virginia.edu }}, uint64_t); 18312120Sar4jc@virginia.edu 0x1: c_srai({{ 18412120Sar4jc@virginia.edu imm = CIMM5 | (CIMM1 << 5); 18512120Sar4jc@virginia.edu }}, {{ 18612596Sqtt2@cornell.edu if (imm == 0) { 18712849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("immediate = 0", 18812849Sar4jc@virginia.edu machInst); 18912596Sqtt2@cornell.edu } 19012120Sar4jc@virginia.edu Rp1_sd = Rp1_sd >> imm; 19112428Sar4jc@virginia.edu }}, uint64_t); 19212120Sar4jc@virginia.edu 0x2: c_andi({{ 19312120Sar4jc@virginia.edu imm = CIMM5; 19412120Sar4jc@virginia.edu if (CIMM1 > 0) 19512120Sar4jc@virginia.edu imm |= ~((uint64_t)0x1F); 19612120Sar4jc@virginia.edu }}, {{ 19712120Sar4jc@virginia.edu Rp1 = Rp1 & imm; 19812428Sar4jc@virginia.edu }}, uint64_t); 19912120Sar4jc@virginia.edu } 20012120Sar4jc@virginia.edu format ROp { 20112120Sar4jc@virginia.edu 0x3: decode CFUNCT1 { 20212120Sar4jc@virginia.edu 0x0: decode CFUNCT2LOW { 20312120Sar4jc@virginia.edu 0x0: c_sub({{ 20412120Sar4jc@virginia.edu Rp1 = Rp1 - Rp2; 20512120Sar4jc@virginia.edu }}); 20612120Sar4jc@virginia.edu 0x1: c_xor({{ 20712120Sar4jc@virginia.edu Rp1 = Rp1 ^ Rp2; 20812120Sar4jc@virginia.edu }}); 20912120Sar4jc@virginia.edu 0x2: c_or({{ 21012120Sar4jc@virginia.edu Rp1 = Rp1 | Rp2; 21112120Sar4jc@virginia.edu }}); 21212120Sar4jc@virginia.edu 0x3: c_and({{ 21312120Sar4jc@virginia.edu Rp1 = Rp1 & Rp2; 21412120Sar4jc@virginia.edu }}); 21512120Sar4jc@virginia.edu } 21612120Sar4jc@virginia.edu 0x1: decode CFUNCT2LOW { 21712120Sar4jc@virginia.edu 0x0: c_subw({{ 21812120Sar4jc@virginia.edu Rp1_sd = (int32_t)Rp1_sd - Rp2_sw; 21912120Sar4jc@virginia.edu }}); 22012120Sar4jc@virginia.edu 0x1: c_addw({{ 22112120Sar4jc@virginia.edu Rp1_sd = (int32_t)Rp1_sd + Rp2_sw; 22212120Sar4jc@virginia.edu }}); 22312120Sar4jc@virginia.edu } 22412120Sar4jc@virginia.edu } 22512120Sar4jc@virginia.edu } 22612120Sar4jc@virginia.edu } 22712120Sar4jc@virginia.edu 0x5: JOp::c_j({{ 22812120Sar4jc@virginia.edu int64_t offset = CJUMPIMM<3:1> << 1 | 22912322Sar4jc@virginia.edu CJUMPIMM<9:9> << 4 | 23012322Sar4jc@virginia.edu CJUMPIMM<0:0> << 5 | 23112322Sar4jc@virginia.edu CJUMPIMM<5:5> << 6 | 23212322Sar4jc@virginia.edu CJUMPIMM<4:4> << 7 | 23312322Sar4jc@virginia.edu CJUMPIMM<8:7> << 8 | 23412322Sar4jc@virginia.edu CJUMPIMM<6:6> << 10; 23512120Sar4jc@virginia.edu if (CJUMPIMM<10:10> > 0) 23612120Sar4jc@virginia.edu offset |= ~((int64_t)0x7FF); 23712120Sar4jc@virginia.edu NPC = PC + offset; 23812120Sar4jc@virginia.edu }}, IsIndirectControl, IsUncondControl, IsCall); 23912535Sar4jc@virginia.edu format CBOp { 24012120Sar4jc@virginia.edu 0x6: c_beqz({{ 24112120Sar4jc@virginia.edu if (Rp1 == 0) 24212535Sar4jc@virginia.edu NPC = PC + imm; 24312120Sar4jc@virginia.edu else 24412120Sar4jc@virginia.edu NPC = NPC; 24512120Sar4jc@virginia.edu }}, IsDirectControl, IsCondControl); 24612120Sar4jc@virginia.edu 0x7: c_bnez({{ 24712120Sar4jc@virginia.edu if (Rp1 != 0) 24812535Sar4jc@virginia.edu NPC = PC + imm; 24912120Sar4jc@virginia.edu else 25012120Sar4jc@virginia.edu NPC = NPC; 25112120Sar4jc@virginia.edu }}, IsDirectControl, IsCondControl); 25212120Sar4jc@virginia.edu } 25312120Sar4jc@virginia.edu } 25412120Sar4jc@virginia.edu 0x2: decode COPCODE { 25512428Sar4jc@virginia.edu 0x0: CIOp::c_slli({{ 25612120Sar4jc@virginia.edu imm = CIMM5 | (CIMM1 << 5); 25712120Sar4jc@virginia.edu }}, {{ 25812596Sqtt2@cornell.edu if (imm == 0) { 25912849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("immediate = 0", 26012849Sar4jc@virginia.edu machInst); 26112596Sqtt2@cornell.edu } 26212596Sqtt2@cornell.edu if (RC1 == 0) { 26312849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 26412849Sar4jc@virginia.edu machInst); 26512596Sqtt2@cornell.edu } 26612120Sar4jc@virginia.edu Rc1 = Rc1 << imm; 26712428Sar4jc@virginia.edu }}, uint64_t); 26812120Sar4jc@virginia.edu format CompressedLoad { 26912120Sar4jc@virginia.edu 0x1: c_fldsp({{ 27012322Sar4jc@virginia.edu offset = CIMM5<4:3> << 3 | 27112322Sar4jc@virginia.edu CIMM1 << 5 | 27212322Sar4jc@virginia.edu CIMM5<2:0> << 6; 27312120Sar4jc@virginia.edu }}, {{ 27412120Sar4jc@virginia.edu Fc1_bits = Mem; 27512120Sar4jc@virginia.edu }}, {{ 27612322Sar4jc@virginia.edu EA = sp + offset; 27711725Sar4jc@virginia.edu }}); 27812120Sar4jc@virginia.edu 0x2: c_lwsp({{ 27912322Sar4jc@virginia.edu offset = CIMM5<4:2> << 2 | 28012322Sar4jc@virginia.edu CIMM1 << 5 | 28112322Sar4jc@virginia.edu CIMM5<1:0> << 6; 28212120Sar4jc@virginia.edu }}, {{ 28312596Sqtt2@cornell.edu if (RC1 == 0) { 28412849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 28512849Sar4jc@virginia.edu machInst); 28612596Sqtt2@cornell.edu } 28712120Sar4jc@virginia.edu Rc1_sd = Mem_sw; 28812120Sar4jc@virginia.edu }}, {{ 28912322Sar4jc@virginia.edu EA = sp + offset; 29012120Sar4jc@virginia.edu }}); 29112120Sar4jc@virginia.edu 0x3: c_ldsp({{ 29212322Sar4jc@virginia.edu offset = CIMM5<4:3> << 3 | 29312322Sar4jc@virginia.edu CIMM1 << 5 | 29412322Sar4jc@virginia.edu CIMM5<2:0> << 6; 29512120Sar4jc@virginia.edu }}, {{ 29612596Sqtt2@cornell.edu if (RC1 == 0) { 29712849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 29812849Sar4jc@virginia.edu machInst); 29912596Sqtt2@cornell.edu } 30012120Sar4jc@virginia.edu Rc1_sd = Mem_sd; 30112120Sar4jc@virginia.edu }}, {{ 30212322Sar4jc@virginia.edu EA = sp + offset; 30312120Sar4jc@virginia.edu }}); 30412120Sar4jc@virginia.edu } 30512120Sar4jc@virginia.edu 0x4: decode CFUNCT1 { 30612120Sar4jc@virginia.edu 0x0: decode RC2 { 30712120Sar4jc@virginia.edu 0x0: Jump::c_jr({{ 30812596Sqtt2@cornell.edu if (RC1 == 0) { 30912849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 31012849Sar4jc@virginia.edu machInst); 31112596Sqtt2@cornell.edu } 31212120Sar4jc@virginia.edu NPC = Rc1; 31312120Sar4jc@virginia.edu }}, IsIndirectControl, IsUncondControl, IsCall); 31412120Sar4jc@virginia.edu default: CROp::c_mv({{ 31512596Sqtt2@cornell.edu if (RC1 == 0) { 31612849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x0", 31712849Sar4jc@virginia.edu machInst); 31812596Sqtt2@cornell.edu } 31912120Sar4jc@virginia.edu Rc1 = Rc2; 32012120Sar4jc@virginia.edu }}); 32112120Sar4jc@virginia.edu } 32212120Sar4jc@virginia.edu 0x1: decode RC1 { 32312120Sar4jc@virginia.edu 0x0: SystemOp::c_ebreak({{ 32412596Sqtt2@cornell.edu if (RC2 != 0) { 32512849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x1", 32612849Sar4jc@virginia.edu machInst); 32712596Sqtt2@cornell.edu } 32812849Sar4jc@virginia.edu fault = make_shared<BreakpointFault>(xc->pcState()); 32912120Sar4jc@virginia.edu }}, IsSerializeAfter, IsNonSpeculative, No_OpClass); 33012120Sar4jc@virginia.edu default: decode RC2 { 33112120Sar4jc@virginia.edu 0x0: Jump::c_jalr({{ 33212596Sqtt2@cornell.edu if (RC1 == 0) { 33312596Sqtt2@cornell.edu fault = make_shared<IllegalInstFault> 33412849Sar4jc@virginia.edu ("source reg x0", 33512849Sar4jc@virginia.edu machInst); 33612596Sqtt2@cornell.edu } 33712120Sar4jc@virginia.edu ra = NPC; 33812120Sar4jc@virginia.edu NPC = Rc1; 33912120Sar4jc@virginia.edu }}, IsIndirectControl, IsUncondControl, IsCall); 34012120Sar4jc@virginia.edu default: ROp::c_add({{ 34112120Sar4jc@virginia.edu Rc1_sd = Rc1_sd + Rc2_sd; 34212120Sar4jc@virginia.edu }}); 34312120Sar4jc@virginia.edu } 34412120Sar4jc@virginia.edu } 34512120Sar4jc@virginia.edu } 34612120Sar4jc@virginia.edu format CompressedStore { 34712120Sar4jc@virginia.edu 0x5: c_fsdsp({{ 34812322Sar4jc@virginia.edu offset = CIMM6<5:3> << 3 | 34912322Sar4jc@virginia.edu CIMM6<2:0> << 6; 35012120Sar4jc@virginia.edu }}, {{ 35112120Sar4jc@virginia.edu Mem_ud = Fc2_bits; 35212120Sar4jc@virginia.edu }}, {{ 35312322Sar4jc@virginia.edu EA = sp + offset; 35412120Sar4jc@virginia.edu }}); 35512120Sar4jc@virginia.edu 0x6: c_swsp({{ 35612322Sar4jc@virginia.edu offset = CIMM6<5:2> << 2 | 35712322Sar4jc@virginia.edu CIMM6<1:0> << 6; 35812120Sar4jc@virginia.edu }}, {{ 35912120Sar4jc@virginia.edu Mem_uw = Rc2_uw; 36012120Sar4jc@virginia.edu }}, {{ 36112322Sar4jc@virginia.edu EA = sp + offset; 36212120Sar4jc@virginia.edu }}); 36312120Sar4jc@virginia.edu 0x7: c_sdsp({{ 36412322Sar4jc@virginia.edu offset = CIMM6<5:3> << 3 | 36512322Sar4jc@virginia.edu CIMM6<2:0> << 6; 36612120Sar4jc@virginia.edu }}, {{ 36712120Sar4jc@virginia.edu Mem = Rc2; 36812120Sar4jc@virginia.edu }}, {{ 36912322Sar4jc@virginia.edu EA = sp + offset; 37011725Sar4jc@virginia.edu }}); 37111725Sar4jc@virginia.edu } 37211725Sar4jc@virginia.edu } 37312120Sar4jc@virginia.edu 0x3: decode OPCODE { 37412120Sar4jc@virginia.edu 0x00: decode FUNCT3 { 37512120Sar4jc@virginia.edu format Load { 37612120Sar4jc@virginia.edu 0x0: lb({{ 37712120Sar4jc@virginia.edu Rd_sd = Mem_sb; 37811723Sar4jc@virginia.edu }}); 37912120Sar4jc@virginia.edu 0x1: lh({{ 38012120Sar4jc@virginia.edu Rd_sd = Mem_sh; 38111723Sar4jc@virginia.edu }}); 38212120Sar4jc@virginia.edu 0x2: lw({{ 38312120Sar4jc@virginia.edu Rd_sd = Mem_sw; 38411723Sar4jc@virginia.edu }}); 38512120Sar4jc@virginia.edu 0x3: ld({{ 38612120Sar4jc@virginia.edu Rd_sd = Mem_sd; 38712120Sar4jc@virginia.edu }}); 38812120Sar4jc@virginia.edu 0x4: lbu({{ 38912120Sar4jc@virginia.edu Rd = Mem_ub; 39012120Sar4jc@virginia.edu }}); 39112120Sar4jc@virginia.edu 0x5: lhu({{ 39212120Sar4jc@virginia.edu Rd = Mem_uh; 39312120Sar4jc@virginia.edu }}); 39412120Sar4jc@virginia.edu 0x6: lwu({{ 39512120Sar4jc@virginia.edu Rd = Mem_uw; 39611723Sar4jc@virginia.edu }}); 39711723Sar4jc@virginia.edu } 39811723Sar4jc@virginia.edu } 39911723Sar4jc@virginia.edu 40012120Sar4jc@virginia.edu 0x01: decode FUNCT3 { 40112120Sar4jc@virginia.edu format Load { 40212120Sar4jc@virginia.edu 0x2: flw({{ 40312120Sar4jc@virginia.edu Fd_bits = (uint64_t)Mem_uw; 40412445Sar4jc@virginia.edu }}, inst_flags=FloatMemReadOp); 40512120Sar4jc@virginia.edu 0x3: fld({{ 40612120Sar4jc@virginia.edu Fd_bits = Mem; 40712445Sar4jc@virginia.edu }}, inst_flags=FloatMemReadOp); 40811726Sar4jc@virginia.edu } 40911726Sar4jc@virginia.edu } 41012120Sar4jc@virginia.edu 41112120Sar4jc@virginia.edu 0x03: decode FUNCT3 { 41212120Sar4jc@virginia.edu format IOp { 41312120Sar4jc@virginia.edu 0x0: fence({{ 41413633Sqtt2@cornell.edu }}, uint64_t, IsMemBarrier, No_OpClass); 41512120Sar4jc@virginia.edu 0x1: fence_i({{ 41612428Sar4jc@virginia.edu }}, uint64_t, IsNonSpeculative, IsSerializeAfter, No_OpClass); 41711726Sar4jc@virginia.edu } 41811726Sar4jc@virginia.edu } 41912120Sar4jc@virginia.edu 42012120Sar4jc@virginia.edu 0x04: decode FUNCT3 { 42112120Sar4jc@virginia.edu format IOp { 42212120Sar4jc@virginia.edu 0x0: addi({{ 42312120Sar4jc@virginia.edu Rd_sd = Rs1_sd + imm; 42411723Sar4jc@virginia.edu }}); 42512120Sar4jc@virginia.edu 0x1: slli({{ 42612120Sar4jc@virginia.edu Rd = Rs1 << SHAMT6; 42712120Sar4jc@virginia.edu }}); 42812120Sar4jc@virginia.edu 0x2: slti({{ 42912120Sar4jc@virginia.edu Rd = (Rs1_sd < imm) ? 1 : 0; 43012120Sar4jc@virginia.edu }}); 43112120Sar4jc@virginia.edu 0x3: sltiu({{ 43212428Sar4jc@virginia.edu Rd = (Rs1 < imm) ? 1 : 0; 43312428Sar4jc@virginia.edu }}, uint64_t); 43412120Sar4jc@virginia.edu 0x4: xori({{ 43512428Sar4jc@virginia.edu Rd = Rs1 ^ imm; 43612428Sar4jc@virginia.edu }}, uint64_t); 43712120Sar4jc@virginia.edu 0x5: decode SRTYPE { 43812120Sar4jc@virginia.edu 0x0: srli({{ 43912120Sar4jc@virginia.edu Rd = Rs1 >> SHAMT6; 44012120Sar4jc@virginia.edu }}); 44112120Sar4jc@virginia.edu 0x1: srai({{ 44212120Sar4jc@virginia.edu Rd_sd = Rs1_sd >> SHAMT6; 44312120Sar4jc@virginia.edu }}); 44412120Sar4jc@virginia.edu } 44512120Sar4jc@virginia.edu 0x6: ori({{ 44612428Sar4jc@virginia.edu Rd = Rs1 | imm; 44712428Sar4jc@virginia.edu }}, uint64_t); 44812120Sar4jc@virginia.edu 0x7: andi({{ 44912428Sar4jc@virginia.edu Rd = Rs1 & imm; 45012428Sar4jc@virginia.edu }}, uint64_t); 45111723Sar4jc@virginia.edu } 45212120Sar4jc@virginia.edu } 45312120Sar4jc@virginia.edu 45412120Sar4jc@virginia.edu 0x05: UOp::auipc({{ 45512120Sar4jc@virginia.edu Rd = PC + imm; 45612120Sar4jc@virginia.edu }}); 45712120Sar4jc@virginia.edu 45812120Sar4jc@virginia.edu 0x06: decode FUNCT3 { 45912120Sar4jc@virginia.edu format IOp { 46012120Sar4jc@virginia.edu 0x0: addiw({{ 46112428Sar4jc@virginia.edu Rd_sd = Rs1_sw + imm; 46212428Sar4jc@virginia.edu }}, int32_t); 46312120Sar4jc@virginia.edu 0x1: slliw({{ 46412120Sar4jc@virginia.edu Rd_sd = Rs1_sw << SHAMT5; 46512120Sar4jc@virginia.edu }}); 46612120Sar4jc@virginia.edu 0x5: decode SRTYPE { 46712120Sar4jc@virginia.edu 0x0: srliw({{ 46812807Saustinharris@utexas.edu Rd_sd = (int32_t)(Rs1_uw >> SHAMT5); 46912120Sar4jc@virginia.edu }}); 47012120Sar4jc@virginia.edu 0x1: sraiw({{ 47112120Sar4jc@virginia.edu Rd_sd = Rs1_sw >> SHAMT5; 47212120Sar4jc@virginia.edu }}); 47312120Sar4jc@virginia.edu } 47412120Sar4jc@virginia.edu } 47512120Sar4jc@virginia.edu } 47611724Sar4jc@virginia.edu 47712120Sar4jc@virginia.edu 0x08: decode FUNCT3 { 47812120Sar4jc@virginia.edu format Store { 47912120Sar4jc@virginia.edu 0x0: sb({{ 48012120Sar4jc@virginia.edu Mem_ub = Rs2_ub; 48112120Sar4jc@virginia.edu }}); 48212120Sar4jc@virginia.edu 0x1: sh({{ 48312120Sar4jc@virginia.edu Mem_uh = Rs2_uh; 48412120Sar4jc@virginia.edu }}); 48512120Sar4jc@virginia.edu 0x2: sw({{ 48612120Sar4jc@virginia.edu Mem_uw = Rs2_uw; 48712120Sar4jc@virginia.edu }}); 48812120Sar4jc@virginia.edu 0x3: sd({{ 48912120Sar4jc@virginia.edu Mem_ud = Rs2_ud; 49012120Sar4jc@virginia.edu }}); 49112120Sar4jc@virginia.edu } 49212120Sar4jc@virginia.edu } 49311724Sar4jc@virginia.edu 49412120Sar4jc@virginia.edu 0x09: decode FUNCT3 { 49512120Sar4jc@virginia.edu format Store { 49612120Sar4jc@virginia.edu 0x2: fsw({{ 49712120Sar4jc@virginia.edu Mem_uw = (uint32_t)Fs2_bits; 49812445Sar4jc@virginia.edu }}, inst_flags=FloatMemWriteOp); 49912120Sar4jc@virginia.edu 0x3: fsd({{ 50012120Sar4jc@virginia.edu Mem_ud = Fs2_bits; 50112445Sar4jc@virginia.edu }}, inst_flags=FloatMemWriteOp); 50212120Sar4jc@virginia.edu } 50312120Sar4jc@virginia.edu } 50411724Sar4jc@virginia.edu 50512120Sar4jc@virginia.edu 0x0b: decode FUNCT3 { 50612120Sar4jc@virginia.edu 0x2: decode AMOFUNCT { 50712120Sar4jc@virginia.edu 0x2: LoadReserved::lr_w({{ 50812120Sar4jc@virginia.edu Rd_sd = Mem_sw; 50912120Sar4jc@virginia.edu }}, mem_flags=LLSC); 51012120Sar4jc@virginia.edu 0x3: StoreCond::sc_w({{ 51112120Sar4jc@virginia.edu Mem_uw = Rs2_uw; 51212120Sar4jc@virginia.edu }}, {{ 51312120Sar4jc@virginia.edu Rd = result; 51412120Sar4jc@virginia.edu }}, inst_flags=IsStoreConditional, mem_flags=LLSC); 51512120Sar4jc@virginia.edu format AtomicMemOp { 51612120Sar4jc@virginia.edu 0x0: amoadd_w({{Rt_sd = Mem_sw;}}, {{ 51712120Sar4jc@virginia.edu Mem_sw = Rs2_sw + Rt_sd; 51812120Sar4jc@virginia.edu Rd_sd = Rt_sd; 51912120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 52012120Sar4jc@virginia.edu 0x1: amoswap_w({{Rt_sd = Mem_sw;}}, {{ 52112120Sar4jc@virginia.edu Mem_sw = Rs2_uw; 52212120Sar4jc@virginia.edu Rd_sd = Rt_sd; 52312120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 52412120Sar4jc@virginia.edu 0x4: amoxor_w({{Rt_sd = Mem_sw;}}, {{ 52512120Sar4jc@virginia.edu Mem_sw = Rs2_uw^Rt_sd; 52612120Sar4jc@virginia.edu Rd_sd = Rt_sd; 52712120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 52812120Sar4jc@virginia.edu 0x8: amoor_w({{Rt_sd = Mem_sw;}}, {{ 52912120Sar4jc@virginia.edu Mem_sw = Rs2_uw | Rt_sd; 53012120Sar4jc@virginia.edu Rd_sd = Rt_sd; 53112120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 53212120Sar4jc@virginia.edu 0xc: amoand_w({{Rt_sd = Mem_sw;}}, {{ 53312120Sar4jc@virginia.edu Mem_sw = Rs2_uw&Rt_sd; 53412120Sar4jc@virginia.edu Rd_sd = Rt_sd; 53512120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 53612120Sar4jc@virginia.edu 0x10: amomin_w({{Rt_sd = Mem_sw;}}, {{ 53712120Sar4jc@virginia.edu Mem_sw = min<int32_t>(Rs2_sw, Rt_sd); 53812120Sar4jc@virginia.edu Rd_sd = Rt_sd; 53912120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 54012120Sar4jc@virginia.edu 0x14: amomax_w({{Rt_sd = Mem_sw;}}, {{ 54112120Sar4jc@virginia.edu Mem_sw = max<int32_t>(Rs2_sw, Rt_sd); 54212120Sar4jc@virginia.edu Rd_sd = Rt_sd; 54312120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 54412120Sar4jc@virginia.edu 0x18: amominu_w({{Rt_sd = Mem_sw;}}, {{ 54512120Sar4jc@virginia.edu Mem_sw = min<uint32_t>(Rs2_uw, Rt_sd); 54612120Sar4jc@virginia.edu Rd_sd = Rt_sd; 54712120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 54812120Sar4jc@virginia.edu 0x1c: amomaxu_w({{Rt_sd = Mem_sw;}}, {{ 54912120Sar4jc@virginia.edu Mem_sw = max<uint32_t>(Rs2_uw, Rt_sd); 55012120Sar4jc@virginia.edu Rd_sd = Rt_sd; 55112120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 55212120Sar4jc@virginia.edu } 55311723Sar4jc@virginia.edu } 55412120Sar4jc@virginia.edu 0x3: decode AMOFUNCT { 55512120Sar4jc@virginia.edu 0x2: LoadReserved::lr_d({{ 55612120Sar4jc@virginia.edu Rd_sd = Mem_sd; 55712120Sar4jc@virginia.edu }}, mem_flags=LLSC); 55812120Sar4jc@virginia.edu 0x3: StoreCond::sc_d({{ 55912120Sar4jc@virginia.edu Mem = Rs2; 56012120Sar4jc@virginia.edu }}, {{ 56112120Sar4jc@virginia.edu Rd = result; 56212120Sar4jc@virginia.edu }}, mem_flags=LLSC, inst_flags=IsStoreConditional); 56312120Sar4jc@virginia.edu format AtomicMemOp { 56412120Sar4jc@virginia.edu 0x0: amoadd_d({{Rt_sd = Mem_sd;}}, {{ 56512120Sar4jc@virginia.edu Mem_sd = Rs2_sd + Rt_sd; 56612120Sar4jc@virginia.edu Rd_sd = Rt_sd; 56712120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 56812120Sar4jc@virginia.edu 0x1: amoswap_d({{Rt = Mem;}}, {{ 56912120Sar4jc@virginia.edu Mem = Rs2; 57012120Sar4jc@virginia.edu Rd = Rt; 57112120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 57212120Sar4jc@virginia.edu 0x4: amoxor_d({{Rt = Mem;}}, {{ 57312120Sar4jc@virginia.edu Mem = Rs2^Rt; 57412120Sar4jc@virginia.edu Rd = Rt; 57512120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 57612120Sar4jc@virginia.edu 0x8: amoor_d({{Rt = Mem;}}, {{ 57712120Sar4jc@virginia.edu Mem = Rs2 | Rt; 57812120Sar4jc@virginia.edu Rd = Rt; 57912120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 58012120Sar4jc@virginia.edu 0xc: amoand_d({{Rt = Mem;}}, {{ 58112120Sar4jc@virginia.edu Mem = Rs2&Rt; 58212120Sar4jc@virginia.edu Rd = Rt; 58312120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 58412120Sar4jc@virginia.edu 0x10: amomin_d({{Rt_sd = Mem_sd;}}, {{ 58512120Sar4jc@virginia.edu Mem_sd = min(Rs2_sd, Rt_sd); 58612120Sar4jc@virginia.edu Rd_sd = Rt_sd; 58712120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 58812120Sar4jc@virginia.edu 0x14: amomax_d({{Rt_sd = Mem_sd;}}, {{ 58912120Sar4jc@virginia.edu Mem_sd = max(Rs2_sd, Rt_sd); 59012120Sar4jc@virginia.edu Rd_sd = Rt_sd; 59112120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 59212120Sar4jc@virginia.edu 0x18: amominu_d({{Rt = Mem;}}, {{ 59312120Sar4jc@virginia.edu Mem = min(Rs2, Rt); 59412120Sar4jc@virginia.edu Rd = Rt; 59512120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 59612120Sar4jc@virginia.edu 0x1c: amomaxu_d({{Rt = Mem;}}, {{ 59712120Sar4jc@virginia.edu Mem = max(Rs2, Rt); 59812120Sar4jc@virginia.edu Rd = Rt; 59912120Sar4jc@virginia.edu }}, {{EA = Rs1;}}); 60012120Sar4jc@virginia.edu } 60112120Sar4jc@virginia.edu } 60212120Sar4jc@virginia.edu } 60312120Sar4jc@virginia.edu 0x0c: decode FUNCT3 { 60412120Sar4jc@virginia.edu format ROp { 60512120Sar4jc@virginia.edu 0x0: decode FUNCT7 { 60612120Sar4jc@virginia.edu 0x0: add({{ 60712120Sar4jc@virginia.edu Rd = Rs1_sd + Rs2_sd; 60812120Sar4jc@virginia.edu }}); 60912120Sar4jc@virginia.edu 0x1: mul({{ 61012120Sar4jc@virginia.edu Rd = Rs1_sd*Rs2_sd; 61112120Sar4jc@virginia.edu }}, IntMultOp); 61212120Sar4jc@virginia.edu 0x20: sub({{ 61312120Sar4jc@virginia.edu Rd = Rs1_sd - Rs2_sd; 61412120Sar4jc@virginia.edu }}); 61512120Sar4jc@virginia.edu } 61612120Sar4jc@virginia.edu 0x1: decode FUNCT7 { 61712120Sar4jc@virginia.edu 0x0: sll({{ 61812120Sar4jc@virginia.edu Rd = Rs1 << Rs2<5:0>; 61912120Sar4jc@virginia.edu }}); 62012120Sar4jc@virginia.edu 0x1: mulh({{ 62112120Sar4jc@virginia.edu bool negate = (Rs1_sd < 0) != (Rs2_sd < 0); 62212120Sar4jc@virginia.edu 62312120Sar4jc@virginia.edu uint64_t Rs1_lo = (uint32_t)abs(Rs1_sd); 62412120Sar4jc@virginia.edu uint64_t Rs1_hi = (uint64_t)abs(Rs1_sd) >> 32; 62512120Sar4jc@virginia.edu uint64_t Rs2_lo = (uint32_t)abs(Rs2_sd); 62612120Sar4jc@virginia.edu uint64_t Rs2_hi = (uint64_t)abs(Rs2_sd) >> 32; 62712120Sar4jc@virginia.edu 62812120Sar4jc@virginia.edu uint64_t hi = Rs1_hi*Rs2_hi; 62912120Sar4jc@virginia.edu uint64_t mid1 = Rs1_hi*Rs2_lo; 63012120Sar4jc@virginia.edu uint64_t mid2 = Rs1_lo*Rs2_hi; 63112120Sar4jc@virginia.edu uint64_t lo = Rs2_lo*Rs1_lo; 63212120Sar4jc@virginia.edu uint64_t carry = ((uint64_t)(uint32_t)mid1 63312120Sar4jc@virginia.edu + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32; 63412120Sar4jc@virginia.edu 63512120Sar4jc@virginia.edu uint64_t res = hi + 63612120Sar4jc@virginia.edu (mid1 >> 32) + 63712120Sar4jc@virginia.edu (mid2 >> 32) + 63812120Sar4jc@virginia.edu carry; 63912120Sar4jc@virginia.edu Rd = negate ? ~res + (Rs1_sd*Rs2_sd == 0 ? 1 : 0) 64012120Sar4jc@virginia.edu : res; 64112120Sar4jc@virginia.edu }}, IntMultOp); 64212120Sar4jc@virginia.edu } 64312120Sar4jc@virginia.edu 0x2: decode FUNCT7 { 64412120Sar4jc@virginia.edu 0x0: slt({{ 64512120Sar4jc@virginia.edu Rd = (Rs1_sd < Rs2_sd) ? 1 : 0; 64612120Sar4jc@virginia.edu }}); 64712120Sar4jc@virginia.edu 0x1: mulhsu({{ 64812120Sar4jc@virginia.edu bool negate = Rs1_sd < 0; 64912120Sar4jc@virginia.edu uint64_t Rs1_lo = (uint32_t)abs(Rs1_sd); 65012120Sar4jc@virginia.edu uint64_t Rs1_hi = (uint64_t)abs(Rs1_sd) >> 32; 65112120Sar4jc@virginia.edu uint64_t Rs2_lo = (uint32_t)Rs2; 65212120Sar4jc@virginia.edu uint64_t Rs2_hi = Rs2 >> 32; 65312120Sar4jc@virginia.edu 65412120Sar4jc@virginia.edu uint64_t hi = Rs1_hi*Rs2_hi; 65512120Sar4jc@virginia.edu uint64_t mid1 = Rs1_hi*Rs2_lo; 65612120Sar4jc@virginia.edu uint64_t mid2 = Rs1_lo*Rs2_hi; 65712120Sar4jc@virginia.edu uint64_t lo = Rs1_lo*Rs2_lo; 65812120Sar4jc@virginia.edu uint64_t carry = ((uint64_t)(uint32_t)mid1 65912120Sar4jc@virginia.edu + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32; 66012120Sar4jc@virginia.edu 66112120Sar4jc@virginia.edu uint64_t res = hi + 66212120Sar4jc@virginia.edu (mid1 >> 32) + 66312120Sar4jc@virginia.edu (mid2 >> 32) + 66412120Sar4jc@virginia.edu carry; 66512120Sar4jc@virginia.edu Rd = negate ? ~res + (Rs1_sd*Rs2 == 0 ? 1 : 0) : res; 66612120Sar4jc@virginia.edu }}, IntMultOp); 66712120Sar4jc@virginia.edu } 66812120Sar4jc@virginia.edu 0x3: decode FUNCT7 { 66912120Sar4jc@virginia.edu 0x0: sltu({{ 67012120Sar4jc@virginia.edu Rd = (Rs1 < Rs2) ? 1 : 0; 67112120Sar4jc@virginia.edu }}); 67212120Sar4jc@virginia.edu 0x1: mulhu({{ 67312120Sar4jc@virginia.edu uint64_t Rs1_lo = (uint32_t)Rs1; 67412120Sar4jc@virginia.edu uint64_t Rs1_hi = Rs1 >> 32; 67512120Sar4jc@virginia.edu uint64_t Rs2_lo = (uint32_t)Rs2; 67612120Sar4jc@virginia.edu uint64_t Rs2_hi = Rs2 >> 32; 67712120Sar4jc@virginia.edu 67812120Sar4jc@virginia.edu uint64_t hi = Rs1_hi*Rs2_hi; 67912120Sar4jc@virginia.edu uint64_t mid1 = Rs1_hi*Rs2_lo; 68012120Sar4jc@virginia.edu uint64_t mid2 = Rs1_lo*Rs2_hi; 68112120Sar4jc@virginia.edu uint64_t lo = Rs1_lo*Rs2_lo; 68212120Sar4jc@virginia.edu uint64_t carry = ((uint64_t)(uint32_t)mid1 68312120Sar4jc@virginia.edu + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32; 68412120Sar4jc@virginia.edu 68512120Sar4jc@virginia.edu Rd = hi + (mid1 >> 32) + (mid2 >> 32) + carry; 68612120Sar4jc@virginia.edu }}, IntMultOp); 68712120Sar4jc@virginia.edu } 68812120Sar4jc@virginia.edu 0x4: decode FUNCT7 { 68912120Sar4jc@virginia.edu 0x0: xor({{ 69012120Sar4jc@virginia.edu Rd = Rs1 ^ Rs2; 69112120Sar4jc@virginia.edu }}); 69212120Sar4jc@virginia.edu 0x1: div({{ 69312120Sar4jc@virginia.edu if (Rs2_sd == 0) { 69412120Sar4jc@virginia.edu Rd_sd = -1; 69512120Sar4jc@virginia.edu } else if (Rs1_sd == numeric_limits<int64_t>::min() 69612120Sar4jc@virginia.edu && Rs2_sd == -1) { 69712120Sar4jc@virginia.edu Rd_sd = numeric_limits<int64_t>::min(); 69812120Sar4jc@virginia.edu } else { 69912120Sar4jc@virginia.edu Rd_sd = Rs1_sd/Rs2_sd; 70012120Sar4jc@virginia.edu } 70112120Sar4jc@virginia.edu }}, IntDivOp); 70212120Sar4jc@virginia.edu } 70312120Sar4jc@virginia.edu 0x5: decode FUNCT7 { 70412120Sar4jc@virginia.edu 0x0: srl({{ 70512120Sar4jc@virginia.edu Rd = Rs1 >> Rs2<5:0>; 70612120Sar4jc@virginia.edu }}); 70712120Sar4jc@virginia.edu 0x1: divu({{ 70812120Sar4jc@virginia.edu if (Rs2 == 0) { 70912120Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 71012120Sar4jc@virginia.edu } else { 71112120Sar4jc@virginia.edu Rd = Rs1/Rs2; 71212120Sar4jc@virginia.edu } 71312120Sar4jc@virginia.edu }}, IntDivOp); 71412120Sar4jc@virginia.edu 0x20: sra({{ 71512120Sar4jc@virginia.edu Rd_sd = Rs1_sd >> Rs2<5:0>; 71612120Sar4jc@virginia.edu }}); 71712120Sar4jc@virginia.edu } 71812120Sar4jc@virginia.edu 0x6: decode FUNCT7 { 71912120Sar4jc@virginia.edu 0x0: or({{ 72012120Sar4jc@virginia.edu Rd = Rs1 | Rs2; 72112120Sar4jc@virginia.edu }}); 72212120Sar4jc@virginia.edu 0x1: rem({{ 72312120Sar4jc@virginia.edu if (Rs2_sd == 0) { 72412120Sar4jc@virginia.edu Rd = Rs1_sd; 72512120Sar4jc@virginia.edu } else if (Rs1_sd == numeric_limits<int64_t>::min() 72612120Sar4jc@virginia.edu && Rs2_sd == -1) { 72712120Sar4jc@virginia.edu Rd = 0; 72812120Sar4jc@virginia.edu } else { 72912120Sar4jc@virginia.edu Rd = Rs1_sd%Rs2_sd; 73012120Sar4jc@virginia.edu } 73112120Sar4jc@virginia.edu }}, IntDivOp); 73212120Sar4jc@virginia.edu } 73312120Sar4jc@virginia.edu 0x7: decode FUNCT7 { 73412120Sar4jc@virginia.edu 0x0: and({{ 73512120Sar4jc@virginia.edu Rd = Rs1 & Rs2; 73612120Sar4jc@virginia.edu }}); 73712120Sar4jc@virginia.edu 0x1: remu({{ 73812120Sar4jc@virginia.edu if (Rs2 == 0) { 73912120Sar4jc@virginia.edu Rd = Rs1; 74012120Sar4jc@virginia.edu } else { 74112120Sar4jc@virginia.edu Rd = Rs1%Rs2; 74212120Sar4jc@virginia.edu } 74312120Sar4jc@virginia.edu }}, IntDivOp); 74412120Sar4jc@virginia.edu } 74512120Sar4jc@virginia.edu } 74612120Sar4jc@virginia.edu } 74712120Sar4jc@virginia.edu 74812120Sar4jc@virginia.edu 0x0d: UOp::lui({{ 74912120Sar4jc@virginia.edu Rd = (uint64_t)imm; 75012120Sar4jc@virginia.edu }}); 75112120Sar4jc@virginia.edu 75212120Sar4jc@virginia.edu 0x0e: decode FUNCT3 { 75312120Sar4jc@virginia.edu format ROp { 75412120Sar4jc@virginia.edu 0x0: decode FUNCT7 { 75512120Sar4jc@virginia.edu 0x0: addw({{ 75612120Sar4jc@virginia.edu Rd_sd = Rs1_sw + Rs2_sw; 75712120Sar4jc@virginia.edu }}); 75812120Sar4jc@virginia.edu 0x1: mulw({{ 75912120Sar4jc@virginia.edu Rd_sd = (int32_t)(Rs1_sw*Rs2_sw); 76012120Sar4jc@virginia.edu }}, IntMultOp); 76112120Sar4jc@virginia.edu 0x20: subw({{ 76212120Sar4jc@virginia.edu Rd_sd = Rs1_sw - Rs2_sw; 76312120Sar4jc@virginia.edu }}); 76412120Sar4jc@virginia.edu } 76512120Sar4jc@virginia.edu 0x1: sllw({{ 76612120Sar4jc@virginia.edu Rd_sd = Rs1_sw << Rs2<4:0>; 76711723Sar4jc@virginia.edu }}); 76812120Sar4jc@virginia.edu 0x4: divw({{ 76912120Sar4jc@virginia.edu if (Rs2_sw == 0) { 77011724Sar4jc@virginia.edu Rd_sd = -1; 77112120Sar4jc@virginia.edu } else if (Rs1_sw == numeric_limits<int32_t>::min() 77212120Sar4jc@virginia.edu && Rs2_sw == -1) { 77312120Sar4jc@virginia.edu Rd_sd = numeric_limits<int32_t>::min(); 77411724Sar4jc@virginia.edu } else { 77512120Sar4jc@virginia.edu Rd_sd = Rs1_sw/Rs2_sw; 77611724Sar4jc@virginia.edu } 77711724Sar4jc@virginia.edu }}, IntDivOp); 77812120Sar4jc@virginia.edu 0x5: decode FUNCT7 { 77912120Sar4jc@virginia.edu 0x0: srlw({{ 78012807Saustinharris@utexas.edu Rd_sd = (int32_t)(Rs1_uw >> Rs2<4:0>); 78112120Sar4jc@virginia.edu }}); 78212120Sar4jc@virginia.edu 0x1: divuw({{ 78312120Sar4jc@virginia.edu if (Rs2_uw == 0) { 78413612Sgabeblack@google.com Rd_sd = numeric_limits<uint64_t>::max(); 78512120Sar4jc@virginia.edu } else { 78612120Sar4jc@virginia.edu Rd_sd = (int32_t)(Rs1_uw/Rs2_uw); 78712120Sar4jc@virginia.edu } 78812120Sar4jc@virginia.edu }}, IntDivOp); 78912120Sar4jc@virginia.edu 0x20: sraw({{ 79012120Sar4jc@virginia.edu Rd_sd = Rs1_sw >> Rs2<4:0>; 79112120Sar4jc@virginia.edu }}); 79212120Sar4jc@virginia.edu } 79312120Sar4jc@virginia.edu 0x6: remw({{ 79412120Sar4jc@virginia.edu if (Rs2_sw == 0) { 79512120Sar4jc@virginia.edu Rd_sd = Rs1_sw; 79612120Sar4jc@virginia.edu } else if (Rs1_sw == numeric_limits<int32_t>::min() 79712120Sar4jc@virginia.edu && Rs2_sw == -1) { 79812120Sar4jc@virginia.edu Rd_sd = 0; 79911724Sar4jc@virginia.edu } else { 80012120Sar4jc@virginia.edu Rd_sd = Rs1_sw%Rs2_sw; 80111724Sar4jc@virginia.edu } 80211724Sar4jc@virginia.edu }}, IntDivOp); 80312120Sar4jc@virginia.edu 0x7: remuw({{ 80412120Sar4jc@virginia.edu if (Rs2_uw == 0) { 80512120Sar4jc@virginia.edu Rd_sd = (int32_t)Rs1_uw; 80611724Sar4jc@virginia.edu } else { 80712120Sar4jc@virginia.edu Rd_sd = (int32_t)(Rs1_uw%Rs2_uw); 80811724Sar4jc@virginia.edu } 80911724Sar4jc@virginia.edu }}, IntDivOp); 81011723Sar4jc@virginia.edu } 81111723Sar4jc@virginia.edu } 81211723Sar4jc@virginia.edu 81312120Sar4jc@virginia.edu format FPROp { 81412120Sar4jc@virginia.edu 0x10: decode FUNCT2 { 81512120Sar4jc@virginia.edu 0x0: fmadd_s({{ 81612120Sar4jc@virginia.edu uint32_t temp; 81712120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 81812120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 81912120Sar4jc@virginia.edu float fs3 = reinterpret_cast<float&>(temp = Fs3_bits); 82012120Sar4jc@virginia.edu float fd; 82111723Sar4jc@virginia.edu 82212138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2) || 82312138Sgabeblack@google.com std::isnan(fs3)) { 82412120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2) 82512120Sar4jc@virginia.edu || issignalingnan(fs3)) { 82612120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 82712120Sar4jc@virginia.edu } 82812120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 82912138Sgabeblack@google.com } else if (std::isinf(fs1) || std::isinf(fs2) || 83012138Sgabeblack@google.com std::isinf(fs3)) { 83112120Sar4jc@virginia.edu if (signbit(fs1) == signbit(fs2) 83212138Sgabeblack@google.com && !std::isinf(fs3)) { 83312120Sar4jc@virginia.edu fd = numeric_limits<float>::infinity(); 83412120Sar4jc@virginia.edu } else if (signbit(fs1) != signbit(fs2) 83512138Sgabeblack@google.com && !std::isinf(fs3)) { 83612120Sar4jc@virginia.edu fd = -numeric_limits<float>::infinity(); 83712120Sar4jc@virginia.edu } else { // Fs3_sf is infinity 83812120Sar4jc@virginia.edu fd = fs3; 83912120Sar4jc@virginia.edu } 84012120Sar4jc@virginia.edu } else { 84112120Sar4jc@virginia.edu fd = fs1*fs2 + fs3; 84212120Sar4jc@virginia.edu } 84312120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 84412445Sar4jc@virginia.edu }}, FloatMultAccOp); 84512120Sar4jc@virginia.edu 0x1: fmadd_d({{ 84612138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2) || 84712138Sgabeblack@google.com std::isnan(Fs3)) { 84812120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2) 84912120Sar4jc@virginia.edu || issignalingnan(Fs3)) { 85012120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 85112120Sar4jc@virginia.edu } 85212120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 85312138Sgabeblack@google.com } else if (std::isinf(Fs1) || std::isinf(Fs2) || 85412138Sgabeblack@google.com std::isinf(Fs3)) { 85512120Sar4jc@virginia.edu if (signbit(Fs1) == signbit(Fs2) 85612138Sgabeblack@google.com && !std::isinf(Fs3)) { 85712120Sar4jc@virginia.edu Fd = numeric_limits<double>::infinity(); 85812120Sar4jc@virginia.edu } else if (signbit(Fs1) != signbit(Fs2) 85912138Sgabeblack@google.com && !std::isinf(Fs3)) { 86012120Sar4jc@virginia.edu Fd = -numeric_limits<double>::infinity(); 86112120Sar4jc@virginia.edu } else { 86212120Sar4jc@virginia.edu Fd = Fs3; 86312120Sar4jc@virginia.edu } 86412120Sar4jc@virginia.edu } else { 86512120Sar4jc@virginia.edu Fd = Fs1*Fs2 + Fs3; 86612120Sar4jc@virginia.edu } 86712445Sar4jc@virginia.edu }}, FloatMultAccOp); 86811723Sar4jc@virginia.edu } 86912120Sar4jc@virginia.edu 0x11: decode FUNCT2 { 87012120Sar4jc@virginia.edu 0x0: fmsub_s({{ 87112120Sar4jc@virginia.edu uint32_t temp; 87212120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 87312120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 87412120Sar4jc@virginia.edu float fs3 = reinterpret_cast<float&>(temp = Fs3_bits); 87512120Sar4jc@virginia.edu float fd; 87612120Sar4jc@virginia.edu 87712138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2) || 87812138Sgabeblack@google.com std::isnan(fs3)) { 87912120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2) 88012120Sar4jc@virginia.edu || issignalingnan(fs3)) { 88112120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 88212120Sar4jc@virginia.edu } 88312120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 88412138Sgabeblack@google.com } else if (std::isinf(fs1) || std::isinf(fs2) || 88512138Sgabeblack@google.com std::isinf(fs3)) { 88612120Sar4jc@virginia.edu if (signbit(fs1) == signbit(fs2) 88712138Sgabeblack@google.com && !std::isinf(fs3)) { 88812120Sar4jc@virginia.edu fd = numeric_limits<float>::infinity(); 88912120Sar4jc@virginia.edu } else if (signbit(fs1) != signbit(fs2) 89012138Sgabeblack@google.com && !std::isinf(fs3)) { 89112120Sar4jc@virginia.edu fd = -numeric_limits<float>::infinity(); 89212120Sar4jc@virginia.edu } else { // Fs3_sf is infinity 89312120Sar4jc@virginia.edu fd = -fs3; 89412120Sar4jc@virginia.edu } 89511724Sar4jc@virginia.edu } else { 89612120Sar4jc@virginia.edu fd = fs1*fs2 - fs3; 89711724Sar4jc@virginia.edu } 89812120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 89912445Sar4jc@virginia.edu }}, FloatMultAccOp); 90012120Sar4jc@virginia.edu 0x1: fmsub_d({{ 90112138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2) || 90212138Sgabeblack@google.com std::isnan(Fs3)) { 90312120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2) 90412120Sar4jc@virginia.edu || issignalingnan(Fs3)) { 90512120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 90612120Sar4jc@virginia.edu } 90712120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 90812138Sgabeblack@google.com } else if (std::isinf(Fs1) || std::isinf(Fs2) || 90912138Sgabeblack@google.com std::isinf(Fs3)) { 91012120Sar4jc@virginia.edu if (signbit(Fs1) == signbit(Fs2) 91112138Sgabeblack@google.com && !std::isinf(Fs3)) { 91212120Sar4jc@virginia.edu Fd = numeric_limits<double>::infinity(); 91312120Sar4jc@virginia.edu } else if (signbit(Fs1) != signbit(Fs2) 91412138Sgabeblack@google.com && !std::isinf(Fs3)) { 91512120Sar4jc@virginia.edu Fd = -numeric_limits<double>::infinity(); 91612120Sar4jc@virginia.edu } else { 91712120Sar4jc@virginia.edu Fd = -Fs3; 91812120Sar4jc@virginia.edu } 91912120Sar4jc@virginia.edu } else { 92012120Sar4jc@virginia.edu Fd = Fs1*Fs2 - Fs3; 92112120Sar4jc@virginia.edu } 92212445Sar4jc@virginia.edu }}, FloatMultAccOp); 92311723Sar4jc@virginia.edu } 92412120Sar4jc@virginia.edu 0x12: decode FUNCT2 { 92512120Sar4jc@virginia.edu 0x0: fnmsub_s({{ 92612120Sar4jc@virginia.edu uint32_t temp; 92712120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 92812120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 92912120Sar4jc@virginia.edu float fs3 = reinterpret_cast<float&>(temp = Fs3_bits); 93012120Sar4jc@virginia.edu float fd; 93111723Sar4jc@virginia.edu 93212138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2) || 93312138Sgabeblack@google.com std::isnan(fs3)) { 93412120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2) 93512120Sar4jc@virginia.edu || issignalingnan(fs3)) { 93612120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 93712120Sar4jc@virginia.edu } 93812120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 93912138Sgabeblack@google.com } else if (std::isinf(fs1) || std::isinf(fs2) || 94012138Sgabeblack@google.com std::isinf(fs3)) { 94112120Sar4jc@virginia.edu if (signbit(fs1) == signbit(fs2) 94212138Sgabeblack@google.com && !std::isinf(fs3)) { 94312120Sar4jc@virginia.edu fd = -numeric_limits<float>::infinity(); 94412120Sar4jc@virginia.edu } else if (signbit(fs1) != signbit(fs2) 94512138Sgabeblack@google.com && !std::isinf(fs3)) { 94612120Sar4jc@virginia.edu fd = numeric_limits<float>::infinity(); 94712120Sar4jc@virginia.edu } else { // Fs3_sf is infinity 94812120Sar4jc@virginia.edu fd = fs3; 94912120Sar4jc@virginia.edu } 95012120Sar4jc@virginia.edu } else { 95112120Sar4jc@virginia.edu fd = -(fs1*fs2 - fs3); 95212120Sar4jc@virginia.edu } 95312120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 95412445Sar4jc@virginia.edu }}, FloatMultAccOp); 95512120Sar4jc@virginia.edu 0x1: fnmsub_d({{ 95612138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2) || 95712138Sgabeblack@google.com std::isnan(Fs3)) { 95812120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2) 95912120Sar4jc@virginia.edu || issignalingnan(Fs3)) { 96012120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 96112120Sar4jc@virginia.edu } 96212120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 96312138Sgabeblack@google.com } else if (std::isinf(Fs1) || std::isinf(Fs2) 96412138Sgabeblack@google.com || std::isinf(Fs3)) { 96512120Sar4jc@virginia.edu if (signbit(Fs1) == signbit(Fs2) 96612138Sgabeblack@google.com && !std::isinf(Fs3)) { 96712120Sar4jc@virginia.edu Fd = -numeric_limits<double>::infinity(); 96812120Sar4jc@virginia.edu } else if (signbit(Fs1) != signbit(Fs2) 96912138Sgabeblack@google.com && !std::isinf(Fs3)) { 97012120Sar4jc@virginia.edu Fd = numeric_limits<double>::infinity(); 97112120Sar4jc@virginia.edu } else { 97212120Sar4jc@virginia.edu Fd = Fs3; 97312120Sar4jc@virginia.edu } 97412120Sar4jc@virginia.edu } else { 97512120Sar4jc@virginia.edu Fd = -(Fs1*Fs2 - Fs3); 97612120Sar4jc@virginia.edu } 97712445Sar4jc@virginia.edu }}, FloatMultAccOp); 97812120Sar4jc@virginia.edu } 97912120Sar4jc@virginia.edu 0x13: decode FUNCT2 { 98012120Sar4jc@virginia.edu 0x0: fnmadd_s({{ 98112120Sar4jc@virginia.edu uint32_t temp; 98212120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 98312120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 98412120Sar4jc@virginia.edu float fs3 = reinterpret_cast<float&>(temp = Fs3_bits); 98512120Sar4jc@virginia.edu float fd; 98611725Sar4jc@virginia.edu 98712138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2) || 98812138Sgabeblack@google.com std::isnan(fs3)) { 98912120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2) 99012120Sar4jc@virginia.edu || issignalingnan(fs3)) { 99112120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 99212120Sar4jc@virginia.edu } 99312120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 99412138Sgabeblack@google.com } else if (std::isinf(fs1) || std::isinf(fs2) || 99512138Sgabeblack@google.com std::isinf(fs3)) { 99612120Sar4jc@virginia.edu if (signbit(fs1) == signbit(fs2) 99712138Sgabeblack@google.com && !std::isinf(fs3)) { 99812120Sar4jc@virginia.edu fd = -numeric_limits<float>::infinity(); 99912120Sar4jc@virginia.edu } else if (signbit(fs1) != signbit(fs2) 100012138Sgabeblack@google.com && !std::isinf(fs3)) { 100112120Sar4jc@virginia.edu fd = numeric_limits<float>::infinity(); 100212120Sar4jc@virginia.edu } else { // Fs3_sf is infinity 100312120Sar4jc@virginia.edu fd = -fs3; 100412120Sar4jc@virginia.edu } 100512120Sar4jc@virginia.edu } else { 100612120Sar4jc@virginia.edu fd = -(fs1*fs2 + fs3); 100711725Sar4jc@virginia.edu } 100812120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 100912445Sar4jc@virginia.edu }}, FloatMultAccOp); 101012120Sar4jc@virginia.edu 0x1: fnmadd_d({{ 101112138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2) || 101212138Sgabeblack@google.com std::isnan(Fs3)) { 101312120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2) 101412120Sar4jc@virginia.edu || issignalingnan(Fs3)) { 101512120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 101612120Sar4jc@virginia.edu } 101712120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 101812138Sgabeblack@google.com } else if (std::isinf(Fs1) || std::isinf(Fs2) || 101912138Sgabeblack@google.com std::isinf(Fs3)) { 102012120Sar4jc@virginia.edu if (signbit(Fs1) == signbit(Fs2) 102112138Sgabeblack@google.com && !std::isinf(Fs3)) { 102212120Sar4jc@virginia.edu Fd = -numeric_limits<double>::infinity(); 102312120Sar4jc@virginia.edu } else if (signbit(Fs1) != signbit(Fs2) 102412138Sgabeblack@google.com && !std::isinf(Fs3)) { 102512120Sar4jc@virginia.edu Fd = numeric_limits<double>::infinity(); 102612120Sar4jc@virginia.edu } else { 102712120Sar4jc@virginia.edu Fd = -Fs3; 102812120Sar4jc@virginia.edu } 102912120Sar4jc@virginia.edu } else { 103012120Sar4jc@virginia.edu Fd = -(Fs1*Fs2 + Fs3); 103111725Sar4jc@virginia.edu } 103212445Sar4jc@virginia.edu }}, FloatMultAccOp); 103312120Sar4jc@virginia.edu } 103412120Sar4jc@virginia.edu 0x14: decode FUNCT7 { 103512120Sar4jc@virginia.edu 0x0: fadd_s({{ 103611725Sar4jc@virginia.edu uint32_t temp; 103711725Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 103811725Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 103911725Sar4jc@virginia.edu float fd; 104011725Sar4jc@virginia.edu 104112138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2)) { 104212120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2)) { 104312120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 104412120Sar4jc@virginia.edu } 104512120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 104611725Sar4jc@virginia.edu } else { 104712120Sar4jc@virginia.edu fd = fs1 + fs2; 104811725Sar4jc@virginia.edu } 104911725Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 105012120Sar4jc@virginia.edu }}, FloatAddOp); 105112120Sar4jc@virginia.edu 0x1: fadd_d({{ 105212138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2)) { 105312120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2)) { 105412120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 105512120Sar4jc@virginia.edu } 105612120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 105712120Sar4jc@virginia.edu } else { 105812120Sar4jc@virginia.edu Fd = Fs1 + Fs2; 105912120Sar4jc@virginia.edu } 106012120Sar4jc@virginia.edu }}, FloatAddOp); 106112120Sar4jc@virginia.edu 0x4: fsub_s({{ 106211725Sar4jc@virginia.edu uint32_t temp; 106311725Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 106411725Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 106511725Sar4jc@virginia.edu float fd; 106611725Sar4jc@virginia.edu 106712138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2)) { 106812120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2)) { 106912120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 107012120Sar4jc@virginia.edu } 107112120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 107211725Sar4jc@virginia.edu } else { 107312120Sar4jc@virginia.edu fd = fs1 - fs2; 107411725Sar4jc@virginia.edu } 107511725Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 107612120Sar4jc@virginia.edu }}, FloatAddOp); 107712120Sar4jc@virginia.edu 0x5: fsub_d({{ 107812138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2)) { 107912120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2)) { 108012120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 108112120Sar4jc@virginia.edu } 108212120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 108312120Sar4jc@virginia.edu } else { 108412120Sar4jc@virginia.edu Fd = Fs1 - Fs2; 108512120Sar4jc@virginia.edu } 108612120Sar4jc@virginia.edu }}, FloatAddOp); 108712120Sar4jc@virginia.edu 0x8: fmul_s({{ 108811725Sar4jc@virginia.edu uint32_t temp; 108911725Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 109011725Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 109111725Sar4jc@virginia.edu float fd; 109211725Sar4jc@virginia.edu 109312138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2)) { 109412120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2)) { 109512120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 109612120Sar4jc@virginia.edu } 109712120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 109811725Sar4jc@virginia.edu } else { 109912120Sar4jc@virginia.edu fd = fs1*fs2; 110011725Sar4jc@virginia.edu } 110111725Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 110212120Sar4jc@virginia.edu }}, FloatMultOp); 110312120Sar4jc@virginia.edu 0x9: fmul_d({{ 110412138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2)) { 110512120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2)) { 110612120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 110712120Sar4jc@virginia.edu } 110812120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 110911725Sar4jc@virginia.edu } else { 111012120Sar4jc@virginia.edu Fd = Fs1*Fs2; 111111725Sar4jc@virginia.edu } 111212120Sar4jc@virginia.edu }}, FloatMultOp); 111312120Sar4jc@virginia.edu 0xc: fdiv_s({{ 111411725Sar4jc@virginia.edu uint32_t temp; 111511725Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 111611725Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 111711725Sar4jc@virginia.edu float fd; 111811725Sar4jc@virginia.edu 111912138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2)) { 112012120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2)) { 112112120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 112212120Sar4jc@virginia.edu } 112312120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 112412120Sar4jc@virginia.edu } else { 112512120Sar4jc@virginia.edu fd = fs1/fs2; 112612120Sar4jc@virginia.edu } 112712120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 112812120Sar4jc@virginia.edu }}, FloatDivOp); 112912120Sar4jc@virginia.edu 0xd: fdiv_d({{ 113012138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2)) { 113112120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2)) { 113212120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 113312120Sar4jc@virginia.edu } 113412120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 113512120Sar4jc@virginia.edu } else { 113612120Sar4jc@virginia.edu Fd = Fs1/Fs2; 113712120Sar4jc@virginia.edu } 113812120Sar4jc@virginia.edu }}, FloatDivOp); 113912120Sar4jc@virginia.edu 0x10: decode ROUND_MODE { 114012120Sar4jc@virginia.edu 0x0: fsgnj_s({{ 114112120Sar4jc@virginia.edu uint32_t temp; 114212120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 114312120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 114412120Sar4jc@virginia.edu float fd; 114512120Sar4jc@virginia.edu 114612120Sar4jc@virginia.edu if (issignalingnan(fs1)) { 114712120Sar4jc@virginia.edu fd = numeric_limits<float>::signaling_NaN(); 114812120Sar4jc@virginia.edu feclearexcept(FE_INVALID); 114912120Sar4jc@virginia.edu } else { 115012120Sar4jc@virginia.edu fd = copysign(fs1, fs2); 115112120Sar4jc@virginia.edu } 115212120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 115312445Sar4jc@virginia.edu }}, FloatMiscOp); 115412120Sar4jc@virginia.edu 0x1: fsgnjn_s({{ 115512120Sar4jc@virginia.edu uint32_t temp; 115612120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 115712120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 115812120Sar4jc@virginia.edu float fd; 115912120Sar4jc@virginia.edu 116012120Sar4jc@virginia.edu if (issignalingnan(fs1)) { 116112120Sar4jc@virginia.edu fd = numeric_limits<float>::signaling_NaN(); 116212120Sar4jc@virginia.edu feclearexcept(FE_INVALID); 116312120Sar4jc@virginia.edu } else { 116412120Sar4jc@virginia.edu fd = copysign(fs1, -fs2); 116512120Sar4jc@virginia.edu } 116612120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 116712445Sar4jc@virginia.edu }}, FloatMiscOp); 116812120Sar4jc@virginia.edu 0x2: fsgnjx_s({{ 116912120Sar4jc@virginia.edu uint32_t temp; 117012120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 117112120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 117212120Sar4jc@virginia.edu float fd; 117312120Sar4jc@virginia.edu 117412120Sar4jc@virginia.edu if (issignalingnan(fs1)) { 117512120Sar4jc@virginia.edu fd = numeric_limits<float>::signaling_NaN(); 117612120Sar4jc@virginia.edu feclearexcept(FE_INVALID); 117712120Sar4jc@virginia.edu } else { 117812120Sar4jc@virginia.edu fd = fs1*(signbit(fs2) ? -1.0 : 1.0); 117912120Sar4jc@virginia.edu } 118012120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 118112445Sar4jc@virginia.edu }}, FloatMiscOp); 118212120Sar4jc@virginia.edu } 118312120Sar4jc@virginia.edu 0x11: decode ROUND_MODE { 118412120Sar4jc@virginia.edu 0x0: fsgnj_d({{ 118512120Sar4jc@virginia.edu if (issignalingnan(Fs1)) { 118612120Sar4jc@virginia.edu Fd = numeric_limits<double>::signaling_NaN(); 118712120Sar4jc@virginia.edu feclearexcept(FE_INVALID); 118812120Sar4jc@virginia.edu } else { 118912120Sar4jc@virginia.edu Fd = copysign(Fs1, Fs2); 119012120Sar4jc@virginia.edu } 119112445Sar4jc@virginia.edu }}, FloatMiscOp); 119212120Sar4jc@virginia.edu 0x1: fsgnjn_d({{ 119312120Sar4jc@virginia.edu if (issignalingnan(Fs1)) { 119412120Sar4jc@virginia.edu Fd = numeric_limits<double>::signaling_NaN(); 119512120Sar4jc@virginia.edu feclearexcept(FE_INVALID); 119612120Sar4jc@virginia.edu } else { 119712120Sar4jc@virginia.edu Fd = copysign(Fs1, -Fs2); 119812120Sar4jc@virginia.edu } 119912445Sar4jc@virginia.edu }}, FloatMiscOp); 120012120Sar4jc@virginia.edu 0x2: fsgnjx_d({{ 120112120Sar4jc@virginia.edu if (issignalingnan(Fs1)) { 120212120Sar4jc@virginia.edu Fd = numeric_limits<double>::signaling_NaN(); 120312120Sar4jc@virginia.edu feclearexcept(FE_INVALID); 120412120Sar4jc@virginia.edu } else { 120512120Sar4jc@virginia.edu Fd = Fs1*(signbit(Fs2) ? -1.0 : 1.0); 120612120Sar4jc@virginia.edu } 120712445Sar4jc@virginia.edu }}, FloatMiscOp); 120812120Sar4jc@virginia.edu } 120912120Sar4jc@virginia.edu 0x14: decode ROUND_MODE { 121012120Sar4jc@virginia.edu 0x0: fmin_s({{ 121112120Sar4jc@virginia.edu uint32_t temp; 121212120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 121312120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 121412120Sar4jc@virginia.edu float fd; 121512120Sar4jc@virginia.edu 121612120Sar4jc@virginia.edu if (issignalingnan(fs2)) { 121712120Sar4jc@virginia.edu fd = fs1; 121812120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 121912120Sar4jc@virginia.edu } else if (issignalingnan(fs1)) { 122012120Sar4jc@virginia.edu fd = fs2; 122112120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 122212120Sar4jc@virginia.edu } else { 122312120Sar4jc@virginia.edu fd = fmin(fs1, fs2); 122412120Sar4jc@virginia.edu } 122512120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 122612120Sar4jc@virginia.edu }}, FloatCmpOp); 122712120Sar4jc@virginia.edu 0x1: fmax_s({{ 122812120Sar4jc@virginia.edu uint32_t temp; 122912120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 123012120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 123112120Sar4jc@virginia.edu float fd; 123212120Sar4jc@virginia.edu 123312120Sar4jc@virginia.edu if (issignalingnan(fs2)) { 123412120Sar4jc@virginia.edu fd = fs1; 123512120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 123612120Sar4jc@virginia.edu } else if (issignalingnan(fs1)) { 123712120Sar4jc@virginia.edu fd = fs2; 123812120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 123912120Sar4jc@virginia.edu } else { 124012120Sar4jc@virginia.edu fd = fmax(fs1, fs2); 124112120Sar4jc@virginia.edu } 124212120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 124312120Sar4jc@virginia.edu }}, FloatCmpOp); 124412120Sar4jc@virginia.edu } 124512120Sar4jc@virginia.edu 0x15: decode ROUND_MODE { 124612120Sar4jc@virginia.edu 0x0: fmin_d({{ 124712120Sar4jc@virginia.edu if (issignalingnan(Fs2)) { 124812120Sar4jc@virginia.edu Fd = Fs1; 124912120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 125012120Sar4jc@virginia.edu } else if (issignalingnan(Fs1)) { 125112120Sar4jc@virginia.edu Fd = Fs2; 125212120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 125312120Sar4jc@virginia.edu } else { 125412120Sar4jc@virginia.edu Fd = fmin(Fs1, Fs2); 125512120Sar4jc@virginia.edu } 125612120Sar4jc@virginia.edu }}, FloatCmpOp); 125712120Sar4jc@virginia.edu 0x1: fmax_d({{ 125812120Sar4jc@virginia.edu if (issignalingnan(Fs2)) { 125912120Sar4jc@virginia.edu Fd = Fs1; 126012120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 126112120Sar4jc@virginia.edu } else if (issignalingnan(Fs1)) { 126212120Sar4jc@virginia.edu Fd = Fs2; 126312120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 126412120Sar4jc@virginia.edu } else { 126512120Sar4jc@virginia.edu Fd = fmax(Fs1, Fs2); 126612120Sar4jc@virginia.edu } 126712120Sar4jc@virginia.edu }}, FloatCmpOp); 126812120Sar4jc@virginia.edu } 126912120Sar4jc@virginia.edu 0x20: fcvt_s_d({{ 127012596Sqtt2@cornell.edu if (CONV_SGN != 1) { 127112849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("CONV_SGN != 1", 127212849Sar4jc@virginia.edu machInst); 127312596Sqtt2@cornell.edu } 127412120Sar4jc@virginia.edu float fd; 127512120Sar4jc@virginia.edu if (issignalingnan(Fs1)) { 127612120Sar4jc@virginia.edu fd = numeric_limits<float>::quiet_NaN(); 127711725Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 127811725Sar4jc@virginia.edu } else { 127912120Sar4jc@virginia.edu fd = (float)Fs1; 128011725Sar4jc@virginia.edu } 128111725Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 128212120Sar4jc@virginia.edu }}, FloatCvtOp); 128312120Sar4jc@virginia.edu 0x21: fcvt_d_s({{ 128412596Sqtt2@cornell.edu if (CONV_SGN != 0) { 128512849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("CONV_SGN != 0", 128612849Sar4jc@virginia.edu machInst); 128712596Sqtt2@cornell.edu } 128811725Sar4jc@virginia.edu uint32_t temp; 128911725Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 129011725Sar4jc@virginia.edu 129112120Sar4jc@virginia.edu if (issignalingnan(fs1)) { 129212120Sar4jc@virginia.edu Fd = numeric_limits<double>::quiet_NaN(); 129311725Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 129411725Sar4jc@virginia.edu } else { 129512120Sar4jc@virginia.edu Fd = (double)fs1; 129611725Sar4jc@virginia.edu } 129711725Sar4jc@virginia.edu }}, FloatCvtOp); 129812120Sar4jc@virginia.edu 0x2c: fsqrt_s({{ 129912596Sqtt2@cornell.edu if (RS2 != 0) { 130012849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x1", 130112849Sar4jc@virginia.edu machInst); 130212596Sqtt2@cornell.edu } 130311725Sar4jc@virginia.edu uint32_t temp; 130411725Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 130512120Sar4jc@virginia.edu float fd; 130611725Sar4jc@virginia.edu 130712120Sar4jc@virginia.edu if (issignalingnan(Fs1_sf)) { 130811725Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 130912120Sar4jc@virginia.edu } 131012120Sar4jc@virginia.edu fd = sqrt(fs1); 131112120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd); 131212120Sar4jc@virginia.edu }}, FloatSqrtOp); 131312120Sar4jc@virginia.edu 0x2d: fsqrt_d({{ 131412596Sqtt2@cornell.edu if (RS2 != 0) { 131512849Sar4jc@virginia.edu fault = make_shared<IllegalInstFault>("source reg x1", 131612849Sar4jc@virginia.edu machInst); 131712596Sqtt2@cornell.edu } 131812120Sar4jc@virginia.edu Fd = sqrt(Fs1); 131912120Sar4jc@virginia.edu }}, FloatSqrtOp); 132012120Sar4jc@virginia.edu 0x50: decode ROUND_MODE { 132112120Sar4jc@virginia.edu 0x0: fle_s({{ 132212120Sar4jc@virginia.edu uint32_t temp; 132312120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 132412120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 132512120Sar4jc@virginia.edu 132612138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2)) { 132712120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 132812120Sar4jc@virginia.edu Rd = 0; 132912120Sar4jc@virginia.edu } else { 133012120Sar4jc@virginia.edu Rd = fs1 <= fs2 ? 1 : 0; 133111725Sar4jc@virginia.edu } 133212120Sar4jc@virginia.edu }}, FloatCmpOp); 133312120Sar4jc@virginia.edu 0x1: flt_s({{ 133412120Sar4jc@virginia.edu uint32_t temp; 133512120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 133612120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 133712120Sar4jc@virginia.edu 133812138Sgabeblack@google.com if (std::isnan(fs1) || std::isnan(fs2)) { 133912120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 134012120Sar4jc@virginia.edu Rd = 0; 134112120Sar4jc@virginia.edu } else { 134212120Sar4jc@virginia.edu Rd = fs1 < fs2 ? 1 : 0; 134312120Sar4jc@virginia.edu } 134412120Sar4jc@virginia.edu }}, FloatCmpOp); 134512120Sar4jc@virginia.edu 0x2: feq_s({{ 134612120Sar4jc@virginia.edu uint32_t temp; 134712120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 134812120Sar4jc@virginia.edu float fs2 = reinterpret_cast<float&>(temp = Fs2_bits); 134912120Sar4jc@virginia.edu 135012120Sar4jc@virginia.edu if (issignalingnan(fs1) || issignalingnan(fs2)) { 135112120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 135212120Sar4jc@virginia.edu } 135312120Sar4jc@virginia.edu Rd = fs1 == fs2 ? 1 : 0; 135412120Sar4jc@virginia.edu }}, FloatCmpOp); 135512120Sar4jc@virginia.edu } 135612120Sar4jc@virginia.edu 0x51: decode ROUND_MODE { 135712120Sar4jc@virginia.edu 0x0: fle_d({{ 135812138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2)) { 135912120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 136012120Sar4jc@virginia.edu Rd = 0; 136112120Sar4jc@virginia.edu } else { 136212120Sar4jc@virginia.edu Rd = Fs1 <= Fs2 ? 1 : 0; 136312120Sar4jc@virginia.edu } 136412120Sar4jc@virginia.edu }}, FloatCmpOp); 136512120Sar4jc@virginia.edu 0x1: flt_d({{ 136612138Sgabeblack@google.com if (std::isnan(Fs1) || std::isnan(Fs2)) { 136712120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 136812120Sar4jc@virginia.edu Rd = 0; 136912120Sar4jc@virginia.edu } else { 137012120Sar4jc@virginia.edu Rd = Fs1 < Fs2 ? 1 : 0; 137112120Sar4jc@virginia.edu } 137212120Sar4jc@virginia.edu }}, FloatCmpOp); 137312120Sar4jc@virginia.edu 0x2: feq_d({{ 137412120Sar4jc@virginia.edu if (issignalingnan(Fs1) || issignalingnan(Fs2)) { 137512120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 137612120Sar4jc@virginia.edu } 137712120Sar4jc@virginia.edu Rd = Fs1 == Fs2 ? 1 : 0; 137812120Sar4jc@virginia.edu }}, FloatCmpOp); 137912120Sar4jc@virginia.edu } 138012120Sar4jc@virginia.edu 0x60: decode CONV_SGN { 138112120Sar4jc@virginia.edu 0x0: fcvt_w_s({{ 138212120Sar4jc@virginia.edu uint32_t temp; 138312120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 138412120Sar4jc@virginia.edu 138512138Sgabeblack@google.com if (std::isnan(fs1)) { 138612120Sar4jc@virginia.edu Rd_sd = numeric_limits<int32_t>::max(); 138712120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 138812444Sar4jc@virginia.edu } else if (fs1 >= numeric_limits<int32_t>::max()) { 138912444Sar4jc@virginia.edu Rd_sd = numeric_limits<int32_t>::max(); 139012444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 139112444Sar4jc@virginia.edu } else if (fs1 <= numeric_limits<int32_t>::min()) { 139212444Sar4jc@virginia.edu Rd_sd = numeric_limits<int32_t>::min(); 139312444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 139412120Sar4jc@virginia.edu } else { 139512120Sar4jc@virginia.edu Rd_sd = (int32_t)fs1; 139612120Sar4jc@virginia.edu } 139712120Sar4jc@virginia.edu }}, FloatCvtOp); 139812120Sar4jc@virginia.edu 0x1: fcvt_wu_s({{ 139912120Sar4jc@virginia.edu uint32_t temp; 140012120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 140112120Sar4jc@virginia.edu 140212444Sar4jc@virginia.edu if (std::isnan(fs1)) { 140312444Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 140412444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 140512444Sar4jc@virginia.edu } else if (fs1 < 0.0) { 140612120Sar4jc@virginia.edu Rd = 0; 140712120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 140812444Sar4jc@virginia.edu } else if (fs1 > numeric_limits<uint32_t>::max()) { 140912444Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 141012444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 141112120Sar4jc@virginia.edu } else { 141212120Sar4jc@virginia.edu Rd = (uint32_t)fs1; 141312120Sar4jc@virginia.edu } 141412120Sar4jc@virginia.edu }}, FloatCvtOp); 141512120Sar4jc@virginia.edu 0x2: fcvt_l_s({{ 141612120Sar4jc@virginia.edu uint32_t temp; 141712120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 141812120Sar4jc@virginia.edu 141912138Sgabeblack@google.com if (std::isnan(fs1)) { 142012120Sar4jc@virginia.edu Rd_sd = numeric_limits<int64_t>::max(); 142112120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 142212444Sar4jc@virginia.edu } else if (fs1 > numeric_limits<int64_t>::max()) { 142312444Sar4jc@virginia.edu Rd_sd = numeric_limits<int64_t>::max(); 142412444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 142512444Sar4jc@virginia.edu } else if (fs1 < numeric_limits<int64_t>::min()) { 142612444Sar4jc@virginia.edu Rd_sd = numeric_limits<int64_t>::min(); 142712444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 142812120Sar4jc@virginia.edu } else { 142912120Sar4jc@virginia.edu Rd_sd = (int64_t)fs1; 143012120Sar4jc@virginia.edu } 143112120Sar4jc@virginia.edu }}, FloatCvtOp); 143212120Sar4jc@virginia.edu 0x3: fcvt_lu_s({{ 143312120Sar4jc@virginia.edu uint32_t temp; 143412120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 143512120Sar4jc@virginia.edu 143612444Sar4jc@virginia.edu if (std::isnan(fs1)) { 143712444Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 143812444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 143912444Sar4jc@virginia.edu } else if (fs1 < 0.0) { 144012120Sar4jc@virginia.edu Rd = 0; 144112120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 144212444Sar4jc@virginia.edu } else if (fs1 > numeric_limits<uint64_t>::max()) { 144312444Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 144412444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 144512120Sar4jc@virginia.edu } else { 144612120Sar4jc@virginia.edu Rd = (uint64_t)fs1; 144712120Sar4jc@virginia.edu } 144812120Sar4jc@virginia.edu }}, FloatCvtOp); 144912120Sar4jc@virginia.edu } 145012120Sar4jc@virginia.edu 0x61: decode CONV_SGN { 145112120Sar4jc@virginia.edu 0x0: fcvt_w_d({{ 145212444Sar4jc@virginia.edu if (std::isnan(Fs1)) { 145312444Sar4jc@virginia.edu Rd_sd = numeric_limits<int32_t>::max(); 145412444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 145512444Sar4jc@virginia.edu } else if (Fs1 > numeric_limits<int32_t>::max()) { 145612444Sar4jc@virginia.edu Rd_sd = numeric_limits<int32_t>::max(); 145712444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 145812444Sar4jc@virginia.edu } else if (Fs1 < numeric_limits<int32_t>::min()) { 145912444Sar4jc@virginia.edu Rd_sd = numeric_limits<int32_t>::min(); 146012444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 146112444Sar4jc@virginia.edu } else { 146212444Sar4jc@virginia.edu Rd_sd = (int32_t)Fs1; 146312120Sar4jc@virginia.edu } 146412120Sar4jc@virginia.edu }}, FloatCvtOp); 146512120Sar4jc@virginia.edu 0x1: fcvt_wu_d({{ 146612444Sar4jc@virginia.edu if (std::isnan(Fs1)) { 146712444Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 146812444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 146912444Sar4jc@virginia.edu } else if (Fs1 < 0) { 147012120Sar4jc@virginia.edu Rd = 0; 147112120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 147212444Sar4jc@virginia.edu } else if (Fs1 > numeric_limits<uint32_t>::max()) { 147312444Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 147412444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 147512120Sar4jc@virginia.edu } else { 147612120Sar4jc@virginia.edu Rd = (uint32_t)Fs1; 147712120Sar4jc@virginia.edu } 147812120Sar4jc@virginia.edu }}, FloatCvtOp); 147912120Sar4jc@virginia.edu 0x2: fcvt_l_d({{ 148012444Sar4jc@virginia.edu if (std::isnan(Fs1)) { 148112444Sar4jc@virginia.edu Rd_sd = numeric_limits<int64_t>::max(); 148212444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 148312444Sar4jc@virginia.edu } else if (Fs1 > numeric_limits<int64_t>::max()) { 148412444Sar4jc@virginia.edu Rd_sd = numeric_limits<int64_t>::max(); 148512444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 148612444Sar4jc@virginia.edu } else if (Fs1 < numeric_limits<int64_t>::min()) { 148712444Sar4jc@virginia.edu Rd_sd = numeric_limits<int64_t>::min(); 148812444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 148912444Sar4jc@virginia.edu } else { 149012444Sar4jc@virginia.edu Rd_sd = Fs1; 149112120Sar4jc@virginia.edu } 149212120Sar4jc@virginia.edu }}, FloatCvtOp); 149312120Sar4jc@virginia.edu 0x3: fcvt_lu_d({{ 149412444Sar4jc@virginia.edu if (std::isnan(Fs1)) { 149512444Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 149612444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 149712444Sar4jc@virginia.edu } else if (Fs1 < 0) { 149812120Sar4jc@virginia.edu Rd = 0; 149912120Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 150012444Sar4jc@virginia.edu } else if (Fs1 > numeric_limits<uint64_t>::max()) { 150112444Sar4jc@virginia.edu Rd = numeric_limits<uint64_t>::max(); 150212444Sar4jc@virginia.edu FFLAGS |= FloatInvalid; 150312120Sar4jc@virginia.edu } else { 150412444Sar4jc@virginia.edu Rd = Fs1; 150512120Sar4jc@virginia.edu } 150612120Sar4jc@virginia.edu }}, FloatCvtOp); 150712120Sar4jc@virginia.edu } 150812120Sar4jc@virginia.edu 0x68: decode CONV_SGN { 150912120Sar4jc@virginia.edu 0x0: fcvt_s_w({{ 151012120Sar4jc@virginia.edu float temp = (float)Rs1_sw; 151112120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp); 151212120Sar4jc@virginia.edu }}, FloatCvtOp); 151312120Sar4jc@virginia.edu 0x1: fcvt_s_wu({{ 151412120Sar4jc@virginia.edu float temp = (float)Rs1_uw; 151512120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp); 151612120Sar4jc@virginia.edu }}, FloatCvtOp); 151712120Sar4jc@virginia.edu 0x2: fcvt_s_l({{ 151812120Sar4jc@virginia.edu float temp = (float)Rs1_sd; 151912120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp); 152012120Sar4jc@virginia.edu }}, FloatCvtOp); 152112120Sar4jc@virginia.edu 0x3: fcvt_s_lu({{ 152212120Sar4jc@virginia.edu float temp = (float)Rs1; 152312120Sar4jc@virginia.edu Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp); 152412120Sar4jc@virginia.edu }}, FloatCvtOp); 152512120Sar4jc@virginia.edu } 152612120Sar4jc@virginia.edu 0x69: decode CONV_SGN { 152712120Sar4jc@virginia.edu 0x0: fcvt_d_w({{ 152812120Sar4jc@virginia.edu Fd = (double)Rs1_sw; 152912120Sar4jc@virginia.edu }}, FloatCvtOp); 153012120Sar4jc@virginia.edu 0x1: fcvt_d_wu({{ 153112120Sar4jc@virginia.edu Fd = (double)Rs1_uw; 153212120Sar4jc@virginia.edu }}, FloatCvtOp); 153312120Sar4jc@virginia.edu 0x2: fcvt_d_l({{ 153412120Sar4jc@virginia.edu Fd = (double)Rs1_sd; 153512120Sar4jc@virginia.edu }}, FloatCvtOp); 153612120Sar4jc@virginia.edu 0x3: fcvt_d_lu({{ 153712120Sar4jc@virginia.edu Fd = (double)Rs1; 153812120Sar4jc@virginia.edu }}, FloatCvtOp); 153912120Sar4jc@virginia.edu } 154012120Sar4jc@virginia.edu 0x70: decode ROUND_MODE { 154112120Sar4jc@virginia.edu 0x0: fmv_x_s({{ 154212120Sar4jc@virginia.edu Rd = (uint32_t)Fs1_bits; 154312120Sar4jc@virginia.edu if ((Rd&0x80000000) != 0) { 154412120Sar4jc@virginia.edu Rd |= (0xFFFFFFFFULL << 32); 154512120Sar4jc@virginia.edu } 154612120Sar4jc@virginia.edu }}, FloatCvtOp); 154712120Sar4jc@virginia.edu 0x1: fclass_s({{ 154812120Sar4jc@virginia.edu uint32_t temp; 154912120Sar4jc@virginia.edu float fs1 = reinterpret_cast<float&>(temp = Fs1_bits); 155012120Sar4jc@virginia.edu switch (fpclassify(fs1)) { 155112445Sar4jc@virginia.edu case FP_INFINITE: 155212120Sar4jc@virginia.edu if (signbit(fs1)) { 155312120Sar4jc@virginia.edu Rd = 1 << 0; 155412120Sar4jc@virginia.edu } else { 155512120Sar4jc@virginia.edu Rd = 1 << 7; 155612120Sar4jc@virginia.edu } 155712120Sar4jc@virginia.edu break; 155812445Sar4jc@virginia.edu case FP_NAN: 155912120Sar4jc@virginia.edu if (issignalingnan(fs1)) { 156012120Sar4jc@virginia.edu Rd = 1 << 8; 156112120Sar4jc@virginia.edu } else { 156212120Sar4jc@virginia.edu Rd = 1 << 9; 156312120Sar4jc@virginia.edu } 156412120Sar4jc@virginia.edu break; 156512445Sar4jc@virginia.edu case FP_ZERO: 156612120Sar4jc@virginia.edu if (signbit(fs1)) { 156712120Sar4jc@virginia.edu Rd = 1 << 3; 156812120Sar4jc@virginia.edu } else { 156912120Sar4jc@virginia.edu Rd = 1 << 4; 157012120Sar4jc@virginia.edu } 157112120Sar4jc@virginia.edu break; 157212445Sar4jc@virginia.edu case FP_SUBNORMAL: 157312120Sar4jc@virginia.edu if (signbit(fs1)) { 157412120Sar4jc@virginia.edu Rd = 1 << 2; 157512120Sar4jc@virginia.edu } else { 157612120Sar4jc@virginia.edu Rd = 1 << 5; 157712120Sar4jc@virginia.edu } 157812120Sar4jc@virginia.edu break; 157912445Sar4jc@virginia.edu case FP_NORMAL: 158012120Sar4jc@virginia.edu if (signbit(fs1)) { 158112120Sar4jc@virginia.edu Rd = 1 << 1; 158212120Sar4jc@virginia.edu } else { 158312120Sar4jc@virginia.edu Rd = 1 << 6; 158412120Sar4jc@virginia.edu } 158512120Sar4jc@virginia.edu break; 158612445Sar4jc@virginia.edu default: 158712120Sar4jc@virginia.edu panic("Unknown classification for operand."); 158812120Sar4jc@virginia.edu break; 158912120Sar4jc@virginia.edu } 159012445Sar4jc@virginia.edu }}, FloatMiscOp); 159112120Sar4jc@virginia.edu } 159212120Sar4jc@virginia.edu 0x71: decode ROUND_MODE { 159312120Sar4jc@virginia.edu 0x0: fmv_x_d({{ 159412120Sar4jc@virginia.edu Rd = Fs1_bits; 159512120Sar4jc@virginia.edu }}, FloatCvtOp); 159612120Sar4jc@virginia.edu 0x1: fclass_d({{ 159712120Sar4jc@virginia.edu switch (fpclassify(Fs1)) { 159812445Sar4jc@virginia.edu case FP_INFINITE: 159912120Sar4jc@virginia.edu if (signbit(Fs1)) { 160012120Sar4jc@virginia.edu Rd = 1 << 0; 160112120Sar4jc@virginia.edu } else { 160212120Sar4jc@virginia.edu Rd = 1 << 7; 160312120Sar4jc@virginia.edu } 160412120Sar4jc@virginia.edu break; 160512445Sar4jc@virginia.edu case FP_NAN: 160612120Sar4jc@virginia.edu if (issignalingnan(Fs1)) { 160712120Sar4jc@virginia.edu Rd = 1 << 8; 160812120Sar4jc@virginia.edu } else { 160912120Sar4jc@virginia.edu Rd = 1 << 9; 161012120Sar4jc@virginia.edu } 161112120Sar4jc@virginia.edu break; 161212445Sar4jc@virginia.edu case FP_ZERO: 161312120Sar4jc@virginia.edu if (signbit(Fs1)) { 161412120Sar4jc@virginia.edu Rd = 1 << 3; 161512120Sar4jc@virginia.edu } else { 161612120Sar4jc@virginia.edu Rd = 1 << 4; 161712120Sar4jc@virginia.edu } 161812120Sar4jc@virginia.edu break; 161912445Sar4jc@virginia.edu case FP_SUBNORMAL: 162012120Sar4jc@virginia.edu if (signbit(Fs1)) { 162112120Sar4jc@virginia.edu Rd = 1 << 2; 162212120Sar4jc@virginia.edu } else { 162312120Sar4jc@virginia.edu Rd = 1 << 5; 162412120Sar4jc@virginia.edu } 162512120Sar4jc@virginia.edu break; 162612445Sar4jc@virginia.edu case FP_NORMAL: 162712120Sar4jc@virginia.edu if (signbit(Fs1)) { 162812120Sar4jc@virginia.edu Rd = 1 << 1; 162912120Sar4jc@virginia.edu } else { 163012120Sar4jc@virginia.edu Rd = 1 << 6; 163112120Sar4jc@virginia.edu } 163212120Sar4jc@virginia.edu break; 163312445Sar4jc@virginia.edu default: 163412120Sar4jc@virginia.edu panic("Unknown classification for operand."); 163512120Sar4jc@virginia.edu break; 163612120Sar4jc@virginia.edu } 163712445Sar4jc@virginia.edu }}, FloatMiscOp); 163812120Sar4jc@virginia.edu } 163912120Sar4jc@virginia.edu 0x78: fmv_s_x({{ 164012120Sar4jc@virginia.edu Fd_bits = (uint64_t)Rs1_uw; 164111725Sar4jc@virginia.edu }}, FloatCvtOp); 164212120Sar4jc@virginia.edu 0x79: fmv_d_x({{ 164312120Sar4jc@virginia.edu Fd_bits = Rs1; 164411725Sar4jc@virginia.edu }}, FloatCvtOp); 164511725Sar4jc@virginia.edu } 164612120Sar4jc@virginia.edu } 164712120Sar4jc@virginia.edu 164812120Sar4jc@virginia.edu 0x18: decode FUNCT3 { 164912120Sar4jc@virginia.edu format BOp { 165012120Sar4jc@virginia.edu 0x0: beq({{ 165112120Sar4jc@virginia.edu if (Rs1 == Rs2) { 165212120Sar4jc@virginia.edu NPC = PC + imm; 165312120Sar4jc@virginia.edu } else { 165412120Sar4jc@virginia.edu NPC = NPC; 165511725Sar4jc@virginia.edu } 165612120Sar4jc@virginia.edu }}, IsDirectControl, IsCondControl); 165712120Sar4jc@virginia.edu 0x1: bne({{ 165812120Sar4jc@virginia.edu if (Rs1 != Rs2) { 165912120Sar4jc@virginia.edu NPC = PC + imm; 166011725Sar4jc@virginia.edu } else { 166112120Sar4jc@virginia.edu NPC = NPC; 166211725Sar4jc@virginia.edu } 166312120Sar4jc@virginia.edu }}, IsDirectControl, IsCondControl); 166412120Sar4jc@virginia.edu 0x4: blt({{ 166512120Sar4jc@virginia.edu if (Rs1_sd < Rs2_sd) { 166612120Sar4jc@virginia.edu NPC = PC + imm; 166712120Sar4jc@virginia.edu } else { 166812120Sar4jc@virginia.edu NPC = NPC; 166911725Sar4jc@virginia.edu } 167012120Sar4jc@virginia.edu }}, IsDirectControl, IsCondControl); 167112120Sar4jc@virginia.edu 0x5: bge({{ 167212120Sar4jc@virginia.edu if (Rs1_sd >= Rs2_sd) { 167312120Sar4jc@virginia.edu NPC = PC + imm; 167411725Sar4jc@virginia.edu } else { 167512120Sar4jc@virginia.edu NPC = NPC; 167611725Sar4jc@virginia.edu } 167712120Sar4jc@virginia.edu }}, IsDirectControl, IsCondControl); 167812120Sar4jc@virginia.edu 0x6: bltu({{ 167912120Sar4jc@virginia.edu if (Rs1 < Rs2) { 168012120Sar4jc@virginia.edu NPC = PC + imm; 168112120Sar4jc@virginia.edu } else { 168212120Sar4jc@virginia.edu NPC = NPC; 168312120Sar4jc@virginia.edu } 168412120Sar4jc@virginia.edu }}, IsDirectControl, IsCondControl); 168512120Sar4jc@virginia.edu 0x7: bgeu({{ 168612120Sar4jc@virginia.edu if (Rs1 >= Rs2) { 168712120Sar4jc@virginia.edu NPC = PC + imm; 168812120Sar4jc@virginia.edu } else { 168912120Sar4jc@virginia.edu NPC = NPC; 169012120Sar4jc@virginia.edu } 169112120Sar4jc@virginia.edu }}, IsDirectControl, IsCondControl); 169211725Sar4jc@virginia.edu } 169312120Sar4jc@virginia.edu } 169412120Sar4jc@virginia.edu 169512120Sar4jc@virginia.edu 0x19: decode FUNCT3 { 169612120Sar4jc@virginia.edu 0x0: Jump::jalr({{ 169712120Sar4jc@virginia.edu Rd = NPC; 169812120Sar4jc@virginia.edu NPC = (imm + Rs1) & (~0x1); 169912120Sar4jc@virginia.edu }}, IsIndirectControl, IsUncondControl, IsCall); 170012120Sar4jc@virginia.edu } 170112120Sar4jc@virginia.edu 170212120Sar4jc@virginia.edu 0x1b: JOp::jal({{ 170312120Sar4jc@virginia.edu Rd = NPC; 170412120Sar4jc@virginia.edu NPC = PC + imm; 170512120Sar4jc@virginia.edu }}, IsDirectControl, IsUncondControl, IsCall); 170612120Sar4jc@virginia.edu 170712120Sar4jc@virginia.edu 0x1c: decode FUNCT3 { 170812120Sar4jc@virginia.edu format SystemOp { 170912120Sar4jc@virginia.edu 0x0: decode FUNCT12 { 171012120Sar4jc@virginia.edu 0x0: ecall({{ 171112850Salec.roelke@gmail.com fault = make_shared<SyscallFault>( 171212850Salec.roelke@gmail.com (PrivilegeMode)xc->readMiscReg(MISCREG_PRV)); 171312120Sar4jc@virginia.edu }}, IsSerializeAfter, IsNonSpeculative, IsSyscall, 171412120Sar4jc@virginia.edu No_OpClass); 171512120Sar4jc@virginia.edu 0x1: ebreak({{ 171612849Sar4jc@virginia.edu fault = make_shared<BreakpointFault>(xc->pcState()); 171712120Sar4jc@virginia.edu }}, IsSerializeAfter, IsNonSpeculative, No_OpClass); 171812850Salec.roelke@gmail.com 0x2: uret({{ 171912850Salec.roelke@gmail.com STATUS status = xc->readMiscReg(MISCREG_STATUS); 172012850Salec.roelke@gmail.com status.uie = status.upie; 172112850Salec.roelke@gmail.com status.upie = 1; 172212850Salec.roelke@gmail.com xc->setMiscReg(MISCREG_STATUS, status); 172312850Salec.roelke@gmail.com NPC = xc->readMiscReg(MISCREG_UEPC); 172412850Salec.roelke@gmail.com }}, IsReturn); 172512850Salec.roelke@gmail.com 0x102: sret({{ 172612850Salec.roelke@gmail.com if (xc->readMiscReg(MISCREG_PRV) == PRV_U) { 172712850Salec.roelke@gmail.com fault = make_shared<IllegalInstFault>( 172812850Salec.roelke@gmail.com "sret in user mode", machInst); 172912850Salec.roelke@gmail.com NPC = NPC; 173012850Salec.roelke@gmail.com } else { 173112850Salec.roelke@gmail.com STATUS status = xc->readMiscReg(MISCREG_STATUS); 173212850Salec.roelke@gmail.com xc->setMiscReg(MISCREG_PRV, status.spp); 173312850Salec.roelke@gmail.com status.sie = status.spie; 173412850Salec.roelke@gmail.com status.spie = 1; 173512850Salec.roelke@gmail.com status.spp = PRV_U; 173612850Salec.roelke@gmail.com xc->setMiscReg(MISCREG_STATUS, status); 173712850Salec.roelke@gmail.com NPC = xc->readMiscReg(MISCREG_SEPC); 173812850Salec.roelke@gmail.com } 173912850Salec.roelke@gmail.com }}, IsReturn); 174012850Salec.roelke@gmail.com 0x302: mret({{ 174112850Salec.roelke@gmail.com if (xc->readMiscReg(MISCREG_PRV) != PRV_M) { 174212850Salec.roelke@gmail.com fault = make_shared<IllegalInstFault>( 174312850Salec.roelke@gmail.com "mret at lower privilege", machInst); 174412850Salec.roelke@gmail.com NPC = NPC; 174512850Salec.roelke@gmail.com } else { 174612850Salec.roelke@gmail.com STATUS status = xc->readMiscReg(MISCREG_STATUS); 174712850Salec.roelke@gmail.com xc->setMiscReg(MISCREG_PRV, status.mpp); 174812850Salec.roelke@gmail.com status.mie = status.mpie; 174912850Salec.roelke@gmail.com status.mpie = 1; 175012850Salec.roelke@gmail.com status.mpp = PRV_U; 175112850Salec.roelke@gmail.com xc->setMiscReg(MISCREG_STATUS, status); 175212850Salec.roelke@gmail.com NPC = xc->readMiscReg(MISCREG_MEPC); 175312850Salec.roelke@gmail.com } 175412850Salec.roelke@gmail.com }}, IsReturn); 175512120Sar4jc@virginia.edu } 175611725Sar4jc@virginia.edu } 175712120Sar4jc@virginia.edu format CSROp { 175812120Sar4jc@virginia.edu 0x1: csrrw({{ 175912695Sar4jc@virginia.edu Rd = data; 176012695Sar4jc@virginia.edu data = Rs1; 176112120Sar4jc@virginia.edu }}, IsNonSpeculative, No_OpClass); 176212120Sar4jc@virginia.edu 0x2: csrrs({{ 176312695Sar4jc@virginia.edu Rd = data; 176412695Sar4jc@virginia.edu data |= Rs1; 176512120Sar4jc@virginia.edu }}, IsNonSpeculative, No_OpClass); 176612120Sar4jc@virginia.edu 0x3: csrrc({{ 176712695Sar4jc@virginia.edu Rd = data; 176812695Sar4jc@virginia.edu data &= ~Rs1; 176912120Sar4jc@virginia.edu }}, IsNonSpeculative, No_OpClass); 177012120Sar4jc@virginia.edu 0x5: csrrwi({{ 177112695Sar4jc@virginia.edu Rd = data; 177212695Sar4jc@virginia.edu data = uimm; 177312120Sar4jc@virginia.edu }}, IsNonSpeculative, No_OpClass); 177412120Sar4jc@virginia.edu 0x6: csrrsi({{ 177512695Sar4jc@virginia.edu Rd = data; 177612695Sar4jc@virginia.edu data |= uimm; 177712120Sar4jc@virginia.edu }}, IsNonSpeculative, No_OpClass); 177812120Sar4jc@virginia.edu 0x7: csrrci({{ 177912695Sar4jc@virginia.edu Rd = data; 178012695Sar4jc@virginia.edu data &= ~uimm; 178112120Sar4jc@virginia.edu }}, IsNonSpeculative, No_OpClass); 178211725Sar4jc@virginia.edu } 178311725Sar4jc@virginia.edu } 178411725Sar4jc@virginia.edu } 178512138Sgabeblack@google.com} 1786