decoder.isa revision 12695
111723Sar4jc@virginia.edu// -*- mode:c++ -*-
211723Sar4jc@virginia.edu
311723Sar4jc@virginia.edu// Copyright (c) 2015 RISC-V Foundation
412120Sar4jc@virginia.edu// Copyright (c) 2017 The University of Virginia
511723Sar4jc@virginia.edu// All rights reserved.
611723Sar4jc@virginia.edu//
711723Sar4jc@virginia.edu// Redistribution and use in source and binary forms, with or without
811723Sar4jc@virginia.edu// modification, are permitted provided that the following conditions are
911723Sar4jc@virginia.edu// met: redistributions of source code must retain the above copyright
1011723Sar4jc@virginia.edu// notice, this list of conditions and the following disclaimer;
1111723Sar4jc@virginia.edu// redistributions in binary form must reproduce the above copyright
1211723Sar4jc@virginia.edu// notice, this list of conditions and the following disclaimer in the
1311723Sar4jc@virginia.edu// documentation and/or other materials provided with the distribution;
1411723Sar4jc@virginia.edu// neither the name of the copyright holders nor the names of its
1511723Sar4jc@virginia.edu// contributors may be used to endorse or promote products derived from
1611723Sar4jc@virginia.edu// this software without specific prior written permission.
1711723Sar4jc@virginia.edu//
1811723Sar4jc@virginia.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1911723Sar4jc@virginia.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
2011723Sar4jc@virginia.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2111723Sar4jc@virginia.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2211723Sar4jc@virginia.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2311723Sar4jc@virginia.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2411723Sar4jc@virginia.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2511723Sar4jc@virginia.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2611723Sar4jc@virginia.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2711723Sar4jc@virginia.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2811723Sar4jc@virginia.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2911723Sar4jc@virginia.edu//
3011723Sar4jc@virginia.edu// Authors: Alec Roelke
3111723Sar4jc@virginia.edu
3211723Sar4jc@virginia.edu////////////////////////////////////////////////////////////////////
3311723Sar4jc@virginia.edu//
3411723Sar4jc@virginia.edu// The RISC-V ISA decoder
3511723Sar4jc@virginia.edu//
3611723Sar4jc@virginia.edu
3712120Sar4jc@virginia.edudecode QUADRANT default Unknown::unknown() {
3812120Sar4jc@virginia.edu    0x0: decode COPCODE {
3912428Sar4jc@virginia.edu        0x0: CIOp::c_addi4spn({{
4012120Sar4jc@virginia.edu            imm = CIMM8<1:1> << 2 |
4112120Sar4jc@virginia.edu                  CIMM8<0:0> << 3 |
4212120Sar4jc@virginia.edu                  CIMM8<7:6> << 4 |
4312120Sar4jc@virginia.edu                  CIMM8<5:2> << 6;
4412120Sar4jc@virginia.edu        }}, {{
4512136Sar4jc@virginia.edu            if (machInst == 0)
4612136Sar4jc@virginia.edu                fault = make_shared<IllegalInstFault>("zero instruction");
4712120Sar4jc@virginia.edu            Rp2 = sp + imm;
4812428Sar4jc@virginia.edu        }}, uint64_t);
4912120Sar4jc@virginia.edu        format CompressedLoad {
5012120Sar4jc@virginia.edu            0x1: c_fld({{
5112322Sar4jc@virginia.edu                offset = CIMM3 << 3 | CIMM2 << 6;
5212120Sar4jc@virginia.edu            }}, {{
5312120Sar4jc@virginia.edu                Fp2_bits = Mem;
5412120Sar4jc@virginia.edu            }}, {{
5512322Sar4jc@virginia.edu                EA = Rp1 + offset;
5611723Sar4jc@virginia.edu            }});
5712120Sar4jc@virginia.edu            0x2: c_lw({{
5812322Sar4jc@virginia.edu                offset = CIMM2<1:1> << 2 |
5912322Sar4jc@virginia.edu                         CIMM3 << 3 |
6012322Sar4jc@virginia.edu                         CIMM2<0:0> << 6;
6112120Sar4jc@virginia.edu            }}, {{
6212120Sar4jc@virginia.edu                Rp2_sd = Mem_sw;
6312120Sar4jc@virginia.edu            }}, {{
6412322Sar4jc@virginia.edu                EA = Rp1 + offset;
6511723Sar4jc@virginia.edu            }});
6612120Sar4jc@virginia.edu            0x3: c_ld({{
6712322Sar4jc@virginia.edu                offset = CIMM3 << 3 | CIMM2 << 6;
6812120Sar4jc@virginia.edu            }}, {{
6912120Sar4jc@virginia.edu                Rp2_sd = Mem_sd;
7012120Sar4jc@virginia.edu            }}, {{
7112322Sar4jc@virginia.edu                EA = Rp1 + offset;
7211723Sar4jc@virginia.edu            }});
7312120Sar4jc@virginia.edu        }
7412120Sar4jc@virginia.edu        format CompressedStore {
7512120Sar4jc@virginia.edu            0x5: c_fsd({{
7612322Sar4jc@virginia.edu                offset = CIMM3 << 3 | CIMM2 << 6;
7712120Sar4jc@virginia.edu            }}, {{
7812120Sar4jc@virginia.edu                Mem = Fp2_bits;
7912120Sar4jc@virginia.edu            }}, {{
8012322Sar4jc@virginia.edu                EA = Rp1 + offset;
8111723Sar4jc@virginia.edu            }});
8212120Sar4jc@virginia.edu            0x6: c_sw({{
8312322Sar4jc@virginia.edu                offset = CIMM2<1:1> << 2 |
8412322Sar4jc@virginia.edu                         CIMM3 << 3 |
8512322Sar4jc@virginia.edu                         CIMM2<0:0> << 6;
8612120Sar4jc@virginia.edu            }}, {{
8712120Sar4jc@virginia.edu                Mem_uw = Rp2_uw;
8812120Sar4jc@virginia.edu            }}, ea_code={{
8912322Sar4jc@virginia.edu                EA = Rp1 + offset;
9011723Sar4jc@virginia.edu            }});
9112120Sar4jc@virginia.edu            0x7: c_sd({{
9212322Sar4jc@virginia.edu                offset = CIMM3 << 3 | CIMM2 << 6;
9312120Sar4jc@virginia.edu            }}, {{
9412120Sar4jc@virginia.edu                    Mem_ud = Rp2_ud;
9512120Sar4jc@virginia.edu            }}, {{
9612322Sar4jc@virginia.edu                EA = Rp1 + offset;
9711723Sar4jc@virginia.edu            }});
9811723Sar4jc@virginia.edu        }
9911723Sar4jc@virginia.edu    }
10012120Sar4jc@virginia.edu    0x1: decode COPCODE {
10112120Sar4jc@virginia.edu        format CIOp {
10212120Sar4jc@virginia.edu            0x0: c_addi({{
10312120Sar4jc@virginia.edu                imm = CIMM5;
10412120Sar4jc@virginia.edu                if (CIMM1 > 0)
10512120Sar4jc@virginia.edu                    imm |= ~((uint64_t)0x1F);
10612120Sar4jc@virginia.edu            }}, {{
10712136Sar4jc@virginia.edu                if ((RC1 == 0) != (imm == 0)) {
10812136Sar4jc@virginia.edu                    if (RC1 == 0) {
10912136Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("source reg x0");
11012136Sar4jc@virginia.edu                    } else // imm == 0
11112136Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("immediate = 0");
11212136Sar4jc@virginia.edu                }
11312120Sar4jc@virginia.edu                Rc1_sd = Rc1_sd + imm;
11412120Sar4jc@virginia.edu            }});
11512120Sar4jc@virginia.edu            0x1: c_addiw({{
11612120Sar4jc@virginia.edu                imm = CIMM5;
11712120Sar4jc@virginia.edu                if (CIMM1 > 0)
11812120Sar4jc@virginia.edu                    imm |= ~((uint64_t)0x1F);
11912120Sar4jc@virginia.edu            }}, {{
12012596Sqtt2@cornell.edu                if (RC1 == 0) {
12112596Sqtt2@cornell.edu                    fault = make_shared<IllegalInstFault>("source reg x0");
12212596Sqtt2@cornell.edu                }
12312120Sar4jc@virginia.edu                Rc1_sd = (int32_t)Rc1_sd + imm;
12412120Sar4jc@virginia.edu            }});
12512120Sar4jc@virginia.edu            0x2: c_li({{
12612120Sar4jc@virginia.edu                imm = CIMM5;
12712120Sar4jc@virginia.edu                if (CIMM1 > 0)
12812120Sar4jc@virginia.edu                    imm |= ~((uint64_t)0x1F);
12912120Sar4jc@virginia.edu            }}, {{
13012596Sqtt2@cornell.edu                if (RC1 == 0) {
13112596Sqtt2@cornell.edu                    fault = make_shared<IllegalInstFault>("source reg x0");
13212596Sqtt2@cornell.edu                }
13312120Sar4jc@virginia.edu                Rc1_sd = imm;
13412120Sar4jc@virginia.edu            }});
13512120Sar4jc@virginia.edu            0x3: decode RC1 {
13612120Sar4jc@virginia.edu                0x2: c_addi16sp({{
13712120Sar4jc@virginia.edu                    imm = CIMM5<4:4> << 4 |
13812120Sar4jc@virginia.edu                          CIMM5<0:0> << 5 |
13912120Sar4jc@virginia.edu                          CIMM5<3:3> << 6 |
14012120Sar4jc@virginia.edu                          CIMM5<2:1> << 7;
14112120Sar4jc@virginia.edu                    if (CIMM1 > 0)
14212120Sar4jc@virginia.edu                        imm |= ~((int64_t)0x1FF);
14312120Sar4jc@virginia.edu                }}, {{
14412596Sqtt2@cornell.edu                    if (imm == 0) {
14512596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("immediate = 0");
14612596Sqtt2@cornell.edu                    }
14712120Sar4jc@virginia.edu                    sp_sd = sp_sd + imm;
14812120Sar4jc@virginia.edu                }});
14912120Sar4jc@virginia.edu                default: c_lui({{
15012120Sar4jc@virginia.edu                    imm = CIMM5 << 12;
15112120Sar4jc@virginia.edu                    if (CIMM1 > 0)
15212120Sar4jc@virginia.edu                        imm |= ~((uint64_t)0x1FFFF);
15312120Sar4jc@virginia.edu                }}, {{
15412596Sqtt2@cornell.edu                    if (RC1 == 0 || RC1 == 2) {
15512596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("source reg x0");
15612596Sqtt2@cornell.edu                    }
15712596Sqtt2@cornell.edu                    if (imm == 0) {
15812596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("immediate = 0");
15912596Sqtt2@cornell.edu                    }
16012120Sar4jc@virginia.edu                    Rc1_sd = imm;
16112120Sar4jc@virginia.edu                }});
16212120Sar4jc@virginia.edu            }
16312120Sar4jc@virginia.edu        }
16412120Sar4jc@virginia.edu        0x4: decode CFUNCT2HIGH {
16512428Sar4jc@virginia.edu            format CIOp {
16612120Sar4jc@virginia.edu                0x0: c_srli({{
16712120Sar4jc@virginia.edu                    imm = CIMM5 | (CIMM1 << 5);
16812120Sar4jc@virginia.edu                }}, {{
16912596Sqtt2@cornell.edu                    if (imm == 0) {
17012596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("immediate = 0");
17112596Sqtt2@cornell.edu                    }
17212120Sar4jc@virginia.edu                    Rp1 = Rp1 >> imm;
17312428Sar4jc@virginia.edu                }}, uint64_t);
17412120Sar4jc@virginia.edu                0x1: c_srai({{
17512120Sar4jc@virginia.edu                    imm = CIMM5 | (CIMM1 << 5);
17612120Sar4jc@virginia.edu                }}, {{
17712596Sqtt2@cornell.edu                    if (imm == 0) {
17812596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("immediate = 0");
17912596Sqtt2@cornell.edu                    }
18012120Sar4jc@virginia.edu                    Rp1_sd = Rp1_sd >> imm;
18112428Sar4jc@virginia.edu                }}, uint64_t);
18212120Sar4jc@virginia.edu                0x2: c_andi({{
18312120Sar4jc@virginia.edu                    imm = CIMM5;
18412120Sar4jc@virginia.edu                    if (CIMM1 > 0)
18512120Sar4jc@virginia.edu                        imm |= ~((uint64_t)0x1F);
18612120Sar4jc@virginia.edu                }}, {{
18712120Sar4jc@virginia.edu                    Rp1 = Rp1 & imm;
18812428Sar4jc@virginia.edu                }}, uint64_t);
18912120Sar4jc@virginia.edu            }
19012120Sar4jc@virginia.edu            format ROp {
19112120Sar4jc@virginia.edu                0x3: decode CFUNCT1 {
19212120Sar4jc@virginia.edu                    0x0: decode CFUNCT2LOW {
19312120Sar4jc@virginia.edu                        0x0: c_sub({{
19412120Sar4jc@virginia.edu                            Rp1 = Rp1 - Rp2;
19512120Sar4jc@virginia.edu                        }});
19612120Sar4jc@virginia.edu                        0x1: c_xor({{
19712120Sar4jc@virginia.edu                            Rp1 = Rp1 ^ Rp2;
19812120Sar4jc@virginia.edu                        }});
19912120Sar4jc@virginia.edu                        0x2: c_or({{
20012120Sar4jc@virginia.edu                            Rp1 = Rp1 | Rp2;
20112120Sar4jc@virginia.edu                        }});
20212120Sar4jc@virginia.edu                        0x3: c_and({{
20312120Sar4jc@virginia.edu                            Rp1 = Rp1 & Rp2;
20412120Sar4jc@virginia.edu                        }});
20512120Sar4jc@virginia.edu                    }
20612120Sar4jc@virginia.edu                    0x1: decode CFUNCT2LOW {
20712120Sar4jc@virginia.edu                        0x0: c_subw({{
20812120Sar4jc@virginia.edu                            Rp1_sd = (int32_t)Rp1_sd - Rp2_sw;
20912120Sar4jc@virginia.edu                        }});
21012120Sar4jc@virginia.edu                        0x1: c_addw({{
21112120Sar4jc@virginia.edu                            Rp1_sd = (int32_t)Rp1_sd + Rp2_sw;
21212120Sar4jc@virginia.edu                        }});
21312120Sar4jc@virginia.edu                    }
21412120Sar4jc@virginia.edu                }
21512120Sar4jc@virginia.edu            }
21612120Sar4jc@virginia.edu        }
21712120Sar4jc@virginia.edu        0x5: JOp::c_j({{
21812120Sar4jc@virginia.edu            int64_t offset = CJUMPIMM<3:1> << 1 |
21912322Sar4jc@virginia.edu                             CJUMPIMM<9:9> << 4 |
22012322Sar4jc@virginia.edu                             CJUMPIMM<0:0> << 5 |
22112322Sar4jc@virginia.edu                             CJUMPIMM<5:5> << 6 |
22212322Sar4jc@virginia.edu                             CJUMPIMM<4:4> << 7 |
22312322Sar4jc@virginia.edu                             CJUMPIMM<8:7> << 8 |
22412322Sar4jc@virginia.edu                             CJUMPIMM<6:6> << 10;
22512120Sar4jc@virginia.edu            if (CJUMPIMM<10:10> > 0)
22612120Sar4jc@virginia.edu                offset |= ~((int64_t)0x7FF);
22712120Sar4jc@virginia.edu            NPC = PC + offset;
22812120Sar4jc@virginia.edu        }}, IsIndirectControl, IsUncondControl, IsCall);
22912535Sar4jc@virginia.edu        format CBOp {
23012120Sar4jc@virginia.edu            0x6: c_beqz({{
23112120Sar4jc@virginia.edu                if (Rp1 == 0)
23212535Sar4jc@virginia.edu                    NPC = PC + imm;
23312120Sar4jc@virginia.edu                else
23412120Sar4jc@virginia.edu                    NPC = NPC;
23512120Sar4jc@virginia.edu            }}, IsDirectControl, IsCondControl);
23612120Sar4jc@virginia.edu            0x7: c_bnez({{
23712120Sar4jc@virginia.edu                if (Rp1 != 0)
23812535Sar4jc@virginia.edu                    NPC = PC + imm;
23912120Sar4jc@virginia.edu                else
24012120Sar4jc@virginia.edu                    NPC = NPC;
24112120Sar4jc@virginia.edu            }}, IsDirectControl, IsCondControl);
24212120Sar4jc@virginia.edu        }
24312120Sar4jc@virginia.edu    }
24412120Sar4jc@virginia.edu    0x2: decode COPCODE {
24512428Sar4jc@virginia.edu        0x0: CIOp::c_slli({{
24612120Sar4jc@virginia.edu            imm = CIMM5 | (CIMM1 << 5);
24712120Sar4jc@virginia.edu        }}, {{
24812596Sqtt2@cornell.edu            if (imm == 0) {
24912596Sqtt2@cornell.edu                fault = make_shared<IllegalInstFault>("immediate = 0");
25012596Sqtt2@cornell.edu            }
25112596Sqtt2@cornell.edu            if (RC1 == 0) {
25212596Sqtt2@cornell.edu                fault = make_shared<IllegalInstFault>("source reg x0");
25312596Sqtt2@cornell.edu            }
25412120Sar4jc@virginia.edu            Rc1 = Rc1 << imm;
25512428Sar4jc@virginia.edu        }}, uint64_t);
25612120Sar4jc@virginia.edu        format CompressedLoad {
25712120Sar4jc@virginia.edu            0x1: c_fldsp({{
25812322Sar4jc@virginia.edu                offset = CIMM5<4:3> << 3 |
25912322Sar4jc@virginia.edu                         CIMM1 << 5 |
26012322Sar4jc@virginia.edu                         CIMM5<2:0> << 6;
26112120Sar4jc@virginia.edu            }}, {{
26212120Sar4jc@virginia.edu                Fc1_bits = Mem;
26312120Sar4jc@virginia.edu            }}, {{
26412322Sar4jc@virginia.edu                EA = sp + offset;
26511725Sar4jc@virginia.edu            }});
26612120Sar4jc@virginia.edu            0x2: c_lwsp({{
26712322Sar4jc@virginia.edu                offset = CIMM5<4:2> << 2 |
26812322Sar4jc@virginia.edu                         CIMM1 << 5 |
26912322Sar4jc@virginia.edu                         CIMM5<1:0> << 6;
27012120Sar4jc@virginia.edu            }}, {{
27112596Sqtt2@cornell.edu                if (RC1 == 0) {
27212596Sqtt2@cornell.edu                    fault = make_shared<IllegalInstFault>("source reg x0");
27312596Sqtt2@cornell.edu                }
27412120Sar4jc@virginia.edu                Rc1_sd = Mem_sw;
27512120Sar4jc@virginia.edu            }}, {{
27612322Sar4jc@virginia.edu                EA = sp + offset;
27712120Sar4jc@virginia.edu            }});
27812120Sar4jc@virginia.edu            0x3: c_ldsp({{
27912322Sar4jc@virginia.edu                offset = CIMM5<4:3> << 3 |
28012322Sar4jc@virginia.edu                         CIMM1 << 5 |
28112322Sar4jc@virginia.edu                         CIMM5<2:0> << 6;
28212120Sar4jc@virginia.edu            }}, {{
28312596Sqtt2@cornell.edu                if (RC1 == 0) {
28412596Sqtt2@cornell.edu                    fault = make_shared<IllegalInstFault>("source reg x0");
28512596Sqtt2@cornell.edu                }
28612120Sar4jc@virginia.edu                Rc1_sd = Mem_sd;
28712120Sar4jc@virginia.edu            }}, {{
28812322Sar4jc@virginia.edu                EA = sp + offset;
28912120Sar4jc@virginia.edu            }});
29012120Sar4jc@virginia.edu        }
29112120Sar4jc@virginia.edu        0x4: decode CFUNCT1 {
29212120Sar4jc@virginia.edu            0x0: decode RC2 {
29312120Sar4jc@virginia.edu                0x0: Jump::c_jr({{
29412596Sqtt2@cornell.edu                    if (RC1 == 0) {
29512596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("source reg x0");
29612596Sqtt2@cornell.edu                    }
29712120Sar4jc@virginia.edu                    NPC = Rc1;
29812120Sar4jc@virginia.edu                }}, IsIndirectControl, IsUncondControl, IsCall);
29912120Sar4jc@virginia.edu                default: CROp::c_mv({{
30012596Sqtt2@cornell.edu                    if (RC1 == 0) {
30112596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("source reg x0");
30212596Sqtt2@cornell.edu                    }
30312120Sar4jc@virginia.edu                    Rc1 = Rc2;
30412120Sar4jc@virginia.edu                }});
30512120Sar4jc@virginia.edu            }
30612120Sar4jc@virginia.edu            0x1: decode RC1 {
30712120Sar4jc@virginia.edu                0x0: SystemOp::c_ebreak({{
30812596Sqtt2@cornell.edu                    if (RC2 != 0) {
30912596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("source reg x1");
31012596Sqtt2@cornell.edu                    }
31112120Sar4jc@virginia.edu                    fault = make_shared<BreakpointFault>();
31212120Sar4jc@virginia.edu                }}, IsSerializeAfter, IsNonSpeculative, No_OpClass);
31312120Sar4jc@virginia.edu                default: decode RC2 {
31412120Sar4jc@virginia.edu                    0x0: Jump::c_jalr({{
31512596Sqtt2@cornell.edu                        if (RC1 == 0) {
31612596Sqtt2@cornell.edu                            fault = make_shared<IllegalInstFault>
31712596Sqtt2@cornell.edu                                                        ("source reg x0");
31812596Sqtt2@cornell.edu                        }
31912120Sar4jc@virginia.edu                        ra = NPC;
32012120Sar4jc@virginia.edu                        NPC = Rc1;
32112120Sar4jc@virginia.edu                    }}, IsIndirectControl, IsUncondControl, IsCall);
32212120Sar4jc@virginia.edu                    default: ROp::c_add({{
32312120Sar4jc@virginia.edu                        Rc1_sd = Rc1_sd + Rc2_sd;
32412120Sar4jc@virginia.edu                    }});
32512120Sar4jc@virginia.edu                }
32612120Sar4jc@virginia.edu            }
32712120Sar4jc@virginia.edu        }
32812120Sar4jc@virginia.edu        format CompressedStore {
32912120Sar4jc@virginia.edu            0x5: c_fsdsp({{
33012322Sar4jc@virginia.edu                offset = CIMM6<5:3> << 3 |
33112322Sar4jc@virginia.edu                         CIMM6<2:0> << 6;
33212120Sar4jc@virginia.edu            }}, {{
33312120Sar4jc@virginia.edu                Mem_ud = Fc2_bits;
33412120Sar4jc@virginia.edu            }}, {{
33512322Sar4jc@virginia.edu                EA = sp + offset;
33612120Sar4jc@virginia.edu            }});
33712120Sar4jc@virginia.edu            0x6: c_swsp({{
33812322Sar4jc@virginia.edu                offset = CIMM6<5:2> << 2 |
33912322Sar4jc@virginia.edu                         CIMM6<1:0> << 6;
34012120Sar4jc@virginia.edu            }}, {{
34112120Sar4jc@virginia.edu                Mem_uw = Rc2_uw;
34212120Sar4jc@virginia.edu            }}, {{
34312322Sar4jc@virginia.edu                EA = sp + offset;
34412120Sar4jc@virginia.edu            }});
34512120Sar4jc@virginia.edu            0x7: c_sdsp({{
34612322Sar4jc@virginia.edu                offset = CIMM6<5:3> << 3 |
34712322Sar4jc@virginia.edu                         CIMM6<2:0> << 6;
34812120Sar4jc@virginia.edu            }}, {{
34912120Sar4jc@virginia.edu                Mem = Rc2;
35012120Sar4jc@virginia.edu            }}, {{
35112322Sar4jc@virginia.edu                EA = sp + offset;
35211725Sar4jc@virginia.edu            }});
35311725Sar4jc@virginia.edu        }
35411725Sar4jc@virginia.edu    }
35512120Sar4jc@virginia.edu    0x3: decode OPCODE {
35612120Sar4jc@virginia.edu        0x00: decode FUNCT3 {
35712120Sar4jc@virginia.edu            format Load {
35812120Sar4jc@virginia.edu                0x0: lb({{
35912120Sar4jc@virginia.edu                    Rd_sd = Mem_sb;
36011723Sar4jc@virginia.edu                }});
36112120Sar4jc@virginia.edu                0x1: lh({{
36212120Sar4jc@virginia.edu                    Rd_sd = Mem_sh;
36311723Sar4jc@virginia.edu                }});
36412120Sar4jc@virginia.edu                0x2: lw({{
36512120Sar4jc@virginia.edu                    Rd_sd = Mem_sw;
36611723Sar4jc@virginia.edu                }});
36712120Sar4jc@virginia.edu                0x3: ld({{
36812120Sar4jc@virginia.edu                    Rd_sd = Mem_sd;
36912120Sar4jc@virginia.edu                }});
37012120Sar4jc@virginia.edu                0x4: lbu({{
37112120Sar4jc@virginia.edu                    Rd = Mem_ub;
37212120Sar4jc@virginia.edu                }});
37312120Sar4jc@virginia.edu                0x5: lhu({{
37412120Sar4jc@virginia.edu                    Rd = Mem_uh;
37512120Sar4jc@virginia.edu                }});
37612120Sar4jc@virginia.edu                0x6: lwu({{
37712120Sar4jc@virginia.edu                    Rd = Mem_uw;
37811723Sar4jc@virginia.edu                }});
37911723Sar4jc@virginia.edu            }
38011723Sar4jc@virginia.edu        }
38111723Sar4jc@virginia.edu
38212120Sar4jc@virginia.edu        0x01: decode FUNCT3 {
38312120Sar4jc@virginia.edu            format Load {
38412120Sar4jc@virginia.edu                0x2: flw({{
38512120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)Mem_uw;
38612445Sar4jc@virginia.edu                }}, inst_flags=FloatMemReadOp);
38712120Sar4jc@virginia.edu                0x3: fld({{
38812120Sar4jc@virginia.edu                    Fd_bits = Mem;
38912445Sar4jc@virginia.edu                }}, inst_flags=FloatMemReadOp);
39011726Sar4jc@virginia.edu            }
39111726Sar4jc@virginia.edu        }
39212120Sar4jc@virginia.edu
39312120Sar4jc@virginia.edu        0x03: decode FUNCT3 {
39412120Sar4jc@virginia.edu            format IOp {
39512120Sar4jc@virginia.edu                0x0: fence({{
39612428Sar4jc@virginia.edu                }}, uint64_t, IsNonSpeculative, IsMemBarrier, No_OpClass);
39712120Sar4jc@virginia.edu                0x1: fence_i({{
39812428Sar4jc@virginia.edu                }}, uint64_t, IsNonSpeculative, IsSerializeAfter, No_OpClass);
39911726Sar4jc@virginia.edu            }
40011726Sar4jc@virginia.edu        }
40112120Sar4jc@virginia.edu
40212120Sar4jc@virginia.edu        0x04: decode FUNCT3 {
40312120Sar4jc@virginia.edu            format IOp {
40412120Sar4jc@virginia.edu                0x0: addi({{
40512120Sar4jc@virginia.edu                    Rd_sd = Rs1_sd + imm;
40611723Sar4jc@virginia.edu                }});
40712120Sar4jc@virginia.edu                0x1: slli({{
40812120Sar4jc@virginia.edu                    Rd = Rs1 << SHAMT6;
40912120Sar4jc@virginia.edu                }});
41012120Sar4jc@virginia.edu                0x2: slti({{
41112120Sar4jc@virginia.edu                    Rd = (Rs1_sd < imm) ? 1 : 0;
41212120Sar4jc@virginia.edu                }});
41312120Sar4jc@virginia.edu                0x3: sltiu({{
41412428Sar4jc@virginia.edu                    Rd = (Rs1 < imm) ? 1 : 0;
41512428Sar4jc@virginia.edu                }}, uint64_t);
41612120Sar4jc@virginia.edu                0x4: xori({{
41712428Sar4jc@virginia.edu                    Rd = Rs1 ^ imm;
41812428Sar4jc@virginia.edu                }}, uint64_t);
41912120Sar4jc@virginia.edu                0x5: decode SRTYPE {
42012120Sar4jc@virginia.edu                    0x0: srli({{
42112120Sar4jc@virginia.edu                        Rd = Rs1 >> SHAMT6;
42212120Sar4jc@virginia.edu                    }});
42312120Sar4jc@virginia.edu                    0x1: srai({{
42412120Sar4jc@virginia.edu                        Rd_sd = Rs1_sd >> SHAMT6;
42512120Sar4jc@virginia.edu                    }});
42612120Sar4jc@virginia.edu                }
42712120Sar4jc@virginia.edu                0x6: ori({{
42812428Sar4jc@virginia.edu                    Rd = Rs1 | imm;
42912428Sar4jc@virginia.edu                }}, uint64_t);
43012120Sar4jc@virginia.edu                0x7: andi({{
43112428Sar4jc@virginia.edu                    Rd = Rs1 & imm;
43212428Sar4jc@virginia.edu                }}, uint64_t);
43311723Sar4jc@virginia.edu            }
43412120Sar4jc@virginia.edu        }
43512120Sar4jc@virginia.edu
43612120Sar4jc@virginia.edu        0x05: UOp::auipc({{
43712120Sar4jc@virginia.edu            Rd = PC + imm;
43812120Sar4jc@virginia.edu        }});
43912120Sar4jc@virginia.edu
44012120Sar4jc@virginia.edu        0x06: decode FUNCT3 {
44112120Sar4jc@virginia.edu            format IOp {
44212120Sar4jc@virginia.edu                0x0: addiw({{
44312428Sar4jc@virginia.edu                    Rd_sd = Rs1_sw + imm;
44412428Sar4jc@virginia.edu                }}, int32_t);
44512120Sar4jc@virginia.edu                0x1: slliw({{
44612120Sar4jc@virginia.edu                    Rd_sd = Rs1_sw << SHAMT5;
44712120Sar4jc@virginia.edu                }});
44812120Sar4jc@virginia.edu                0x5: decode SRTYPE {
44912120Sar4jc@virginia.edu                    0x0: srliw({{
45012120Sar4jc@virginia.edu                        Rd = Rs1_uw >> SHAMT5;
45112120Sar4jc@virginia.edu                    }});
45212120Sar4jc@virginia.edu                    0x1: sraiw({{
45312120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw >> SHAMT5;
45412120Sar4jc@virginia.edu                    }});
45512120Sar4jc@virginia.edu                }
45612120Sar4jc@virginia.edu            }
45712120Sar4jc@virginia.edu        }
45811724Sar4jc@virginia.edu
45912120Sar4jc@virginia.edu        0x08: decode FUNCT3 {
46012120Sar4jc@virginia.edu            format Store {
46112120Sar4jc@virginia.edu                0x0: sb({{
46212120Sar4jc@virginia.edu                    Mem_ub = Rs2_ub;
46312120Sar4jc@virginia.edu                }});
46412120Sar4jc@virginia.edu                0x1: sh({{
46512120Sar4jc@virginia.edu                    Mem_uh = Rs2_uh;
46612120Sar4jc@virginia.edu                }});
46712120Sar4jc@virginia.edu                0x2: sw({{
46812120Sar4jc@virginia.edu                    Mem_uw = Rs2_uw;
46912120Sar4jc@virginia.edu                }});
47012120Sar4jc@virginia.edu                0x3: sd({{
47112120Sar4jc@virginia.edu                    Mem_ud = Rs2_ud;
47212120Sar4jc@virginia.edu                }});
47312120Sar4jc@virginia.edu            }
47412120Sar4jc@virginia.edu        }
47511724Sar4jc@virginia.edu
47612120Sar4jc@virginia.edu        0x09: decode FUNCT3 {
47712120Sar4jc@virginia.edu            format Store {
47812120Sar4jc@virginia.edu                0x2: fsw({{
47912120Sar4jc@virginia.edu                    Mem_uw = (uint32_t)Fs2_bits;
48012445Sar4jc@virginia.edu                }}, inst_flags=FloatMemWriteOp);
48112120Sar4jc@virginia.edu                0x3: fsd({{
48212120Sar4jc@virginia.edu                    Mem_ud = Fs2_bits;
48312445Sar4jc@virginia.edu                }}, inst_flags=FloatMemWriteOp);
48412120Sar4jc@virginia.edu            }
48512120Sar4jc@virginia.edu        }
48611724Sar4jc@virginia.edu
48712120Sar4jc@virginia.edu        0x0b: decode FUNCT3 {
48812120Sar4jc@virginia.edu            0x2: decode AMOFUNCT {
48912120Sar4jc@virginia.edu                0x2: LoadReserved::lr_w({{
49012120Sar4jc@virginia.edu                    Rd_sd = Mem_sw;
49112120Sar4jc@virginia.edu                }}, mem_flags=LLSC);
49212120Sar4jc@virginia.edu                0x3: StoreCond::sc_w({{
49312120Sar4jc@virginia.edu                    Mem_uw = Rs2_uw;
49412120Sar4jc@virginia.edu                }}, {{
49512120Sar4jc@virginia.edu                    Rd = result;
49612120Sar4jc@virginia.edu                }}, inst_flags=IsStoreConditional, mem_flags=LLSC);
49712120Sar4jc@virginia.edu                format AtomicMemOp {
49812120Sar4jc@virginia.edu                    0x0: amoadd_w({{Rt_sd = Mem_sw;}}, {{
49912120Sar4jc@virginia.edu                        Mem_sw = Rs2_sw + Rt_sd;
50012120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
50112120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
50212120Sar4jc@virginia.edu                    0x1: amoswap_w({{Rt_sd = Mem_sw;}}, {{
50312120Sar4jc@virginia.edu                        Mem_sw = Rs2_uw;
50412120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
50512120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
50612120Sar4jc@virginia.edu                    0x4: amoxor_w({{Rt_sd = Mem_sw;}}, {{
50712120Sar4jc@virginia.edu                        Mem_sw = Rs2_uw^Rt_sd;
50812120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
50912120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
51012120Sar4jc@virginia.edu                    0x8: amoor_w({{Rt_sd = Mem_sw;}}, {{
51112120Sar4jc@virginia.edu                        Mem_sw = Rs2_uw | Rt_sd;
51212120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
51312120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
51412120Sar4jc@virginia.edu                    0xc: amoand_w({{Rt_sd = Mem_sw;}}, {{
51512120Sar4jc@virginia.edu                        Mem_sw = Rs2_uw&Rt_sd;
51612120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
51712120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
51812120Sar4jc@virginia.edu                    0x10: amomin_w({{Rt_sd = Mem_sw;}}, {{
51912120Sar4jc@virginia.edu                        Mem_sw = min<int32_t>(Rs2_sw, Rt_sd);
52012120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
52112120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
52212120Sar4jc@virginia.edu                    0x14: amomax_w({{Rt_sd = Mem_sw;}}, {{
52312120Sar4jc@virginia.edu                        Mem_sw = max<int32_t>(Rs2_sw, Rt_sd);
52412120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
52512120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
52612120Sar4jc@virginia.edu                    0x18: amominu_w({{Rt_sd = Mem_sw;}}, {{
52712120Sar4jc@virginia.edu                        Mem_sw = min<uint32_t>(Rs2_uw, Rt_sd);
52812120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
52912120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
53012120Sar4jc@virginia.edu                    0x1c: amomaxu_w({{Rt_sd = Mem_sw;}}, {{
53112120Sar4jc@virginia.edu                        Mem_sw = max<uint32_t>(Rs2_uw, Rt_sd);
53212120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
53312120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
53412120Sar4jc@virginia.edu                }
53511723Sar4jc@virginia.edu            }
53612120Sar4jc@virginia.edu            0x3: decode AMOFUNCT {
53712120Sar4jc@virginia.edu                0x2: LoadReserved::lr_d({{
53812120Sar4jc@virginia.edu                    Rd_sd = Mem_sd;
53912120Sar4jc@virginia.edu                }}, mem_flags=LLSC);
54012120Sar4jc@virginia.edu                0x3: StoreCond::sc_d({{
54112120Sar4jc@virginia.edu                    Mem = Rs2;
54212120Sar4jc@virginia.edu                }}, {{
54312120Sar4jc@virginia.edu                    Rd = result;
54412120Sar4jc@virginia.edu                }}, mem_flags=LLSC, inst_flags=IsStoreConditional);
54512120Sar4jc@virginia.edu                format AtomicMemOp {
54612120Sar4jc@virginia.edu                    0x0: amoadd_d({{Rt_sd = Mem_sd;}}, {{
54712120Sar4jc@virginia.edu                        Mem_sd = Rs2_sd + Rt_sd;
54812120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
54912120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
55012120Sar4jc@virginia.edu                    0x1: amoswap_d({{Rt = Mem;}}, {{
55112120Sar4jc@virginia.edu                        Mem = Rs2;
55212120Sar4jc@virginia.edu                        Rd = Rt;
55312120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
55412120Sar4jc@virginia.edu                    0x4: amoxor_d({{Rt = Mem;}}, {{
55512120Sar4jc@virginia.edu                        Mem = Rs2^Rt;
55612120Sar4jc@virginia.edu                        Rd = Rt;
55712120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
55812120Sar4jc@virginia.edu                    0x8: amoor_d({{Rt = Mem;}}, {{
55912120Sar4jc@virginia.edu                        Mem = Rs2 | Rt;
56012120Sar4jc@virginia.edu                        Rd = Rt;
56112120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
56212120Sar4jc@virginia.edu                    0xc: amoand_d({{Rt = Mem;}}, {{
56312120Sar4jc@virginia.edu                        Mem = Rs2&Rt;
56412120Sar4jc@virginia.edu                        Rd = Rt;
56512120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
56612120Sar4jc@virginia.edu                    0x10: amomin_d({{Rt_sd = Mem_sd;}}, {{
56712120Sar4jc@virginia.edu                        Mem_sd = min(Rs2_sd, Rt_sd);
56812120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
56912120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
57012120Sar4jc@virginia.edu                    0x14: amomax_d({{Rt_sd = Mem_sd;}}, {{
57112120Sar4jc@virginia.edu                        Mem_sd = max(Rs2_sd, Rt_sd);
57212120Sar4jc@virginia.edu                        Rd_sd = Rt_sd;
57312120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
57412120Sar4jc@virginia.edu                    0x18: amominu_d({{Rt = Mem;}}, {{
57512120Sar4jc@virginia.edu                        Mem = min(Rs2, Rt);
57612120Sar4jc@virginia.edu                        Rd = Rt;
57712120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
57812120Sar4jc@virginia.edu                    0x1c: amomaxu_d({{Rt = Mem;}}, {{
57912120Sar4jc@virginia.edu                        Mem = max(Rs2, Rt);
58012120Sar4jc@virginia.edu                        Rd = Rt;
58112120Sar4jc@virginia.edu                    }}, {{EA = Rs1;}});
58212120Sar4jc@virginia.edu                }
58312120Sar4jc@virginia.edu            }
58412120Sar4jc@virginia.edu        }
58512120Sar4jc@virginia.edu        0x0c: decode FUNCT3 {
58612120Sar4jc@virginia.edu            format ROp {
58712120Sar4jc@virginia.edu                0x0: decode FUNCT7 {
58812120Sar4jc@virginia.edu                    0x0: add({{
58912120Sar4jc@virginia.edu                        Rd = Rs1_sd + Rs2_sd;
59012120Sar4jc@virginia.edu                    }});
59112120Sar4jc@virginia.edu                    0x1: mul({{
59212120Sar4jc@virginia.edu                        Rd = Rs1_sd*Rs2_sd;
59312120Sar4jc@virginia.edu                    }}, IntMultOp);
59412120Sar4jc@virginia.edu                    0x20: sub({{
59512120Sar4jc@virginia.edu                        Rd = Rs1_sd - Rs2_sd;
59612120Sar4jc@virginia.edu                    }});
59712120Sar4jc@virginia.edu                }
59812120Sar4jc@virginia.edu                0x1: decode FUNCT7 {
59912120Sar4jc@virginia.edu                    0x0: sll({{
60012120Sar4jc@virginia.edu                        Rd = Rs1 << Rs2<5:0>;
60112120Sar4jc@virginia.edu                    }});
60212120Sar4jc@virginia.edu                    0x1: mulh({{
60312120Sar4jc@virginia.edu                        bool negate = (Rs1_sd < 0) != (Rs2_sd < 0);
60412120Sar4jc@virginia.edu
60512120Sar4jc@virginia.edu                        uint64_t Rs1_lo = (uint32_t)abs(Rs1_sd);
60612120Sar4jc@virginia.edu                        uint64_t Rs1_hi = (uint64_t)abs(Rs1_sd) >> 32;
60712120Sar4jc@virginia.edu                        uint64_t Rs2_lo = (uint32_t)abs(Rs2_sd);
60812120Sar4jc@virginia.edu                        uint64_t Rs2_hi = (uint64_t)abs(Rs2_sd) >> 32;
60912120Sar4jc@virginia.edu
61012120Sar4jc@virginia.edu                        uint64_t hi = Rs1_hi*Rs2_hi;
61112120Sar4jc@virginia.edu                        uint64_t mid1 = Rs1_hi*Rs2_lo;
61212120Sar4jc@virginia.edu                        uint64_t mid2 = Rs1_lo*Rs2_hi;
61312120Sar4jc@virginia.edu                        uint64_t lo = Rs2_lo*Rs1_lo;
61412120Sar4jc@virginia.edu                        uint64_t carry = ((uint64_t)(uint32_t)mid1
61512120Sar4jc@virginia.edu                                + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32;
61612120Sar4jc@virginia.edu
61712120Sar4jc@virginia.edu                        uint64_t res = hi +
61812120Sar4jc@virginia.edu                                       (mid1 >> 32) +
61912120Sar4jc@virginia.edu                                       (mid2 >> 32) +
62012120Sar4jc@virginia.edu                                       carry;
62112120Sar4jc@virginia.edu                        Rd = negate ? ~res + (Rs1_sd*Rs2_sd == 0 ? 1 : 0)
62212120Sar4jc@virginia.edu                                    : res;
62312120Sar4jc@virginia.edu                    }}, IntMultOp);
62412120Sar4jc@virginia.edu                }
62512120Sar4jc@virginia.edu                0x2: decode FUNCT7 {
62612120Sar4jc@virginia.edu                    0x0: slt({{
62712120Sar4jc@virginia.edu                        Rd = (Rs1_sd < Rs2_sd) ? 1 : 0;
62812120Sar4jc@virginia.edu                    }});
62912120Sar4jc@virginia.edu                    0x1: mulhsu({{
63012120Sar4jc@virginia.edu                        bool negate = Rs1_sd < 0;
63112120Sar4jc@virginia.edu                        uint64_t Rs1_lo = (uint32_t)abs(Rs1_sd);
63212120Sar4jc@virginia.edu                        uint64_t Rs1_hi = (uint64_t)abs(Rs1_sd) >> 32;
63312120Sar4jc@virginia.edu                        uint64_t Rs2_lo = (uint32_t)Rs2;
63412120Sar4jc@virginia.edu                        uint64_t Rs2_hi = Rs2 >> 32;
63512120Sar4jc@virginia.edu
63612120Sar4jc@virginia.edu                        uint64_t hi = Rs1_hi*Rs2_hi;
63712120Sar4jc@virginia.edu                        uint64_t mid1 = Rs1_hi*Rs2_lo;
63812120Sar4jc@virginia.edu                        uint64_t mid2 = Rs1_lo*Rs2_hi;
63912120Sar4jc@virginia.edu                        uint64_t lo = Rs1_lo*Rs2_lo;
64012120Sar4jc@virginia.edu                        uint64_t carry = ((uint64_t)(uint32_t)mid1
64112120Sar4jc@virginia.edu                                + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32;
64212120Sar4jc@virginia.edu
64312120Sar4jc@virginia.edu                        uint64_t res = hi +
64412120Sar4jc@virginia.edu                                       (mid1 >> 32) +
64512120Sar4jc@virginia.edu                                       (mid2 >> 32) +
64612120Sar4jc@virginia.edu                                       carry;
64712120Sar4jc@virginia.edu                        Rd = negate ? ~res + (Rs1_sd*Rs2 == 0 ? 1 : 0) : res;
64812120Sar4jc@virginia.edu                    }}, IntMultOp);
64912120Sar4jc@virginia.edu                }
65012120Sar4jc@virginia.edu                0x3: decode FUNCT7 {
65112120Sar4jc@virginia.edu                    0x0: sltu({{
65212120Sar4jc@virginia.edu                        Rd = (Rs1 < Rs2) ? 1 : 0;
65312120Sar4jc@virginia.edu                    }});
65412120Sar4jc@virginia.edu                    0x1: mulhu({{
65512120Sar4jc@virginia.edu                        uint64_t Rs1_lo = (uint32_t)Rs1;
65612120Sar4jc@virginia.edu                        uint64_t Rs1_hi = Rs1 >> 32;
65712120Sar4jc@virginia.edu                        uint64_t Rs2_lo = (uint32_t)Rs2;
65812120Sar4jc@virginia.edu                        uint64_t Rs2_hi = Rs2 >> 32;
65912120Sar4jc@virginia.edu
66012120Sar4jc@virginia.edu                        uint64_t hi = Rs1_hi*Rs2_hi;
66112120Sar4jc@virginia.edu                        uint64_t mid1 = Rs1_hi*Rs2_lo;
66212120Sar4jc@virginia.edu                        uint64_t mid2 = Rs1_lo*Rs2_hi;
66312120Sar4jc@virginia.edu                        uint64_t lo = Rs1_lo*Rs2_lo;
66412120Sar4jc@virginia.edu                        uint64_t carry = ((uint64_t)(uint32_t)mid1
66512120Sar4jc@virginia.edu                                + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32;
66612120Sar4jc@virginia.edu
66712120Sar4jc@virginia.edu                        Rd = hi + (mid1 >> 32) + (mid2 >> 32) + carry;
66812120Sar4jc@virginia.edu                    }}, IntMultOp);
66912120Sar4jc@virginia.edu                }
67012120Sar4jc@virginia.edu                0x4: decode FUNCT7 {
67112120Sar4jc@virginia.edu                    0x0: xor({{
67212120Sar4jc@virginia.edu                        Rd = Rs1 ^ Rs2;
67312120Sar4jc@virginia.edu                    }});
67412120Sar4jc@virginia.edu                    0x1: div({{
67512120Sar4jc@virginia.edu                        if (Rs2_sd == 0) {
67612120Sar4jc@virginia.edu                            Rd_sd = -1;
67712120Sar4jc@virginia.edu                        } else if (Rs1_sd == numeric_limits<int64_t>::min()
67812120Sar4jc@virginia.edu                                && Rs2_sd == -1) {
67912120Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::min();
68012120Sar4jc@virginia.edu                        } else {
68112120Sar4jc@virginia.edu                            Rd_sd = Rs1_sd/Rs2_sd;
68212120Sar4jc@virginia.edu                        }
68312120Sar4jc@virginia.edu                    }}, IntDivOp);
68412120Sar4jc@virginia.edu                }
68512120Sar4jc@virginia.edu                0x5: decode FUNCT7 {
68612120Sar4jc@virginia.edu                    0x0: srl({{
68712120Sar4jc@virginia.edu                        Rd = Rs1 >> Rs2<5:0>;
68812120Sar4jc@virginia.edu                    }});
68912120Sar4jc@virginia.edu                    0x1: divu({{
69012120Sar4jc@virginia.edu                        if (Rs2 == 0) {
69112120Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
69212120Sar4jc@virginia.edu                        } else {
69312120Sar4jc@virginia.edu                            Rd = Rs1/Rs2;
69412120Sar4jc@virginia.edu                        }
69512120Sar4jc@virginia.edu                    }}, IntDivOp);
69612120Sar4jc@virginia.edu                    0x20: sra({{
69712120Sar4jc@virginia.edu                        Rd_sd = Rs1_sd >> Rs2<5:0>;
69812120Sar4jc@virginia.edu                    }});
69912120Sar4jc@virginia.edu                }
70012120Sar4jc@virginia.edu                0x6: decode FUNCT7 {
70112120Sar4jc@virginia.edu                    0x0: or({{
70212120Sar4jc@virginia.edu                        Rd = Rs1 | Rs2;
70312120Sar4jc@virginia.edu                    }});
70412120Sar4jc@virginia.edu                    0x1: rem({{
70512120Sar4jc@virginia.edu                        if (Rs2_sd == 0) {
70612120Sar4jc@virginia.edu                            Rd = Rs1_sd;
70712120Sar4jc@virginia.edu                        } else if (Rs1_sd == numeric_limits<int64_t>::min()
70812120Sar4jc@virginia.edu                                && Rs2_sd == -1) {
70912120Sar4jc@virginia.edu                            Rd = 0;
71012120Sar4jc@virginia.edu                        } else {
71112120Sar4jc@virginia.edu                            Rd = Rs1_sd%Rs2_sd;
71212120Sar4jc@virginia.edu                        }
71312120Sar4jc@virginia.edu                    }}, IntDivOp);
71412120Sar4jc@virginia.edu                }
71512120Sar4jc@virginia.edu                0x7: decode FUNCT7 {
71612120Sar4jc@virginia.edu                    0x0: and({{
71712120Sar4jc@virginia.edu                        Rd = Rs1 & Rs2;
71812120Sar4jc@virginia.edu                    }});
71912120Sar4jc@virginia.edu                    0x1: remu({{
72012120Sar4jc@virginia.edu                        if (Rs2 == 0) {
72112120Sar4jc@virginia.edu                            Rd = Rs1;
72212120Sar4jc@virginia.edu                        } else {
72312120Sar4jc@virginia.edu                            Rd = Rs1%Rs2;
72412120Sar4jc@virginia.edu                        }
72512120Sar4jc@virginia.edu                    }}, IntDivOp);
72612120Sar4jc@virginia.edu                }
72712120Sar4jc@virginia.edu            }
72812120Sar4jc@virginia.edu        }
72912120Sar4jc@virginia.edu
73012120Sar4jc@virginia.edu        0x0d: UOp::lui({{
73112120Sar4jc@virginia.edu            Rd = (uint64_t)imm;
73212120Sar4jc@virginia.edu        }});
73312120Sar4jc@virginia.edu
73412120Sar4jc@virginia.edu        0x0e: decode FUNCT3 {
73512120Sar4jc@virginia.edu            format ROp {
73612120Sar4jc@virginia.edu                0x0: decode FUNCT7 {
73712120Sar4jc@virginia.edu                    0x0: addw({{
73812120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw + Rs2_sw;
73912120Sar4jc@virginia.edu                    }});
74012120Sar4jc@virginia.edu                    0x1: mulw({{
74112120Sar4jc@virginia.edu                        Rd_sd = (int32_t)(Rs1_sw*Rs2_sw);
74212120Sar4jc@virginia.edu                    }}, IntMultOp);
74312120Sar4jc@virginia.edu                    0x20: subw({{
74412120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw - Rs2_sw;
74512120Sar4jc@virginia.edu                    }});
74612120Sar4jc@virginia.edu                }
74712120Sar4jc@virginia.edu                0x1: sllw({{
74812120Sar4jc@virginia.edu                    Rd_sd = Rs1_sw << Rs2<4:0>;
74911723Sar4jc@virginia.edu                }});
75012120Sar4jc@virginia.edu                0x4: divw({{
75112120Sar4jc@virginia.edu                    if (Rs2_sw == 0) {
75211724Sar4jc@virginia.edu                        Rd_sd = -1;
75312120Sar4jc@virginia.edu                    } else if (Rs1_sw == numeric_limits<int32_t>::min()
75412120Sar4jc@virginia.edu                            && Rs2_sw == -1) {
75512120Sar4jc@virginia.edu                        Rd_sd = numeric_limits<int32_t>::min();
75611724Sar4jc@virginia.edu                    } else {
75712120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw/Rs2_sw;
75811724Sar4jc@virginia.edu                    }
75911724Sar4jc@virginia.edu                }}, IntDivOp);
76012120Sar4jc@virginia.edu                0x5: decode FUNCT7 {
76112120Sar4jc@virginia.edu                    0x0: srlw({{
76212120Sar4jc@virginia.edu                        Rd_uw = Rs1_uw >> Rs2<4:0>;
76312120Sar4jc@virginia.edu                    }});
76412120Sar4jc@virginia.edu                    0x1: divuw({{
76512120Sar4jc@virginia.edu                        if (Rs2_uw == 0) {
76612120Sar4jc@virginia.edu                            Rd_sd = numeric_limits<IntReg>::max();
76712120Sar4jc@virginia.edu                        } else {
76812120Sar4jc@virginia.edu                            Rd_sd = (int32_t)(Rs1_uw/Rs2_uw);
76912120Sar4jc@virginia.edu                        }
77012120Sar4jc@virginia.edu                    }}, IntDivOp);
77112120Sar4jc@virginia.edu                    0x20: sraw({{
77212120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw >> Rs2<4:0>;
77312120Sar4jc@virginia.edu                    }});
77412120Sar4jc@virginia.edu                }
77512120Sar4jc@virginia.edu                0x6: remw({{
77612120Sar4jc@virginia.edu                    if (Rs2_sw == 0) {
77712120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw;
77812120Sar4jc@virginia.edu                    } else if (Rs1_sw == numeric_limits<int32_t>::min()
77912120Sar4jc@virginia.edu                            && Rs2_sw == -1) {
78012120Sar4jc@virginia.edu                        Rd_sd = 0;
78111724Sar4jc@virginia.edu                    } else {
78212120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw%Rs2_sw;
78311724Sar4jc@virginia.edu                    }
78411724Sar4jc@virginia.edu                }}, IntDivOp);
78512120Sar4jc@virginia.edu                0x7: remuw({{
78612120Sar4jc@virginia.edu                    if (Rs2_uw == 0) {
78712120Sar4jc@virginia.edu                        Rd_sd = (int32_t)Rs1_uw;
78811724Sar4jc@virginia.edu                    } else {
78912120Sar4jc@virginia.edu                        Rd_sd = (int32_t)(Rs1_uw%Rs2_uw);
79011724Sar4jc@virginia.edu                    }
79111724Sar4jc@virginia.edu                }}, IntDivOp);
79211723Sar4jc@virginia.edu            }
79311723Sar4jc@virginia.edu        }
79411723Sar4jc@virginia.edu
79512120Sar4jc@virginia.edu        format FPROp {
79612120Sar4jc@virginia.edu            0x10: decode FUNCT2 {
79712120Sar4jc@virginia.edu                0x0: fmadd_s({{
79812120Sar4jc@virginia.edu                    uint32_t temp;
79912120Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
80012120Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
80112120Sar4jc@virginia.edu                    float fs3 = reinterpret_cast<float&>(temp = Fs3_bits);
80212120Sar4jc@virginia.edu                    float fd;
80311723Sar4jc@virginia.edu
80412138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2) ||
80512138Sgabeblack@google.com                            std::isnan(fs3)) {
80612120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)
80712120Sar4jc@virginia.edu                                || issignalingnan(fs3)) {
80812120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
80912120Sar4jc@virginia.edu                        }
81012120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
81112138Sgabeblack@google.com                    } else if (std::isinf(fs1) || std::isinf(fs2) ||
81212138Sgabeblack@google.com                            std::isinf(fs3)) {
81312120Sar4jc@virginia.edu                        if (signbit(fs1) == signbit(fs2)
81412138Sgabeblack@google.com                                && !std::isinf(fs3)) {
81512120Sar4jc@virginia.edu                            fd = numeric_limits<float>::infinity();
81612120Sar4jc@virginia.edu                        } else if (signbit(fs1) != signbit(fs2)
81712138Sgabeblack@google.com                                && !std::isinf(fs3)) {
81812120Sar4jc@virginia.edu                            fd = -numeric_limits<float>::infinity();
81912120Sar4jc@virginia.edu                        } else { // Fs3_sf is infinity
82012120Sar4jc@virginia.edu                            fd = fs3;
82112120Sar4jc@virginia.edu                        }
82212120Sar4jc@virginia.edu                    } else {
82312120Sar4jc@virginia.edu                        fd = fs1*fs2 + fs3;
82412120Sar4jc@virginia.edu                    }
82512120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
82612445Sar4jc@virginia.edu                }}, FloatMultAccOp);
82712120Sar4jc@virginia.edu                0x1: fmadd_d({{
82812138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2) ||
82912138Sgabeblack@google.com                            std::isnan(Fs3)) {
83012120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)
83112120Sar4jc@virginia.edu                                || issignalingnan(Fs3)) {
83212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
83312120Sar4jc@virginia.edu                        }
83412120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
83512138Sgabeblack@google.com                    } else if (std::isinf(Fs1) || std::isinf(Fs2) ||
83612138Sgabeblack@google.com                            std::isinf(Fs3)) {
83712120Sar4jc@virginia.edu                        if (signbit(Fs1) == signbit(Fs2)
83812138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
83912120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::infinity();
84012120Sar4jc@virginia.edu                        } else if (signbit(Fs1) != signbit(Fs2)
84112138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
84212120Sar4jc@virginia.edu                            Fd = -numeric_limits<double>::infinity();
84312120Sar4jc@virginia.edu                        } else {
84412120Sar4jc@virginia.edu                            Fd = Fs3;
84512120Sar4jc@virginia.edu                        }
84612120Sar4jc@virginia.edu                    } else {
84712120Sar4jc@virginia.edu                        Fd = Fs1*Fs2 + Fs3;
84812120Sar4jc@virginia.edu                    }
84912445Sar4jc@virginia.edu                }}, FloatMultAccOp);
85011723Sar4jc@virginia.edu            }
85112120Sar4jc@virginia.edu            0x11: decode FUNCT2 {
85212120Sar4jc@virginia.edu                0x0: fmsub_s({{
85312120Sar4jc@virginia.edu                    uint32_t temp;
85412120Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
85512120Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
85612120Sar4jc@virginia.edu                    float fs3 = reinterpret_cast<float&>(temp = Fs3_bits);
85712120Sar4jc@virginia.edu                    float fd;
85812120Sar4jc@virginia.edu
85912138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2) ||
86012138Sgabeblack@google.com                            std::isnan(fs3)) {
86112120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)
86212120Sar4jc@virginia.edu                                || issignalingnan(fs3)) {
86312120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
86412120Sar4jc@virginia.edu                        }
86512120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
86612138Sgabeblack@google.com                    } else if (std::isinf(fs1) || std::isinf(fs2) ||
86712138Sgabeblack@google.com                            std::isinf(fs3)) {
86812120Sar4jc@virginia.edu                        if (signbit(fs1) == signbit(fs2)
86912138Sgabeblack@google.com                                && !std::isinf(fs3)) {
87012120Sar4jc@virginia.edu                            fd = numeric_limits<float>::infinity();
87112120Sar4jc@virginia.edu                        } else if (signbit(fs1) != signbit(fs2)
87212138Sgabeblack@google.com                                && !std::isinf(fs3)) {
87312120Sar4jc@virginia.edu                            fd = -numeric_limits<float>::infinity();
87412120Sar4jc@virginia.edu                        } else { // Fs3_sf is infinity
87512120Sar4jc@virginia.edu                            fd = -fs3;
87612120Sar4jc@virginia.edu                        }
87711724Sar4jc@virginia.edu                    } else {
87812120Sar4jc@virginia.edu                        fd = fs1*fs2 - fs3;
87911724Sar4jc@virginia.edu                    }
88012120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
88112445Sar4jc@virginia.edu                }}, FloatMultAccOp);
88212120Sar4jc@virginia.edu                0x1: fmsub_d({{
88312138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2) ||
88412138Sgabeblack@google.com                            std::isnan(Fs3)) {
88512120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)
88612120Sar4jc@virginia.edu                                || issignalingnan(Fs3)) {
88712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
88812120Sar4jc@virginia.edu                        }
88912120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
89012138Sgabeblack@google.com                    } else if (std::isinf(Fs1) || std::isinf(Fs2) ||
89112138Sgabeblack@google.com                            std::isinf(Fs3)) {
89212120Sar4jc@virginia.edu                        if (signbit(Fs1) == signbit(Fs2)
89312138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
89412120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::infinity();
89512120Sar4jc@virginia.edu                        } else if (signbit(Fs1) != signbit(Fs2)
89612138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
89712120Sar4jc@virginia.edu                            Fd = -numeric_limits<double>::infinity();
89812120Sar4jc@virginia.edu                        } else {
89912120Sar4jc@virginia.edu                            Fd = -Fs3;
90012120Sar4jc@virginia.edu                        }
90112120Sar4jc@virginia.edu                    } else {
90212120Sar4jc@virginia.edu                        Fd = Fs1*Fs2 - Fs3;
90312120Sar4jc@virginia.edu                    }
90412445Sar4jc@virginia.edu                }}, FloatMultAccOp);
90511723Sar4jc@virginia.edu            }
90612120Sar4jc@virginia.edu            0x12: decode FUNCT2 {
90712120Sar4jc@virginia.edu                0x0: fnmsub_s({{
90812120Sar4jc@virginia.edu                    uint32_t temp;
90912120Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
91012120Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
91112120Sar4jc@virginia.edu                    float fs3 = reinterpret_cast<float&>(temp = Fs3_bits);
91212120Sar4jc@virginia.edu                    float fd;
91311723Sar4jc@virginia.edu
91412138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2) ||
91512138Sgabeblack@google.com                            std::isnan(fs3)) {
91612120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)
91712120Sar4jc@virginia.edu                                || issignalingnan(fs3)) {
91812120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
91912120Sar4jc@virginia.edu                        }
92012120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
92112138Sgabeblack@google.com                    } else if (std::isinf(fs1) || std::isinf(fs2) ||
92212138Sgabeblack@google.com                            std::isinf(fs3)) {
92312120Sar4jc@virginia.edu                        if (signbit(fs1) == signbit(fs2)
92412138Sgabeblack@google.com                                && !std::isinf(fs3)) {
92512120Sar4jc@virginia.edu                            fd = -numeric_limits<float>::infinity();
92612120Sar4jc@virginia.edu                        } else if (signbit(fs1) != signbit(fs2)
92712138Sgabeblack@google.com                                && !std::isinf(fs3)) {
92812120Sar4jc@virginia.edu                            fd = numeric_limits<float>::infinity();
92912120Sar4jc@virginia.edu                        } else { // Fs3_sf is infinity
93012120Sar4jc@virginia.edu                            fd = fs3;
93112120Sar4jc@virginia.edu                        }
93212120Sar4jc@virginia.edu                    } else {
93312120Sar4jc@virginia.edu                        fd = -(fs1*fs2 - fs3);
93412120Sar4jc@virginia.edu                    }
93512120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
93612445Sar4jc@virginia.edu                }}, FloatMultAccOp);
93712120Sar4jc@virginia.edu                0x1: fnmsub_d({{
93812138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2) ||
93912138Sgabeblack@google.com                            std::isnan(Fs3)) {
94012120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)
94112120Sar4jc@virginia.edu                                || issignalingnan(Fs3)) {
94212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
94312120Sar4jc@virginia.edu                        }
94412120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
94512138Sgabeblack@google.com                    } else if (std::isinf(Fs1) || std::isinf(Fs2)
94612138Sgabeblack@google.com                            || std::isinf(Fs3)) {
94712120Sar4jc@virginia.edu                        if (signbit(Fs1) == signbit(Fs2)
94812138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
94912120Sar4jc@virginia.edu                            Fd = -numeric_limits<double>::infinity();
95012120Sar4jc@virginia.edu                        } else if (signbit(Fs1) != signbit(Fs2)
95112138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
95212120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::infinity();
95312120Sar4jc@virginia.edu                        } else {
95412120Sar4jc@virginia.edu                            Fd = Fs3;
95512120Sar4jc@virginia.edu                        }
95612120Sar4jc@virginia.edu                    } else {
95712120Sar4jc@virginia.edu                        Fd = -(Fs1*Fs2 - Fs3);
95812120Sar4jc@virginia.edu                    }
95912445Sar4jc@virginia.edu                }}, FloatMultAccOp);
96012120Sar4jc@virginia.edu            }
96112120Sar4jc@virginia.edu            0x13: decode FUNCT2 {
96212120Sar4jc@virginia.edu                0x0: fnmadd_s({{
96312120Sar4jc@virginia.edu                    uint32_t temp;
96412120Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
96512120Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
96612120Sar4jc@virginia.edu                    float fs3 = reinterpret_cast<float&>(temp = Fs3_bits);
96712120Sar4jc@virginia.edu                    float fd;
96811725Sar4jc@virginia.edu
96912138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2) ||
97012138Sgabeblack@google.com                            std::isnan(fs3)) {
97112120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)
97212120Sar4jc@virginia.edu                                || issignalingnan(fs3)) {
97312120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
97412120Sar4jc@virginia.edu                        }
97512120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
97612138Sgabeblack@google.com                    } else if (std::isinf(fs1) || std::isinf(fs2) ||
97712138Sgabeblack@google.com                            std::isinf(fs3)) {
97812120Sar4jc@virginia.edu                        if (signbit(fs1) == signbit(fs2)
97912138Sgabeblack@google.com                                && !std::isinf(fs3)) {
98012120Sar4jc@virginia.edu                            fd = -numeric_limits<float>::infinity();
98112120Sar4jc@virginia.edu                        } else if (signbit(fs1) != signbit(fs2)
98212138Sgabeblack@google.com                                && !std::isinf(fs3)) {
98312120Sar4jc@virginia.edu                            fd = numeric_limits<float>::infinity();
98412120Sar4jc@virginia.edu                        } else { // Fs3_sf is infinity
98512120Sar4jc@virginia.edu                            fd = -fs3;
98612120Sar4jc@virginia.edu                        }
98712120Sar4jc@virginia.edu                    } else {
98812120Sar4jc@virginia.edu                        fd = -(fs1*fs2 + fs3);
98911725Sar4jc@virginia.edu                    }
99012120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
99112445Sar4jc@virginia.edu                }}, FloatMultAccOp);
99212120Sar4jc@virginia.edu                0x1: fnmadd_d({{
99312138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2) ||
99412138Sgabeblack@google.com                            std::isnan(Fs3)) {
99512120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)
99612120Sar4jc@virginia.edu                                || issignalingnan(Fs3)) {
99712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
99812120Sar4jc@virginia.edu                        }
99912120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
100012138Sgabeblack@google.com                    } else if (std::isinf(Fs1) || std::isinf(Fs2) ||
100112138Sgabeblack@google.com                            std::isinf(Fs3)) {
100212120Sar4jc@virginia.edu                        if (signbit(Fs1) == signbit(Fs2)
100312138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
100412120Sar4jc@virginia.edu                            Fd = -numeric_limits<double>::infinity();
100512120Sar4jc@virginia.edu                        } else if (signbit(Fs1) != signbit(Fs2)
100612138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
100712120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::infinity();
100812120Sar4jc@virginia.edu                        } else {
100912120Sar4jc@virginia.edu                            Fd = -Fs3;
101012120Sar4jc@virginia.edu                        }
101112120Sar4jc@virginia.edu                    } else {
101212120Sar4jc@virginia.edu                        Fd = -(Fs1*Fs2 + Fs3);
101311725Sar4jc@virginia.edu                    }
101412445Sar4jc@virginia.edu                }}, FloatMultAccOp);
101512120Sar4jc@virginia.edu            }
101612120Sar4jc@virginia.edu            0x14: decode FUNCT7 {
101712120Sar4jc@virginia.edu                0x0: fadd_s({{
101811725Sar4jc@virginia.edu                    uint32_t temp;
101911725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
102011725Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
102111725Sar4jc@virginia.edu                    float fd;
102211725Sar4jc@virginia.edu
102312138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2)) {
102412120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
102512120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
102612120Sar4jc@virginia.edu                        }
102712120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
102811725Sar4jc@virginia.edu                    } else {
102912120Sar4jc@virginia.edu                        fd = fs1 + fs2;
103011725Sar4jc@virginia.edu                    }
103111725Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
103212120Sar4jc@virginia.edu                }}, FloatAddOp);
103312120Sar4jc@virginia.edu                0x1: fadd_d({{
103412138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2)) {
103512120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
103612120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
103712120Sar4jc@virginia.edu                        }
103812120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
103912120Sar4jc@virginia.edu                    } else {
104012120Sar4jc@virginia.edu                        Fd = Fs1 + Fs2;
104112120Sar4jc@virginia.edu                    }
104212120Sar4jc@virginia.edu                }}, FloatAddOp);
104312120Sar4jc@virginia.edu                0x4: fsub_s({{
104411725Sar4jc@virginia.edu                    uint32_t temp;
104511725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
104611725Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
104711725Sar4jc@virginia.edu                    float fd;
104811725Sar4jc@virginia.edu
104912138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2)) {
105012120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
105112120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
105212120Sar4jc@virginia.edu                        }
105312120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
105411725Sar4jc@virginia.edu                    } else {
105512120Sar4jc@virginia.edu                        fd = fs1 - fs2;
105611725Sar4jc@virginia.edu                    }
105711725Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
105812120Sar4jc@virginia.edu                }}, FloatAddOp);
105912120Sar4jc@virginia.edu                0x5: fsub_d({{
106012138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2)) {
106112120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
106212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
106312120Sar4jc@virginia.edu                        }
106412120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
106512120Sar4jc@virginia.edu                    } else {
106612120Sar4jc@virginia.edu                        Fd = Fs1 - Fs2;
106712120Sar4jc@virginia.edu                    }
106812120Sar4jc@virginia.edu                }}, FloatAddOp);
106912120Sar4jc@virginia.edu                0x8: fmul_s({{
107011725Sar4jc@virginia.edu                    uint32_t temp;
107111725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
107211725Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
107311725Sar4jc@virginia.edu                    float fd;
107411725Sar4jc@virginia.edu
107512138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2)) {
107612120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
107712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
107812120Sar4jc@virginia.edu                        }
107912120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
108011725Sar4jc@virginia.edu                    } else {
108112120Sar4jc@virginia.edu                        fd = fs1*fs2;
108211725Sar4jc@virginia.edu                    }
108311725Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
108412120Sar4jc@virginia.edu                }}, FloatMultOp);
108512120Sar4jc@virginia.edu                0x9: fmul_d({{
108612138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2)) {
108712120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
108812120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
108912120Sar4jc@virginia.edu                        }
109012120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
109111725Sar4jc@virginia.edu                    } else {
109212120Sar4jc@virginia.edu                        Fd = Fs1*Fs2;
109311725Sar4jc@virginia.edu                    }
109412120Sar4jc@virginia.edu                }}, FloatMultOp);
109512120Sar4jc@virginia.edu                0xc: fdiv_s({{
109611725Sar4jc@virginia.edu                    uint32_t temp;
109711725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
109811725Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
109911725Sar4jc@virginia.edu                    float fd;
110011725Sar4jc@virginia.edu
110112138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2)) {
110212120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
110312120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
110412120Sar4jc@virginia.edu                        }
110512120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
110612120Sar4jc@virginia.edu                    } else {
110712120Sar4jc@virginia.edu                        fd = fs1/fs2;
110812120Sar4jc@virginia.edu                    }
110912120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
111012120Sar4jc@virginia.edu                }}, FloatDivOp);
111112120Sar4jc@virginia.edu                0xd: fdiv_d({{
111212138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2)) {
111312120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
111412120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
111512120Sar4jc@virginia.edu                        }
111612120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
111712120Sar4jc@virginia.edu                    } else {
111812120Sar4jc@virginia.edu                        Fd = Fs1/Fs2;
111912120Sar4jc@virginia.edu                    }
112012120Sar4jc@virginia.edu                }}, FloatDivOp);
112112120Sar4jc@virginia.edu                0x10: decode ROUND_MODE {
112212120Sar4jc@virginia.edu                    0x0: fsgnj_s({{
112312120Sar4jc@virginia.edu                        uint32_t temp;
112412120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
112512120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
112612120Sar4jc@virginia.edu                        float fd;
112712120Sar4jc@virginia.edu
112812120Sar4jc@virginia.edu                        if (issignalingnan(fs1)) {
112912120Sar4jc@virginia.edu                            fd = numeric_limits<float>::signaling_NaN();
113012120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
113112120Sar4jc@virginia.edu                        } else {
113212120Sar4jc@virginia.edu                            fd = copysign(fs1, fs2);
113312120Sar4jc@virginia.edu                        }
113412120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
113512445Sar4jc@virginia.edu                    }}, FloatMiscOp);
113612120Sar4jc@virginia.edu                    0x1: fsgnjn_s({{
113712120Sar4jc@virginia.edu                        uint32_t temp;
113812120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
113912120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
114012120Sar4jc@virginia.edu                        float fd;
114112120Sar4jc@virginia.edu
114212120Sar4jc@virginia.edu                        if (issignalingnan(fs1)) {
114312120Sar4jc@virginia.edu                            fd = numeric_limits<float>::signaling_NaN();
114412120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
114512120Sar4jc@virginia.edu                        } else {
114612120Sar4jc@virginia.edu                            fd = copysign(fs1, -fs2);
114712120Sar4jc@virginia.edu                        }
114812120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
114912445Sar4jc@virginia.edu                    }}, FloatMiscOp);
115012120Sar4jc@virginia.edu                    0x2: fsgnjx_s({{
115112120Sar4jc@virginia.edu                        uint32_t temp;
115212120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
115312120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
115412120Sar4jc@virginia.edu                        float fd;
115512120Sar4jc@virginia.edu
115612120Sar4jc@virginia.edu                        if (issignalingnan(fs1)) {
115712120Sar4jc@virginia.edu                            fd = numeric_limits<float>::signaling_NaN();
115812120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
115912120Sar4jc@virginia.edu                        } else {
116012120Sar4jc@virginia.edu                            fd = fs1*(signbit(fs2) ? -1.0 : 1.0);
116112120Sar4jc@virginia.edu                        }
116212120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
116312445Sar4jc@virginia.edu                    }}, FloatMiscOp);
116412120Sar4jc@virginia.edu                }
116512120Sar4jc@virginia.edu                0x11: decode ROUND_MODE {
116612120Sar4jc@virginia.edu                    0x0: fsgnj_d({{
116712120Sar4jc@virginia.edu                        if (issignalingnan(Fs1)) {
116812120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::signaling_NaN();
116912120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
117012120Sar4jc@virginia.edu                        } else {
117112120Sar4jc@virginia.edu                            Fd = copysign(Fs1, Fs2);
117212120Sar4jc@virginia.edu                        }
117312445Sar4jc@virginia.edu                    }}, FloatMiscOp);
117412120Sar4jc@virginia.edu                    0x1: fsgnjn_d({{
117512120Sar4jc@virginia.edu                        if (issignalingnan(Fs1)) {
117612120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::signaling_NaN();
117712120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
117812120Sar4jc@virginia.edu                        } else {
117912120Sar4jc@virginia.edu                            Fd = copysign(Fs1, -Fs2);
118012120Sar4jc@virginia.edu                        }
118112445Sar4jc@virginia.edu                    }}, FloatMiscOp);
118212120Sar4jc@virginia.edu                    0x2: fsgnjx_d({{
118312120Sar4jc@virginia.edu                        if (issignalingnan(Fs1)) {
118412120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::signaling_NaN();
118512120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
118612120Sar4jc@virginia.edu                        } else {
118712120Sar4jc@virginia.edu                            Fd = Fs1*(signbit(Fs2) ? -1.0 : 1.0);
118812120Sar4jc@virginia.edu                        }
118912445Sar4jc@virginia.edu                    }}, FloatMiscOp);
119012120Sar4jc@virginia.edu                }
119112120Sar4jc@virginia.edu                0x14: decode ROUND_MODE {
119212120Sar4jc@virginia.edu                    0x0: fmin_s({{
119312120Sar4jc@virginia.edu                        uint32_t temp;
119412120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
119512120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
119612120Sar4jc@virginia.edu                        float fd;
119712120Sar4jc@virginia.edu
119812120Sar4jc@virginia.edu                        if (issignalingnan(fs2)) {
119912120Sar4jc@virginia.edu                            fd = fs1;
120012120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
120112120Sar4jc@virginia.edu                        } else if (issignalingnan(fs1)) {
120212120Sar4jc@virginia.edu                            fd = fs2;
120312120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
120412120Sar4jc@virginia.edu                        } else {
120512120Sar4jc@virginia.edu                            fd = fmin(fs1, fs2);
120612120Sar4jc@virginia.edu                        }
120712120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
120812120Sar4jc@virginia.edu                    }}, FloatCmpOp);
120912120Sar4jc@virginia.edu                    0x1: fmax_s({{
121012120Sar4jc@virginia.edu                        uint32_t temp;
121112120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
121212120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
121312120Sar4jc@virginia.edu                        float fd;
121412120Sar4jc@virginia.edu
121512120Sar4jc@virginia.edu                        if (issignalingnan(fs2)) {
121612120Sar4jc@virginia.edu                            fd = fs1;
121712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
121812120Sar4jc@virginia.edu                        } else if (issignalingnan(fs1)) {
121912120Sar4jc@virginia.edu                            fd = fs2;
122012120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
122112120Sar4jc@virginia.edu                        } else {
122212120Sar4jc@virginia.edu                            fd = fmax(fs1, fs2);
122312120Sar4jc@virginia.edu                        }
122412120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
122512120Sar4jc@virginia.edu                    }}, FloatCmpOp);
122612120Sar4jc@virginia.edu                }
122712120Sar4jc@virginia.edu                0x15: decode ROUND_MODE {
122812120Sar4jc@virginia.edu                    0x0: fmin_d({{
122912120Sar4jc@virginia.edu                        if (issignalingnan(Fs2)) {
123012120Sar4jc@virginia.edu                            Fd = Fs1;
123112120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
123212120Sar4jc@virginia.edu                        } else if (issignalingnan(Fs1)) {
123312120Sar4jc@virginia.edu                            Fd = Fs2;
123412120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
123512120Sar4jc@virginia.edu                        } else {
123612120Sar4jc@virginia.edu                            Fd = fmin(Fs1, Fs2);
123712120Sar4jc@virginia.edu                        }
123812120Sar4jc@virginia.edu                    }}, FloatCmpOp);
123912120Sar4jc@virginia.edu                    0x1: fmax_d({{
124012120Sar4jc@virginia.edu                        if (issignalingnan(Fs2)) {
124112120Sar4jc@virginia.edu                            Fd = Fs1;
124212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
124312120Sar4jc@virginia.edu                        } else if (issignalingnan(Fs1)) {
124412120Sar4jc@virginia.edu                            Fd = Fs2;
124512120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
124612120Sar4jc@virginia.edu                        } else {
124712120Sar4jc@virginia.edu                            Fd = fmax(Fs1, Fs2);
124812120Sar4jc@virginia.edu                        }
124912120Sar4jc@virginia.edu                    }}, FloatCmpOp);
125012120Sar4jc@virginia.edu                }
125112120Sar4jc@virginia.edu                0x20: fcvt_s_d({{
125212596Sqtt2@cornell.edu                    if (CONV_SGN != 1) {
125312596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("CONV_SGN != 1");
125412596Sqtt2@cornell.edu                    }
125512120Sar4jc@virginia.edu                    float fd;
125612120Sar4jc@virginia.edu                    if (issignalingnan(Fs1)) {
125712120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
125811725Sar4jc@virginia.edu                        FFLAGS |= FloatInvalid;
125911725Sar4jc@virginia.edu                    } else {
126012120Sar4jc@virginia.edu                        fd = (float)Fs1;
126111725Sar4jc@virginia.edu                    }
126211725Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
126312120Sar4jc@virginia.edu                }}, FloatCvtOp);
126412120Sar4jc@virginia.edu                0x21: fcvt_d_s({{
126512596Sqtt2@cornell.edu                    if (CONV_SGN != 0) {
126612596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("CONV_SGN != 0");
126712596Sqtt2@cornell.edu                    }
126811725Sar4jc@virginia.edu                    uint32_t temp;
126911725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
127011725Sar4jc@virginia.edu
127112120Sar4jc@virginia.edu                    if (issignalingnan(fs1)) {
127212120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
127311725Sar4jc@virginia.edu                        FFLAGS |= FloatInvalid;
127411725Sar4jc@virginia.edu                    } else {
127512120Sar4jc@virginia.edu                        Fd = (double)fs1;
127611725Sar4jc@virginia.edu                    }
127711725Sar4jc@virginia.edu                }}, FloatCvtOp);
127812120Sar4jc@virginia.edu                0x2c: fsqrt_s({{
127912596Sqtt2@cornell.edu                    if (RS2 != 0) {
128012596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("source reg x1");
128112596Sqtt2@cornell.edu                    }
128211725Sar4jc@virginia.edu                    uint32_t temp;
128311725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
128412120Sar4jc@virginia.edu                    float fd;
128511725Sar4jc@virginia.edu
128612120Sar4jc@virginia.edu                    if (issignalingnan(Fs1_sf)) {
128711725Sar4jc@virginia.edu                        FFLAGS |= FloatInvalid;
128812120Sar4jc@virginia.edu                    }
128912120Sar4jc@virginia.edu                    fd = sqrt(fs1);
129012120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
129112120Sar4jc@virginia.edu                }}, FloatSqrtOp);
129212120Sar4jc@virginia.edu                0x2d: fsqrt_d({{
129312596Sqtt2@cornell.edu                    if (RS2 != 0) {
129412596Sqtt2@cornell.edu                        fault = make_shared<IllegalInstFault>("source reg x1");
129512596Sqtt2@cornell.edu                    }
129612120Sar4jc@virginia.edu                    Fd = sqrt(Fs1);
129712120Sar4jc@virginia.edu                }}, FloatSqrtOp);
129812120Sar4jc@virginia.edu                0x50: decode ROUND_MODE {
129912120Sar4jc@virginia.edu                    0x0: fle_s({{
130012120Sar4jc@virginia.edu                        uint32_t temp;
130112120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
130212120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
130312120Sar4jc@virginia.edu
130412138Sgabeblack@google.com                        if (std::isnan(fs1) || std::isnan(fs2)) {
130512120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
130612120Sar4jc@virginia.edu                            Rd = 0;
130712120Sar4jc@virginia.edu                        } else {
130812120Sar4jc@virginia.edu                            Rd = fs1 <= fs2 ? 1 : 0;
130911725Sar4jc@virginia.edu                        }
131012120Sar4jc@virginia.edu                    }}, FloatCmpOp);
131112120Sar4jc@virginia.edu                    0x1: flt_s({{
131212120Sar4jc@virginia.edu                        uint32_t temp;
131312120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
131412120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
131512120Sar4jc@virginia.edu
131612138Sgabeblack@google.com                        if (std::isnan(fs1) || std::isnan(fs2)) {
131712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
131812120Sar4jc@virginia.edu                            Rd = 0;
131912120Sar4jc@virginia.edu                        } else {
132012120Sar4jc@virginia.edu                            Rd = fs1 < fs2 ? 1 : 0;
132112120Sar4jc@virginia.edu                        }
132212120Sar4jc@virginia.edu                    }}, FloatCmpOp);
132312120Sar4jc@virginia.edu                    0x2: feq_s({{
132412120Sar4jc@virginia.edu                        uint32_t temp;
132512120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
132612120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
132712120Sar4jc@virginia.edu
132812120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
132912120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
133012120Sar4jc@virginia.edu                        }
133112120Sar4jc@virginia.edu                        Rd = fs1 == fs2 ? 1 : 0;
133212120Sar4jc@virginia.edu                    }}, FloatCmpOp);
133312120Sar4jc@virginia.edu                }
133412120Sar4jc@virginia.edu                0x51: decode ROUND_MODE {
133512120Sar4jc@virginia.edu                    0x0: fle_d({{
133612138Sgabeblack@google.com                        if (std::isnan(Fs1) || std::isnan(Fs2)) {
133712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
133812120Sar4jc@virginia.edu                            Rd = 0;
133912120Sar4jc@virginia.edu                        } else {
134012120Sar4jc@virginia.edu                            Rd = Fs1 <= Fs2 ? 1 : 0;
134112120Sar4jc@virginia.edu                        }
134212120Sar4jc@virginia.edu                    }}, FloatCmpOp);
134312120Sar4jc@virginia.edu                    0x1: flt_d({{
134412138Sgabeblack@google.com                        if (std::isnan(Fs1) || std::isnan(Fs2)) {
134512120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
134612120Sar4jc@virginia.edu                            Rd = 0;
134712120Sar4jc@virginia.edu                        } else {
134812120Sar4jc@virginia.edu                            Rd = Fs1 < Fs2 ? 1 : 0;
134912120Sar4jc@virginia.edu                        }
135012120Sar4jc@virginia.edu                    }}, FloatCmpOp);
135112120Sar4jc@virginia.edu                    0x2: feq_d({{
135212120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
135312120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
135412120Sar4jc@virginia.edu                        }
135512120Sar4jc@virginia.edu                        Rd = Fs1 == Fs2 ? 1 : 0;
135612120Sar4jc@virginia.edu                    }}, FloatCmpOp);
135712120Sar4jc@virginia.edu                }
135812120Sar4jc@virginia.edu                0x60: decode CONV_SGN {
135912120Sar4jc@virginia.edu                    0x0: fcvt_w_s({{
136012120Sar4jc@virginia.edu                        uint32_t temp;
136112120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
136212120Sar4jc@virginia.edu
136312138Sgabeblack@google.com                        if (std::isnan(fs1)) {
136412120Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::max();
136512120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
136612444Sar4jc@virginia.edu                        } else if (fs1 >= numeric_limits<int32_t>::max()) {
136712444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::max();
136812444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
136912444Sar4jc@virginia.edu                        } else if (fs1 <= numeric_limits<int32_t>::min()) {
137012444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::min();
137112444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
137212120Sar4jc@virginia.edu                        } else {
137312120Sar4jc@virginia.edu                            Rd_sd = (int32_t)fs1;
137412120Sar4jc@virginia.edu                        }
137512120Sar4jc@virginia.edu                    }}, FloatCvtOp);
137612120Sar4jc@virginia.edu                    0x1: fcvt_wu_s({{
137712120Sar4jc@virginia.edu                        uint32_t temp;
137812120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
137912120Sar4jc@virginia.edu
138012444Sar4jc@virginia.edu                        if (std::isnan(fs1)) {
138112444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
138212444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
138312444Sar4jc@virginia.edu                        } else if (fs1 < 0.0) {
138412120Sar4jc@virginia.edu                            Rd = 0;
138512120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
138612444Sar4jc@virginia.edu                        } else if (fs1 > numeric_limits<uint32_t>::max()) {
138712444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
138812444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
138912120Sar4jc@virginia.edu                        } else {
139012120Sar4jc@virginia.edu                            Rd = (uint32_t)fs1;
139112120Sar4jc@virginia.edu                        }
139212120Sar4jc@virginia.edu                    }}, FloatCvtOp);
139312120Sar4jc@virginia.edu                    0x2: fcvt_l_s({{
139412120Sar4jc@virginia.edu                        uint32_t temp;
139512120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
139612120Sar4jc@virginia.edu
139712138Sgabeblack@google.com                        if (std::isnan(fs1)) {
139812120Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::max();
139912120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
140012444Sar4jc@virginia.edu                        } else if (fs1 > numeric_limits<int64_t>::max()) {
140112444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::max();
140212444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
140312444Sar4jc@virginia.edu                        } else if (fs1 < numeric_limits<int64_t>::min()) {
140412444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::min();
140512444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
140612120Sar4jc@virginia.edu                        } else {
140712120Sar4jc@virginia.edu                            Rd_sd = (int64_t)fs1;
140812120Sar4jc@virginia.edu                        }
140912120Sar4jc@virginia.edu                    }}, FloatCvtOp);
141012120Sar4jc@virginia.edu                    0x3: fcvt_lu_s({{
141112120Sar4jc@virginia.edu                        uint32_t temp;
141212120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
141312120Sar4jc@virginia.edu
141412444Sar4jc@virginia.edu                        if (std::isnan(fs1)) {
141512444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
141612444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
141712444Sar4jc@virginia.edu                        } else if (fs1 < 0.0) {
141812120Sar4jc@virginia.edu                            Rd = 0;
141912120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
142012444Sar4jc@virginia.edu                        } else if (fs1 > numeric_limits<uint64_t>::max()) {
142112444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
142212444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
142312120Sar4jc@virginia.edu                        } else {
142412120Sar4jc@virginia.edu                            Rd = (uint64_t)fs1;
142512120Sar4jc@virginia.edu                        }
142612120Sar4jc@virginia.edu                    }}, FloatCvtOp);
142712120Sar4jc@virginia.edu                }
142812120Sar4jc@virginia.edu                0x61: decode CONV_SGN {
142912120Sar4jc@virginia.edu                    0x0: fcvt_w_d({{
143012444Sar4jc@virginia.edu                        if (std::isnan(Fs1)) {
143112444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::max();
143212444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
143312444Sar4jc@virginia.edu                        } else if (Fs1 > numeric_limits<int32_t>::max()) {
143412444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::max();
143512444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
143612444Sar4jc@virginia.edu                        } else if (Fs1 < numeric_limits<int32_t>::min()) {
143712444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::min();
143812444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
143912444Sar4jc@virginia.edu                        } else {
144012444Sar4jc@virginia.edu                            Rd_sd = (int32_t)Fs1;
144112120Sar4jc@virginia.edu                        }
144212120Sar4jc@virginia.edu                    }}, FloatCvtOp);
144312120Sar4jc@virginia.edu                    0x1: fcvt_wu_d({{
144412444Sar4jc@virginia.edu                        if (std::isnan(Fs1)) {
144512444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
144612444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
144712444Sar4jc@virginia.edu                        } else if (Fs1 < 0) {
144812120Sar4jc@virginia.edu                            Rd = 0;
144912120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
145012444Sar4jc@virginia.edu                        } else if (Fs1 > numeric_limits<uint32_t>::max()) {
145112444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
145212444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
145312120Sar4jc@virginia.edu                        } else {
145412120Sar4jc@virginia.edu                            Rd = (uint32_t)Fs1;
145512120Sar4jc@virginia.edu                        }
145612120Sar4jc@virginia.edu                    }}, FloatCvtOp);
145712120Sar4jc@virginia.edu                    0x2: fcvt_l_d({{
145812444Sar4jc@virginia.edu                        if (std::isnan(Fs1)) {
145912444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::max();
146012444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
146112444Sar4jc@virginia.edu                        } else if (Fs1 > numeric_limits<int64_t>::max()) {
146212444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::max();
146312444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
146412444Sar4jc@virginia.edu                        } else if (Fs1 < numeric_limits<int64_t>::min()) {
146512444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::min();
146612444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
146712444Sar4jc@virginia.edu                        } else {
146812444Sar4jc@virginia.edu                            Rd_sd = Fs1;
146912120Sar4jc@virginia.edu                        }
147012120Sar4jc@virginia.edu                    }}, FloatCvtOp);
147112120Sar4jc@virginia.edu                    0x3: fcvt_lu_d({{
147212444Sar4jc@virginia.edu                        if (std::isnan(Fs1)) {
147312444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
147412444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
147512444Sar4jc@virginia.edu                        } else if (Fs1 < 0) {
147612120Sar4jc@virginia.edu                            Rd = 0;
147712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
147812444Sar4jc@virginia.edu                        } else if (Fs1 > numeric_limits<uint64_t>::max()) {
147912444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
148012444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
148112120Sar4jc@virginia.edu                        } else {
148212444Sar4jc@virginia.edu                            Rd = Fs1;
148312120Sar4jc@virginia.edu                        }
148412120Sar4jc@virginia.edu                    }}, FloatCvtOp);
148512120Sar4jc@virginia.edu                }
148612120Sar4jc@virginia.edu                0x68: decode CONV_SGN {
148712120Sar4jc@virginia.edu                    0x0: fcvt_s_w({{
148812120Sar4jc@virginia.edu                        float temp = (float)Rs1_sw;
148912120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
149012120Sar4jc@virginia.edu                    }}, FloatCvtOp);
149112120Sar4jc@virginia.edu                    0x1: fcvt_s_wu({{
149212120Sar4jc@virginia.edu                        float temp = (float)Rs1_uw;
149312120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
149412120Sar4jc@virginia.edu                    }}, FloatCvtOp);
149512120Sar4jc@virginia.edu                    0x2: fcvt_s_l({{
149612120Sar4jc@virginia.edu                        float temp = (float)Rs1_sd;
149712120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
149812120Sar4jc@virginia.edu                    }}, FloatCvtOp);
149912120Sar4jc@virginia.edu                    0x3: fcvt_s_lu({{
150012120Sar4jc@virginia.edu                        float temp = (float)Rs1;
150112120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
150212120Sar4jc@virginia.edu                    }}, FloatCvtOp);
150312120Sar4jc@virginia.edu                }
150412120Sar4jc@virginia.edu                0x69: decode CONV_SGN {
150512120Sar4jc@virginia.edu                    0x0: fcvt_d_w({{
150612120Sar4jc@virginia.edu                        Fd = (double)Rs1_sw;
150712120Sar4jc@virginia.edu                    }}, FloatCvtOp);
150812120Sar4jc@virginia.edu                    0x1: fcvt_d_wu({{
150912120Sar4jc@virginia.edu                        Fd = (double)Rs1_uw;
151012120Sar4jc@virginia.edu                    }}, FloatCvtOp);
151112120Sar4jc@virginia.edu                    0x2: fcvt_d_l({{
151212120Sar4jc@virginia.edu                        Fd = (double)Rs1_sd;
151312120Sar4jc@virginia.edu                    }}, FloatCvtOp);
151412120Sar4jc@virginia.edu                    0x3: fcvt_d_lu({{
151512120Sar4jc@virginia.edu                        Fd = (double)Rs1;
151612120Sar4jc@virginia.edu                    }}, FloatCvtOp);
151712120Sar4jc@virginia.edu                }
151812120Sar4jc@virginia.edu                0x70: decode ROUND_MODE {
151912120Sar4jc@virginia.edu                    0x0: fmv_x_s({{
152012120Sar4jc@virginia.edu                        Rd = (uint32_t)Fs1_bits;
152112120Sar4jc@virginia.edu                        if ((Rd&0x80000000) != 0) {
152212120Sar4jc@virginia.edu                            Rd |= (0xFFFFFFFFULL << 32);
152312120Sar4jc@virginia.edu                        }
152412120Sar4jc@virginia.edu                    }}, FloatCvtOp);
152512120Sar4jc@virginia.edu                    0x1: fclass_s({{
152612120Sar4jc@virginia.edu                        uint32_t temp;
152712120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
152812120Sar4jc@virginia.edu                        switch (fpclassify(fs1)) {
152912445Sar4jc@virginia.edu                          case FP_INFINITE:
153012120Sar4jc@virginia.edu                            if (signbit(fs1)) {
153112120Sar4jc@virginia.edu                                Rd = 1 << 0;
153212120Sar4jc@virginia.edu                            } else {
153312120Sar4jc@virginia.edu                                Rd = 1 << 7;
153412120Sar4jc@virginia.edu                            }
153512120Sar4jc@virginia.edu                            break;
153612445Sar4jc@virginia.edu                          case FP_NAN:
153712120Sar4jc@virginia.edu                            if (issignalingnan(fs1)) {
153812120Sar4jc@virginia.edu                                Rd = 1 << 8;
153912120Sar4jc@virginia.edu                            } else {
154012120Sar4jc@virginia.edu                                Rd = 1 << 9;
154112120Sar4jc@virginia.edu                            }
154212120Sar4jc@virginia.edu                            break;
154312445Sar4jc@virginia.edu                          case FP_ZERO:
154412120Sar4jc@virginia.edu                            if (signbit(fs1)) {
154512120Sar4jc@virginia.edu                                Rd = 1 << 3;
154612120Sar4jc@virginia.edu                            } else {
154712120Sar4jc@virginia.edu                                Rd = 1 << 4;
154812120Sar4jc@virginia.edu                            }
154912120Sar4jc@virginia.edu                            break;
155012445Sar4jc@virginia.edu                          case FP_SUBNORMAL:
155112120Sar4jc@virginia.edu                            if (signbit(fs1)) {
155212120Sar4jc@virginia.edu                                Rd = 1 << 2;
155312120Sar4jc@virginia.edu                            } else {
155412120Sar4jc@virginia.edu                                Rd = 1 << 5;
155512120Sar4jc@virginia.edu                            }
155612120Sar4jc@virginia.edu                            break;
155712445Sar4jc@virginia.edu                          case FP_NORMAL:
155812120Sar4jc@virginia.edu                            if (signbit(fs1)) {
155912120Sar4jc@virginia.edu                                Rd = 1 << 1;
156012120Sar4jc@virginia.edu                            } else {
156112120Sar4jc@virginia.edu                                Rd = 1 << 6;
156212120Sar4jc@virginia.edu                            }
156312120Sar4jc@virginia.edu                            break;
156412445Sar4jc@virginia.edu                          default:
156512120Sar4jc@virginia.edu                            panic("Unknown classification for operand.");
156612120Sar4jc@virginia.edu                            break;
156712120Sar4jc@virginia.edu                        }
156812445Sar4jc@virginia.edu                    }}, FloatMiscOp);
156912120Sar4jc@virginia.edu                }
157012120Sar4jc@virginia.edu                0x71: decode ROUND_MODE {
157112120Sar4jc@virginia.edu                    0x0: fmv_x_d({{
157212120Sar4jc@virginia.edu                        Rd = Fs1_bits;
157312120Sar4jc@virginia.edu                    }}, FloatCvtOp);
157412120Sar4jc@virginia.edu                    0x1: fclass_d({{
157512120Sar4jc@virginia.edu                        switch (fpclassify(Fs1)) {
157612445Sar4jc@virginia.edu                          case FP_INFINITE:
157712120Sar4jc@virginia.edu                            if (signbit(Fs1)) {
157812120Sar4jc@virginia.edu                                Rd = 1 << 0;
157912120Sar4jc@virginia.edu                            } else {
158012120Sar4jc@virginia.edu                                Rd = 1 << 7;
158112120Sar4jc@virginia.edu                            }
158212120Sar4jc@virginia.edu                            break;
158312445Sar4jc@virginia.edu                          case FP_NAN:
158412120Sar4jc@virginia.edu                            if (issignalingnan(Fs1)) {
158512120Sar4jc@virginia.edu                                Rd = 1 << 8;
158612120Sar4jc@virginia.edu                            } else {
158712120Sar4jc@virginia.edu                                Rd = 1 << 9;
158812120Sar4jc@virginia.edu                            }
158912120Sar4jc@virginia.edu                            break;
159012445Sar4jc@virginia.edu                          case FP_ZERO:
159112120Sar4jc@virginia.edu                            if (signbit(Fs1)) {
159212120Sar4jc@virginia.edu                                Rd = 1 << 3;
159312120Sar4jc@virginia.edu                            } else {
159412120Sar4jc@virginia.edu                                Rd = 1 << 4;
159512120Sar4jc@virginia.edu                            }
159612120Sar4jc@virginia.edu                            break;
159712445Sar4jc@virginia.edu                          case FP_SUBNORMAL:
159812120Sar4jc@virginia.edu                            if (signbit(Fs1)) {
159912120Sar4jc@virginia.edu                                Rd = 1 << 2;
160012120Sar4jc@virginia.edu                            } else {
160112120Sar4jc@virginia.edu                                Rd = 1 << 5;
160212120Sar4jc@virginia.edu                            }
160312120Sar4jc@virginia.edu                            break;
160412445Sar4jc@virginia.edu                          case FP_NORMAL:
160512120Sar4jc@virginia.edu                            if (signbit(Fs1)) {
160612120Sar4jc@virginia.edu                                Rd = 1 << 1;
160712120Sar4jc@virginia.edu                            } else {
160812120Sar4jc@virginia.edu                                Rd = 1 << 6;
160912120Sar4jc@virginia.edu                            }
161012120Sar4jc@virginia.edu                            break;
161112445Sar4jc@virginia.edu                          default:
161212120Sar4jc@virginia.edu                            panic("Unknown classification for operand.");
161312120Sar4jc@virginia.edu                            break;
161412120Sar4jc@virginia.edu                        }
161512445Sar4jc@virginia.edu                    }}, FloatMiscOp);
161612120Sar4jc@virginia.edu                }
161712120Sar4jc@virginia.edu                0x78: fmv_s_x({{
161812120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)Rs1_uw;
161911725Sar4jc@virginia.edu                }}, FloatCvtOp);
162012120Sar4jc@virginia.edu                0x79: fmv_d_x({{
162112120Sar4jc@virginia.edu                    Fd_bits = Rs1;
162211725Sar4jc@virginia.edu                }}, FloatCvtOp);
162311725Sar4jc@virginia.edu            }
162412120Sar4jc@virginia.edu        }
162512120Sar4jc@virginia.edu
162612120Sar4jc@virginia.edu        0x18: decode FUNCT3 {
162712120Sar4jc@virginia.edu            format BOp {
162812120Sar4jc@virginia.edu                0x0: beq({{
162912120Sar4jc@virginia.edu                    if (Rs1 == Rs2) {
163012120Sar4jc@virginia.edu                        NPC = PC + imm;
163112120Sar4jc@virginia.edu                    } else {
163212120Sar4jc@virginia.edu                        NPC = NPC;
163311725Sar4jc@virginia.edu                    }
163412120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
163512120Sar4jc@virginia.edu                0x1: bne({{
163612120Sar4jc@virginia.edu                    if (Rs1 != Rs2) {
163712120Sar4jc@virginia.edu                        NPC = PC + imm;
163811725Sar4jc@virginia.edu                    } else {
163912120Sar4jc@virginia.edu                        NPC = NPC;
164011725Sar4jc@virginia.edu                    }
164112120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
164212120Sar4jc@virginia.edu                0x4: blt({{
164312120Sar4jc@virginia.edu                    if (Rs1_sd < Rs2_sd) {
164412120Sar4jc@virginia.edu                        NPC = PC + imm;
164512120Sar4jc@virginia.edu                    } else {
164612120Sar4jc@virginia.edu                        NPC = NPC;
164711725Sar4jc@virginia.edu                    }
164812120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
164912120Sar4jc@virginia.edu                0x5: bge({{
165012120Sar4jc@virginia.edu                    if (Rs1_sd >= Rs2_sd) {
165112120Sar4jc@virginia.edu                        NPC = PC + imm;
165211725Sar4jc@virginia.edu                    } else {
165312120Sar4jc@virginia.edu                        NPC = NPC;
165411725Sar4jc@virginia.edu                    }
165512120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
165612120Sar4jc@virginia.edu                0x6: bltu({{
165712120Sar4jc@virginia.edu                    if (Rs1 < Rs2) {
165812120Sar4jc@virginia.edu                        NPC = PC + imm;
165912120Sar4jc@virginia.edu                    } else {
166012120Sar4jc@virginia.edu                        NPC = NPC;
166112120Sar4jc@virginia.edu                    }
166212120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
166312120Sar4jc@virginia.edu                0x7: bgeu({{
166412120Sar4jc@virginia.edu                    if (Rs1 >= Rs2) {
166512120Sar4jc@virginia.edu                        NPC = PC + imm;
166612120Sar4jc@virginia.edu                    } else {
166712120Sar4jc@virginia.edu                        NPC = NPC;
166812120Sar4jc@virginia.edu                    }
166912120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
167011725Sar4jc@virginia.edu            }
167112120Sar4jc@virginia.edu        }
167212120Sar4jc@virginia.edu
167312120Sar4jc@virginia.edu        0x19: decode FUNCT3 {
167412120Sar4jc@virginia.edu            0x0: Jump::jalr({{
167512120Sar4jc@virginia.edu                Rd = NPC;
167612120Sar4jc@virginia.edu                NPC = (imm + Rs1) & (~0x1);
167712120Sar4jc@virginia.edu            }}, IsIndirectControl, IsUncondControl, IsCall);
167812120Sar4jc@virginia.edu        }
167912120Sar4jc@virginia.edu
168012120Sar4jc@virginia.edu        0x1b: JOp::jal({{
168112120Sar4jc@virginia.edu            Rd = NPC;
168212120Sar4jc@virginia.edu            NPC = PC + imm;
168312120Sar4jc@virginia.edu        }}, IsDirectControl, IsUncondControl, IsCall);
168412120Sar4jc@virginia.edu
168512120Sar4jc@virginia.edu        0x1c: decode FUNCT3 {
168612120Sar4jc@virginia.edu            format SystemOp {
168712120Sar4jc@virginia.edu                0x0: decode FUNCT12 {
168812120Sar4jc@virginia.edu                    0x0: ecall({{
168912120Sar4jc@virginia.edu                        fault = make_shared<SyscallFault>();
169012120Sar4jc@virginia.edu                    }}, IsSerializeAfter, IsNonSpeculative, IsSyscall,
169112120Sar4jc@virginia.edu                        No_OpClass);
169212120Sar4jc@virginia.edu                    0x1: ebreak({{
169312120Sar4jc@virginia.edu                        fault = make_shared<BreakpointFault>();
169412120Sar4jc@virginia.edu                    }}, IsSerializeAfter, IsNonSpeculative, No_OpClass);
169512120Sar4jc@virginia.edu                    0x100: eret({{
169612120Sar4jc@virginia.edu                        fault = make_shared<UnimplementedFault>("eret");
169712120Sar4jc@virginia.edu                    }}, No_OpClass);
169812120Sar4jc@virginia.edu                }
169911725Sar4jc@virginia.edu            }
170012120Sar4jc@virginia.edu            format CSROp {
170112120Sar4jc@virginia.edu                0x1: csrrw({{
170212695Sar4jc@virginia.edu                    Rd = data;
170312695Sar4jc@virginia.edu                    data = Rs1;
170412120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
170512120Sar4jc@virginia.edu                0x2: csrrs({{
170612695Sar4jc@virginia.edu                    Rd = data;
170712695Sar4jc@virginia.edu                    data |= Rs1;
170812120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
170912120Sar4jc@virginia.edu                0x3: csrrc({{
171012695Sar4jc@virginia.edu                    Rd = data;
171112695Sar4jc@virginia.edu                    data &= ~Rs1;
171212120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
171312120Sar4jc@virginia.edu                0x5: csrrwi({{
171412695Sar4jc@virginia.edu                    Rd = data;
171512695Sar4jc@virginia.edu                    data = uimm;
171612120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
171712120Sar4jc@virginia.edu                0x6: csrrsi({{
171812695Sar4jc@virginia.edu                    Rd = data;
171912695Sar4jc@virginia.edu                    data |= uimm;
172012120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
172112120Sar4jc@virginia.edu                0x7: csrrci({{
172212695Sar4jc@virginia.edu                    Rd = data;
172312695Sar4jc@virginia.edu                    data &= ~uimm;
172412120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
172511725Sar4jc@virginia.edu            }
172611725Sar4jc@virginia.edu        }
172711725Sar4jc@virginia.edu    }
172812138Sgabeblack@google.com}
1729