111723Sar4jc@virginia.edu// -*- mode:c++ -*-
211723Sar4jc@virginia.edu
311723Sar4jc@virginia.edu// Copyright (c) 2015 RISC-V Foundation
412120Sar4jc@virginia.edu// Copyright (c) 2017 The University of Virginia
511723Sar4jc@virginia.edu// All rights reserved.
611723Sar4jc@virginia.edu//
711723Sar4jc@virginia.edu// Redistribution and use in source and binary forms, with or without
811723Sar4jc@virginia.edu// modification, are permitted provided that the following conditions are
911723Sar4jc@virginia.edu// met: redistributions of source code must retain the above copyright
1011723Sar4jc@virginia.edu// notice, this list of conditions and the following disclaimer;
1111723Sar4jc@virginia.edu// redistributions in binary form must reproduce the above copyright
1211723Sar4jc@virginia.edu// notice, this list of conditions and the following disclaimer in the
1311723Sar4jc@virginia.edu// documentation and/or other materials provided with the distribution;
1411723Sar4jc@virginia.edu// neither the name of the copyright holders nor the names of its
1511723Sar4jc@virginia.edu// contributors may be used to endorse or promote products derived from
1611723Sar4jc@virginia.edu// this software without specific prior written permission.
1711723Sar4jc@virginia.edu//
1811723Sar4jc@virginia.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1911723Sar4jc@virginia.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
2011723Sar4jc@virginia.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2111723Sar4jc@virginia.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2211723Sar4jc@virginia.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2311723Sar4jc@virginia.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2411723Sar4jc@virginia.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2511723Sar4jc@virginia.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2611723Sar4jc@virginia.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2711723Sar4jc@virginia.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2811723Sar4jc@virginia.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2911723Sar4jc@virginia.edu//
3011723Sar4jc@virginia.edu// Authors: Alec Roelke
3111723Sar4jc@virginia.edu
3211723Sar4jc@virginia.edu////////////////////////////////////////////////////////////////////
3311723Sar4jc@virginia.edu//
3411723Sar4jc@virginia.edu// The RISC-V ISA decoder
3511723Sar4jc@virginia.edu//
3611723Sar4jc@virginia.edu
3712120Sar4jc@virginia.edudecode QUADRANT default Unknown::unknown() {
3812120Sar4jc@virginia.edu    0x0: decode COPCODE {
3912428Sar4jc@virginia.edu        0x0: CIOp::c_addi4spn({{
4012120Sar4jc@virginia.edu            imm = CIMM8<1:1> << 2 |
4112120Sar4jc@virginia.edu                  CIMM8<0:0> << 3 |
4212120Sar4jc@virginia.edu                  CIMM8<7:6> << 4 |
4312120Sar4jc@virginia.edu                  CIMM8<5:2> << 6;
4412120Sar4jc@virginia.edu        }}, {{
4512136Sar4jc@virginia.edu            if (machInst == 0)
4612849Sar4jc@virginia.edu                fault = make_shared<IllegalInstFault>("zero instruction",
4712849Sar4jc@virginia.edu                                                      machInst);
4812120Sar4jc@virginia.edu            Rp2 = sp + imm;
4912428Sar4jc@virginia.edu        }}, uint64_t);
5012120Sar4jc@virginia.edu        format CompressedLoad {
5112120Sar4jc@virginia.edu            0x1: c_fld({{
5212322Sar4jc@virginia.edu                offset = CIMM3 << 3 | CIMM2 << 6;
5312120Sar4jc@virginia.edu            }}, {{
5412120Sar4jc@virginia.edu                Fp2_bits = Mem;
5512120Sar4jc@virginia.edu            }}, {{
5612322Sar4jc@virginia.edu                EA = Rp1 + offset;
5711723Sar4jc@virginia.edu            }});
5812120Sar4jc@virginia.edu            0x2: c_lw({{
5912322Sar4jc@virginia.edu                offset = CIMM2<1:1> << 2 |
6012322Sar4jc@virginia.edu                         CIMM3 << 3 |
6112322Sar4jc@virginia.edu                         CIMM2<0:0> << 6;
6212120Sar4jc@virginia.edu            }}, {{
6312120Sar4jc@virginia.edu                Rp2_sd = Mem_sw;
6412120Sar4jc@virginia.edu            }}, {{
6512322Sar4jc@virginia.edu                EA = Rp1 + offset;
6611723Sar4jc@virginia.edu            }});
6712120Sar4jc@virginia.edu            0x3: c_ld({{
6812322Sar4jc@virginia.edu                offset = CIMM3 << 3 | CIMM2 << 6;
6912120Sar4jc@virginia.edu            }}, {{
7012120Sar4jc@virginia.edu                Rp2_sd = Mem_sd;
7112120Sar4jc@virginia.edu            }}, {{
7212322Sar4jc@virginia.edu                EA = Rp1 + offset;
7311723Sar4jc@virginia.edu            }});
7412120Sar4jc@virginia.edu        }
7512120Sar4jc@virginia.edu        format CompressedStore {
7612120Sar4jc@virginia.edu            0x5: c_fsd({{
7712322Sar4jc@virginia.edu                offset = CIMM3 << 3 | CIMM2 << 6;
7812120Sar4jc@virginia.edu            }}, {{
7912120Sar4jc@virginia.edu                Mem = Fp2_bits;
8012120Sar4jc@virginia.edu            }}, {{
8112322Sar4jc@virginia.edu                EA = Rp1 + offset;
8211723Sar4jc@virginia.edu            }});
8312120Sar4jc@virginia.edu            0x6: c_sw({{
8412322Sar4jc@virginia.edu                offset = CIMM2<1:1> << 2 |
8512322Sar4jc@virginia.edu                         CIMM3 << 3 |
8612322Sar4jc@virginia.edu                         CIMM2<0:0> << 6;
8712120Sar4jc@virginia.edu            }}, {{
8812120Sar4jc@virginia.edu                Mem_uw = Rp2_uw;
8912120Sar4jc@virginia.edu            }}, ea_code={{
9012322Sar4jc@virginia.edu                EA = Rp1 + offset;
9111723Sar4jc@virginia.edu            }});
9212120Sar4jc@virginia.edu            0x7: c_sd({{
9312322Sar4jc@virginia.edu                offset = CIMM3 << 3 | CIMM2 << 6;
9412120Sar4jc@virginia.edu            }}, {{
9512120Sar4jc@virginia.edu                    Mem_ud = Rp2_ud;
9612120Sar4jc@virginia.edu            }}, {{
9712322Sar4jc@virginia.edu                EA = Rp1 + offset;
9811723Sar4jc@virginia.edu            }});
9911723Sar4jc@virginia.edu        }
10011723Sar4jc@virginia.edu    }
10112120Sar4jc@virginia.edu    0x1: decode COPCODE {
10212120Sar4jc@virginia.edu        format CIOp {
10312120Sar4jc@virginia.edu            0x0: c_addi({{
10412120Sar4jc@virginia.edu                imm = CIMM5;
10512120Sar4jc@virginia.edu                if (CIMM1 > 0)
10612120Sar4jc@virginia.edu                    imm |= ~((uint64_t)0x1F);
10712120Sar4jc@virginia.edu            }}, {{
10812136Sar4jc@virginia.edu                if ((RC1 == 0) != (imm == 0)) {
10912136Sar4jc@virginia.edu                    if (RC1 == 0) {
11012849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("source reg x0",
11112849Sar4jc@virginia.edu                                                              machInst);
11212136Sar4jc@virginia.edu                    } else // imm == 0
11312849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("immediate = 0",
11412849Sar4jc@virginia.edu                                                              machInst);
11512136Sar4jc@virginia.edu                }
11612120Sar4jc@virginia.edu                Rc1_sd = Rc1_sd + imm;
11712120Sar4jc@virginia.edu            }});
11812120Sar4jc@virginia.edu            0x1: c_addiw({{
11912120Sar4jc@virginia.edu                imm = CIMM5;
12012120Sar4jc@virginia.edu                if (CIMM1 > 0)
12112120Sar4jc@virginia.edu                    imm |= ~((uint64_t)0x1F);
12212120Sar4jc@virginia.edu            }}, {{
12312596Sqtt2@cornell.edu                if (RC1 == 0) {
12412849Sar4jc@virginia.edu                    fault = make_shared<IllegalInstFault>("source reg x0",
12512849Sar4jc@virginia.edu                                                          machInst);
12612596Sqtt2@cornell.edu                }
12712120Sar4jc@virginia.edu                Rc1_sd = (int32_t)Rc1_sd + imm;
12812120Sar4jc@virginia.edu            }});
12912120Sar4jc@virginia.edu            0x2: c_li({{
13012120Sar4jc@virginia.edu                imm = CIMM5;
13112120Sar4jc@virginia.edu                if (CIMM1 > 0)
13212120Sar4jc@virginia.edu                    imm |= ~((uint64_t)0x1F);
13312120Sar4jc@virginia.edu            }}, {{
13412596Sqtt2@cornell.edu                if (RC1 == 0) {
13512849Sar4jc@virginia.edu                    fault = make_shared<IllegalInstFault>("source reg x0",
13612849Sar4jc@virginia.edu                                                          machInst);
13712596Sqtt2@cornell.edu                }
13812120Sar4jc@virginia.edu                Rc1_sd = imm;
13912120Sar4jc@virginia.edu            }});
14012120Sar4jc@virginia.edu            0x3: decode RC1 {
14112120Sar4jc@virginia.edu                0x2: c_addi16sp({{
14212120Sar4jc@virginia.edu                    imm = CIMM5<4:4> << 4 |
14312120Sar4jc@virginia.edu                          CIMM5<0:0> << 5 |
14412120Sar4jc@virginia.edu                          CIMM5<3:3> << 6 |
14512120Sar4jc@virginia.edu                          CIMM5<2:1> << 7;
14612120Sar4jc@virginia.edu                    if (CIMM1 > 0)
14712120Sar4jc@virginia.edu                        imm |= ~((int64_t)0x1FF);
14812120Sar4jc@virginia.edu                }}, {{
14912596Sqtt2@cornell.edu                    if (imm == 0) {
15012849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("immediate = 0",
15112849Sar4jc@virginia.edu                                                              machInst);
15212596Sqtt2@cornell.edu                    }
15312120Sar4jc@virginia.edu                    sp_sd = sp_sd + imm;
15412120Sar4jc@virginia.edu                }});
15512120Sar4jc@virginia.edu                default: c_lui({{
15612120Sar4jc@virginia.edu                    imm = CIMM5 << 12;
15712120Sar4jc@virginia.edu                    if (CIMM1 > 0)
15812120Sar4jc@virginia.edu                        imm |= ~((uint64_t)0x1FFFF);
15912120Sar4jc@virginia.edu                }}, {{
16012596Sqtt2@cornell.edu                    if (RC1 == 0 || RC1 == 2) {
16112849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("source reg x0",
16212849Sar4jc@virginia.edu                                                              machInst);
16312596Sqtt2@cornell.edu                    }
16412596Sqtt2@cornell.edu                    if (imm == 0) {
16512849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("immediate = 0",
16612849Sar4jc@virginia.edu                                                              machInst);
16712596Sqtt2@cornell.edu                    }
16812120Sar4jc@virginia.edu                    Rc1_sd = imm;
16912120Sar4jc@virginia.edu                }});
17012120Sar4jc@virginia.edu            }
17112120Sar4jc@virginia.edu        }
17212120Sar4jc@virginia.edu        0x4: decode CFUNCT2HIGH {
17312428Sar4jc@virginia.edu            format CIOp {
17412120Sar4jc@virginia.edu                0x0: c_srli({{
17512120Sar4jc@virginia.edu                    imm = CIMM5 | (CIMM1 << 5);
17612120Sar4jc@virginia.edu                }}, {{
17712596Sqtt2@cornell.edu                    if (imm == 0) {
17812849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("immediate = 0",
17912849Sar4jc@virginia.edu                                                              machInst);
18012596Sqtt2@cornell.edu                    }
18112120Sar4jc@virginia.edu                    Rp1 = Rp1 >> imm;
18212428Sar4jc@virginia.edu                }}, uint64_t);
18312120Sar4jc@virginia.edu                0x1: c_srai({{
18412120Sar4jc@virginia.edu                    imm = CIMM5 | (CIMM1 << 5);
18512120Sar4jc@virginia.edu                }}, {{
18612596Sqtt2@cornell.edu                    if (imm == 0) {
18712849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("immediate = 0",
18812849Sar4jc@virginia.edu                                                              machInst);
18912596Sqtt2@cornell.edu                    }
19012120Sar4jc@virginia.edu                    Rp1_sd = Rp1_sd >> imm;
19112428Sar4jc@virginia.edu                }}, uint64_t);
19212120Sar4jc@virginia.edu                0x2: c_andi({{
19312120Sar4jc@virginia.edu                    imm = CIMM5;
19412120Sar4jc@virginia.edu                    if (CIMM1 > 0)
19512120Sar4jc@virginia.edu                        imm |= ~((uint64_t)0x1F);
19612120Sar4jc@virginia.edu                }}, {{
19712120Sar4jc@virginia.edu                    Rp1 = Rp1 & imm;
19812428Sar4jc@virginia.edu                }}, uint64_t);
19912120Sar4jc@virginia.edu            }
20012120Sar4jc@virginia.edu            format ROp {
20112120Sar4jc@virginia.edu                0x3: decode CFUNCT1 {
20212120Sar4jc@virginia.edu                    0x0: decode CFUNCT2LOW {
20312120Sar4jc@virginia.edu                        0x0: c_sub({{
20412120Sar4jc@virginia.edu                            Rp1 = Rp1 - Rp2;
20512120Sar4jc@virginia.edu                        }});
20612120Sar4jc@virginia.edu                        0x1: c_xor({{
20712120Sar4jc@virginia.edu                            Rp1 = Rp1 ^ Rp2;
20812120Sar4jc@virginia.edu                        }});
20912120Sar4jc@virginia.edu                        0x2: c_or({{
21012120Sar4jc@virginia.edu                            Rp1 = Rp1 | Rp2;
21112120Sar4jc@virginia.edu                        }});
21212120Sar4jc@virginia.edu                        0x3: c_and({{
21312120Sar4jc@virginia.edu                            Rp1 = Rp1 & Rp2;
21412120Sar4jc@virginia.edu                        }});
21512120Sar4jc@virginia.edu                    }
21612120Sar4jc@virginia.edu                    0x1: decode CFUNCT2LOW {
21712120Sar4jc@virginia.edu                        0x0: c_subw({{
21812120Sar4jc@virginia.edu                            Rp1_sd = (int32_t)Rp1_sd - Rp2_sw;
21912120Sar4jc@virginia.edu                        }});
22012120Sar4jc@virginia.edu                        0x1: c_addw({{
22112120Sar4jc@virginia.edu                            Rp1_sd = (int32_t)Rp1_sd + Rp2_sw;
22212120Sar4jc@virginia.edu                        }});
22312120Sar4jc@virginia.edu                    }
22412120Sar4jc@virginia.edu                }
22512120Sar4jc@virginia.edu            }
22612120Sar4jc@virginia.edu        }
22713931Savishai.tvila@gmail.com        0x5: CJOp::c_j({{
22813931Savishai.tvila@gmail.com            NPC = PC + imm;
22913931Savishai.tvila@gmail.com        }}, IsDirectControl, IsUncondControl);
23012535Sar4jc@virginia.edu        format CBOp {
23112120Sar4jc@virginia.edu            0x6: c_beqz({{
23212120Sar4jc@virginia.edu                if (Rp1 == 0)
23312535Sar4jc@virginia.edu                    NPC = PC + imm;
23412120Sar4jc@virginia.edu                else
23512120Sar4jc@virginia.edu                    NPC = NPC;
23612120Sar4jc@virginia.edu            }}, IsDirectControl, IsCondControl);
23712120Sar4jc@virginia.edu            0x7: c_bnez({{
23812120Sar4jc@virginia.edu                if (Rp1 != 0)
23912535Sar4jc@virginia.edu                    NPC = PC + imm;
24012120Sar4jc@virginia.edu                else
24112120Sar4jc@virginia.edu                    NPC = NPC;
24212120Sar4jc@virginia.edu            }}, IsDirectControl, IsCondControl);
24312120Sar4jc@virginia.edu        }
24412120Sar4jc@virginia.edu    }
24512120Sar4jc@virginia.edu    0x2: decode COPCODE {
24612428Sar4jc@virginia.edu        0x0: CIOp::c_slli({{
24712120Sar4jc@virginia.edu            imm = CIMM5 | (CIMM1 << 5);
24812120Sar4jc@virginia.edu        }}, {{
24912596Sqtt2@cornell.edu            if (imm == 0) {
25012849Sar4jc@virginia.edu                fault = make_shared<IllegalInstFault>("immediate = 0",
25112849Sar4jc@virginia.edu                                                      machInst);
25212596Sqtt2@cornell.edu            }
25312596Sqtt2@cornell.edu            if (RC1 == 0) {
25412849Sar4jc@virginia.edu                fault = make_shared<IllegalInstFault>("source reg x0",
25512849Sar4jc@virginia.edu                                                      machInst);
25612596Sqtt2@cornell.edu            }
25712120Sar4jc@virginia.edu            Rc1 = Rc1 << imm;
25812428Sar4jc@virginia.edu        }}, uint64_t);
25912120Sar4jc@virginia.edu        format CompressedLoad {
26012120Sar4jc@virginia.edu            0x1: c_fldsp({{
26112322Sar4jc@virginia.edu                offset = CIMM5<4:3> << 3 |
26212322Sar4jc@virginia.edu                         CIMM1 << 5 |
26312322Sar4jc@virginia.edu                         CIMM5<2:0> << 6;
26412120Sar4jc@virginia.edu            }}, {{
26512120Sar4jc@virginia.edu                Fc1_bits = Mem;
26612120Sar4jc@virginia.edu            }}, {{
26712322Sar4jc@virginia.edu                EA = sp + offset;
26811725Sar4jc@virginia.edu            }});
26912120Sar4jc@virginia.edu            0x2: c_lwsp({{
27012322Sar4jc@virginia.edu                offset = CIMM5<4:2> << 2 |
27112322Sar4jc@virginia.edu                         CIMM1 << 5 |
27212322Sar4jc@virginia.edu                         CIMM5<1:0> << 6;
27312120Sar4jc@virginia.edu            }}, {{
27412596Sqtt2@cornell.edu                if (RC1 == 0) {
27512849Sar4jc@virginia.edu                    fault = make_shared<IllegalInstFault>("source reg x0",
27612849Sar4jc@virginia.edu                                                          machInst);
27712596Sqtt2@cornell.edu                }
27812120Sar4jc@virginia.edu                Rc1_sd = Mem_sw;
27912120Sar4jc@virginia.edu            }}, {{
28012322Sar4jc@virginia.edu                EA = sp + offset;
28112120Sar4jc@virginia.edu            }});
28212120Sar4jc@virginia.edu            0x3: c_ldsp({{
28312322Sar4jc@virginia.edu                offset = CIMM5<4:3> << 3 |
28412322Sar4jc@virginia.edu                         CIMM1 << 5 |
28512322Sar4jc@virginia.edu                         CIMM5<2:0> << 6;
28612120Sar4jc@virginia.edu            }}, {{
28712596Sqtt2@cornell.edu                if (RC1 == 0) {
28812849Sar4jc@virginia.edu                    fault = make_shared<IllegalInstFault>("source reg x0",
28912849Sar4jc@virginia.edu                                                          machInst);
29012596Sqtt2@cornell.edu                }
29112120Sar4jc@virginia.edu                Rc1_sd = Mem_sd;
29212120Sar4jc@virginia.edu            }}, {{
29312322Sar4jc@virginia.edu                EA = sp + offset;
29412120Sar4jc@virginia.edu            }});
29512120Sar4jc@virginia.edu        }
29612120Sar4jc@virginia.edu        0x4: decode CFUNCT1 {
29712120Sar4jc@virginia.edu            0x0: decode RC2 {
29812120Sar4jc@virginia.edu                0x0: Jump::c_jr({{
29912596Sqtt2@cornell.edu                    if (RC1 == 0) {
30012849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("source reg x0",
30112849Sar4jc@virginia.edu                                                              machInst);
30212596Sqtt2@cornell.edu                    }
30312120Sar4jc@virginia.edu                    NPC = Rc1;
30412120Sar4jc@virginia.edu                }}, IsIndirectControl, IsUncondControl, IsCall);
30512120Sar4jc@virginia.edu                default: CROp::c_mv({{
30612596Sqtt2@cornell.edu                    if (RC1 == 0) {
30712849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("source reg x0",
30812849Sar4jc@virginia.edu                                                              machInst);
30912596Sqtt2@cornell.edu                    }
31012120Sar4jc@virginia.edu                    Rc1 = Rc2;
31112120Sar4jc@virginia.edu                }});
31212120Sar4jc@virginia.edu            }
31312120Sar4jc@virginia.edu            0x1: decode RC1 {
31412120Sar4jc@virginia.edu                0x0: SystemOp::c_ebreak({{
31512596Sqtt2@cornell.edu                    if (RC2 != 0) {
31612849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("source reg x1",
31712849Sar4jc@virginia.edu                                                              machInst);
31812596Sqtt2@cornell.edu                    }
31912849Sar4jc@virginia.edu                    fault = make_shared<BreakpointFault>(xc->pcState());
32012120Sar4jc@virginia.edu                }}, IsSerializeAfter, IsNonSpeculative, No_OpClass);
32112120Sar4jc@virginia.edu                default: decode RC2 {
32212120Sar4jc@virginia.edu                    0x0: Jump::c_jalr({{
32312596Sqtt2@cornell.edu                        if (RC1 == 0) {
32412596Sqtt2@cornell.edu                            fault = make_shared<IllegalInstFault>
32512849Sar4jc@virginia.edu                                                        ("source reg x0",
32612849Sar4jc@virginia.edu                                                         machInst);
32712596Sqtt2@cornell.edu                        }
32812120Sar4jc@virginia.edu                        ra = NPC;
32912120Sar4jc@virginia.edu                        NPC = Rc1;
33012120Sar4jc@virginia.edu                    }}, IsIndirectControl, IsUncondControl, IsCall);
33112120Sar4jc@virginia.edu                    default: ROp::c_add({{
33212120Sar4jc@virginia.edu                        Rc1_sd = Rc1_sd + Rc2_sd;
33312120Sar4jc@virginia.edu                    }});
33412120Sar4jc@virginia.edu                }
33512120Sar4jc@virginia.edu            }
33612120Sar4jc@virginia.edu        }
33712120Sar4jc@virginia.edu        format CompressedStore {
33812120Sar4jc@virginia.edu            0x5: c_fsdsp({{
33912322Sar4jc@virginia.edu                offset = CIMM6<5:3> << 3 |
34012322Sar4jc@virginia.edu                         CIMM6<2:0> << 6;
34112120Sar4jc@virginia.edu            }}, {{
34212120Sar4jc@virginia.edu                Mem_ud = Fc2_bits;
34312120Sar4jc@virginia.edu            }}, {{
34412322Sar4jc@virginia.edu                EA = sp + offset;
34512120Sar4jc@virginia.edu            }});
34612120Sar4jc@virginia.edu            0x6: c_swsp({{
34712322Sar4jc@virginia.edu                offset = CIMM6<5:2> << 2 |
34812322Sar4jc@virginia.edu                         CIMM6<1:0> << 6;
34912120Sar4jc@virginia.edu            }}, {{
35012120Sar4jc@virginia.edu                Mem_uw = Rc2_uw;
35112120Sar4jc@virginia.edu            }}, {{
35212322Sar4jc@virginia.edu                EA = sp + offset;
35312120Sar4jc@virginia.edu            }});
35412120Sar4jc@virginia.edu            0x7: c_sdsp({{
35512322Sar4jc@virginia.edu                offset = CIMM6<5:3> << 3 |
35612322Sar4jc@virginia.edu                         CIMM6<2:0> << 6;
35712120Sar4jc@virginia.edu            }}, {{
35812120Sar4jc@virginia.edu                Mem = Rc2;
35912120Sar4jc@virginia.edu            }}, {{
36012322Sar4jc@virginia.edu                EA = sp + offset;
36111725Sar4jc@virginia.edu            }});
36211725Sar4jc@virginia.edu        }
36311725Sar4jc@virginia.edu    }
36412120Sar4jc@virginia.edu    0x3: decode OPCODE {
36512120Sar4jc@virginia.edu        0x00: decode FUNCT3 {
36612120Sar4jc@virginia.edu            format Load {
36712120Sar4jc@virginia.edu                0x0: lb({{
36812120Sar4jc@virginia.edu                    Rd_sd = Mem_sb;
36911723Sar4jc@virginia.edu                }});
37012120Sar4jc@virginia.edu                0x1: lh({{
37112120Sar4jc@virginia.edu                    Rd_sd = Mem_sh;
37211723Sar4jc@virginia.edu                }});
37312120Sar4jc@virginia.edu                0x2: lw({{
37412120Sar4jc@virginia.edu                    Rd_sd = Mem_sw;
37511723Sar4jc@virginia.edu                }});
37612120Sar4jc@virginia.edu                0x3: ld({{
37712120Sar4jc@virginia.edu                    Rd_sd = Mem_sd;
37812120Sar4jc@virginia.edu                }});
37912120Sar4jc@virginia.edu                0x4: lbu({{
38012120Sar4jc@virginia.edu                    Rd = Mem_ub;
38112120Sar4jc@virginia.edu                }});
38212120Sar4jc@virginia.edu                0x5: lhu({{
38312120Sar4jc@virginia.edu                    Rd = Mem_uh;
38412120Sar4jc@virginia.edu                }});
38512120Sar4jc@virginia.edu                0x6: lwu({{
38612120Sar4jc@virginia.edu                    Rd = Mem_uw;
38711723Sar4jc@virginia.edu                }});
38811723Sar4jc@virginia.edu            }
38911723Sar4jc@virginia.edu        }
39011723Sar4jc@virginia.edu
39112120Sar4jc@virginia.edu        0x01: decode FUNCT3 {
39212120Sar4jc@virginia.edu            format Load {
39312120Sar4jc@virginia.edu                0x2: flw({{
39412120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)Mem_uw;
39512445Sar4jc@virginia.edu                }}, inst_flags=FloatMemReadOp);
39612120Sar4jc@virginia.edu                0x3: fld({{
39712120Sar4jc@virginia.edu                    Fd_bits = Mem;
39812445Sar4jc@virginia.edu                }}, inst_flags=FloatMemReadOp);
39911726Sar4jc@virginia.edu            }
40011726Sar4jc@virginia.edu        }
40112120Sar4jc@virginia.edu
40212120Sar4jc@virginia.edu        0x03: decode FUNCT3 {
40312120Sar4jc@virginia.edu            format IOp {
40412120Sar4jc@virginia.edu                0x0: fence({{
40513633Sqtt2@cornell.edu                }}, uint64_t, IsMemBarrier, No_OpClass);
40612120Sar4jc@virginia.edu                0x1: fence_i({{
40712428Sar4jc@virginia.edu                }}, uint64_t, IsNonSpeculative, IsSerializeAfter, No_OpClass);
40811726Sar4jc@virginia.edu            }
40911726Sar4jc@virginia.edu        }
41012120Sar4jc@virginia.edu
41112120Sar4jc@virginia.edu        0x04: decode FUNCT3 {
41212120Sar4jc@virginia.edu            format IOp {
41312120Sar4jc@virginia.edu                0x0: addi({{
41412120Sar4jc@virginia.edu                    Rd_sd = Rs1_sd + imm;
41511723Sar4jc@virginia.edu                }});
41612120Sar4jc@virginia.edu                0x1: slli({{
41712120Sar4jc@virginia.edu                    Rd = Rs1 << SHAMT6;
41812120Sar4jc@virginia.edu                }});
41912120Sar4jc@virginia.edu                0x2: slti({{
42012120Sar4jc@virginia.edu                    Rd = (Rs1_sd < imm) ? 1 : 0;
42112120Sar4jc@virginia.edu                }});
42212120Sar4jc@virginia.edu                0x3: sltiu({{
42312428Sar4jc@virginia.edu                    Rd = (Rs1 < imm) ? 1 : 0;
42412428Sar4jc@virginia.edu                }}, uint64_t);
42512120Sar4jc@virginia.edu                0x4: xori({{
42612428Sar4jc@virginia.edu                    Rd = Rs1 ^ imm;
42712428Sar4jc@virginia.edu                }}, uint64_t);
42812120Sar4jc@virginia.edu                0x5: decode SRTYPE {
42912120Sar4jc@virginia.edu                    0x0: srli({{
43012120Sar4jc@virginia.edu                        Rd = Rs1 >> SHAMT6;
43112120Sar4jc@virginia.edu                    }});
43212120Sar4jc@virginia.edu                    0x1: srai({{
43312120Sar4jc@virginia.edu                        Rd_sd = Rs1_sd >> SHAMT6;
43412120Sar4jc@virginia.edu                    }});
43512120Sar4jc@virginia.edu                }
43612120Sar4jc@virginia.edu                0x6: ori({{
43712428Sar4jc@virginia.edu                    Rd = Rs1 | imm;
43812428Sar4jc@virginia.edu                }}, uint64_t);
43912120Sar4jc@virginia.edu                0x7: andi({{
44012428Sar4jc@virginia.edu                    Rd = Rs1 & imm;
44112428Sar4jc@virginia.edu                }}, uint64_t);
44211723Sar4jc@virginia.edu            }
44312120Sar4jc@virginia.edu        }
44412120Sar4jc@virginia.edu
44512120Sar4jc@virginia.edu        0x05: UOp::auipc({{
44612120Sar4jc@virginia.edu            Rd = PC + imm;
44712120Sar4jc@virginia.edu        }});
44812120Sar4jc@virginia.edu
44912120Sar4jc@virginia.edu        0x06: decode FUNCT3 {
45012120Sar4jc@virginia.edu            format IOp {
45112120Sar4jc@virginia.edu                0x0: addiw({{
45212428Sar4jc@virginia.edu                    Rd_sd = Rs1_sw + imm;
45312428Sar4jc@virginia.edu                }}, int32_t);
45412120Sar4jc@virginia.edu                0x1: slliw({{
45512120Sar4jc@virginia.edu                    Rd_sd = Rs1_sw << SHAMT5;
45612120Sar4jc@virginia.edu                }});
45712120Sar4jc@virginia.edu                0x5: decode SRTYPE {
45812120Sar4jc@virginia.edu                    0x0: srliw({{
45912807Saustinharris@utexas.edu                        Rd_sd = (int32_t)(Rs1_uw >> SHAMT5);
46012120Sar4jc@virginia.edu                    }});
46112120Sar4jc@virginia.edu                    0x1: sraiw({{
46212120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw >> SHAMT5;
46312120Sar4jc@virginia.edu                    }});
46412120Sar4jc@virginia.edu                }
46512120Sar4jc@virginia.edu            }
46612120Sar4jc@virginia.edu        }
46711724Sar4jc@virginia.edu
46812120Sar4jc@virginia.edu        0x08: decode FUNCT3 {
46912120Sar4jc@virginia.edu            format Store {
47012120Sar4jc@virginia.edu                0x0: sb({{
47112120Sar4jc@virginia.edu                    Mem_ub = Rs2_ub;
47212120Sar4jc@virginia.edu                }});
47312120Sar4jc@virginia.edu                0x1: sh({{
47412120Sar4jc@virginia.edu                    Mem_uh = Rs2_uh;
47512120Sar4jc@virginia.edu                }});
47612120Sar4jc@virginia.edu                0x2: sw({{
47712120Sar4jc@virginia.edu                    Mem_uw = Rs2_uw;
47812120Sar4jc@virginia.edu                }});
47912120Sar4jc@virginia.edu                0x3: sd({{
48012120Sar4jc@virginia.edu                    Mem_ud = Rs2_ud;
48112120Sar4jc@virginia.edu                }});
48212120Sar4jc@virginia.edu            }
48312120Sar4jc@virginia.edu        }
48411724Sar4jc@virginia.edu
48512120Sar4jc@virginia.edu        0x09: decode FUNCT3 {
48612120Sar4jc@virginia.edu            format Store {
48712120Sar4jc@virginia.edu                0x2: fsw({{
48812120Sar4jc@virginia.edu                    Mem_uw = (uint32_t)Fs2_bits;
48912445Sar4jc@virginia.edu                }}, inst_flags=FloatMemWriteOp);
49012120Sar4jc@virginia.edu                0x3: fsd({{
49112120Sar4jc@virginia.edu                    Mem_ud = Fs2_bits;
49212445Sar4jc@virginia.edu                }}, inst_flags=FloatMemWriteOp);
49312120Sar4jc@virginia.edu            }
49412120Sar4jc@virginia.edu        }
49511724Sar4jc@virginia.edu
49612120Sar4jc@virginia.edu        0x0b: decode FUNCT3 {
49712120Sar4jc@virginia.edu            0x2: decode AMOFUNCT {
49812120Sar4jc@virginia.edu                0x2: LoadReserved::lr_w({{
49912120Sar4jc@virginia.edu                    Rd_sd = Mem_sw;
50012120Sar4jc@virginia.edu                }}, mem_flags=LLSC);
50112120Sar4jc@virginia.edu                0x3: StoreCond::sc_w({{
50212120Sar4jc@virginia.edu                    Mem_uw = Rs2_uw;
50312120Sar4jc@virginia.edu                }}, {{
50412120Sar4jc@virginia.edu                    Rd = result;
50512120Sar4jc@virginia.edu                }}, inst_flags=IsStoreConditional, mem_flags=LLSC);
50613653Sqtt2@cornell.edu                0x0: AtomicMemOp::amoadd_w({{
50713653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
50813653Sqtt2@cornell.edu                }}, {{
50913653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<int32_t> *amo_op =
51013653Sqtt2@cornell.edu                          new AtomicGenericOp<int32_t>(Rs2_sw,
51113653Sqtt2@cornell.edu                                  [](int32_t* b, int32_t a){ *b += a; });
51213653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
51313653Sqtt2@cornell.edu                0x1: AtomicMemOp::amoswap_w({{
51413653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
51513653Sqtt2@cornell.edu                }}, {{
51613653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint32_t> *amo_op =
51713653Sqtt2@cornell.edu                          new AtomicGenericOp<uint32_t>(Rs2_uw,
51813653Sqtt2@cornell.edu                                  [](uint32_t* b, uint32_t a){ *b = a; });
51913653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
52013653Sqtt2@cornell.edu                0x4: AtomicMemOp::amoxor_w({{
52113653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
52213653Sqtt2@cornell.edu                }}, {{
52313653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint32_t> *amo_op =
52413653Sqtt2@cornell.edu                          new AtomicGenericOp<uint32_t>(Rs2_uw,
52513653Sqtt2@cornell.edu                                  [](uint32_t* b, uint32_t a){ *b ^= a; });
52613653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
52713653Sqtt2@cornell.edu                0x8: AtomicMemOp::amoor_w({{
52813653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
52913653Sqtt2@cornell.edu                }}, {{
53013653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint32_t> *amo_op =
53113653Sqtt2@cornell.edu                          new AtomicGenericOp<uint32_t>(Rs2_uw,
53213653Sqtt2@cornell.edu                                  [](uint32_t* b, uint32_t a){ *b |= a; });
53313653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
53413653Sqtt2@cornell.edu                0xc: AtomicMemOp::amoand_w({{
53513653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
53613653Sqtt2@cornell.edu                }}, {{
53713653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint32_t> *amo_op =
53813653Sqtt2@cornell.edu                          new AtomicGenericOp<uint32_t>(Rs2_uw,
53913653Sqtt2@cornell.edu                                  [](uint32_t* b, uint32_t a){ *b &= a; });
54013653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
54113653Sqtt2@cornell.edu                0x10: AtomicMemOp::amomin_w({{
54213653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
54313653Sqtt2@cornell.edu                }}, {{
54413653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<int32_t> *amo_op =
54513653Sqtt2@cornell.edu                      new AtomicGenericOp<int32_t>(Rs2_sw,
54613653Sqtt2@cornell.edu                        [](int32_t* b, int32_t a){ if (a < *b) *b = a; });
54713653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
54813653Sqtt2@cornell.edu                0x14: AtomicMemOp::amomax_w({{
54913653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
55013653Sqtt2@cornell.edu                }}, {{
55113653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<int32_t> *amo_op =
55213653Sqtt2@cornell.edu                      new AtomicGenericOp<int32_t>(Rs2_sw,
55313653Sqtt2@cornell.edu                        [](int32_t* b, int32_t a){ if (a > *b) *b = a; });
55413653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
55513653Sqtt2@cornell.edu                0x18: AtomicMemOp::amominu_w({{
55613653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
55713653Sqtt2@cornell.edu                }}, {{
55813653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint32_t> *amo_op =
55913653Sqtt2@cornell.edu                      new AtomicGenericOp<uint32_t>(Rs2_uw,
56013653Sqtt2@cornell.edu                        [](uint32_t* b, uint32_t a){ if (a < *b) *b = a; });
56113653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
56213653Sqtt2@cornell.edu                0x1c: AtomicMemOp::amomaxu_w({{
56313653Sqtt2@cornell.edu                    Rd_sd = Mem_sw;
56413653Sqtt2@cornell.edu                }}, {{
56513653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint32_t> *amo_op =
56613653Sqtt2@cornell.edu                      new AtomicGenericOp<uint32_t>(Rs2_uw,
56713653Sqtt2@cornell.edu                        [](uint32_t* b, uint32_t a){ if (a > *b) *b = a; });
56813653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
56911723Sar4jc@virginia.edu            }
57012120Sar4jc@virginia.edu            0x3: decode AMOFUNCT {
57112120Sar4jc@virginia.edu                0x2: LoadReserved::lr_d({{
57212120Sar4jc@virginia.edu                    Rd_sd = Mem_sd;
57312120Sar4jc@virginia.edu                }}, mem_flags=LLSC);
57412120Sar4jc@virginia.edu                0x3: StoreCond::sc_d({{
57512120Sar4jc@virginia.edu                    Mem = Rs2;
57612120Sar4jc@virginia.edu                }}, {{
57712120Sar4jc@virginia.edu                    Rd = result;
57812120Sar4jc@virginia.edu                }}, mem_flags=LLSC, inst_flags=IsStoreConditional);
57913653Sqtt2@cornell.edu                0x0: AtomicMemOp::amoadd_d({{
58013653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
58113653Sqtt2@cornell.edu                }}, {{
58213653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<int64_t> *amo_op =
58313653Sqtt2@cornell.edu                          new AtomicGenericOp<int64_t>(Rs2_sd,
58413653Sqtt2@cornell.edu                                  [](int64_t* b, int64_t a){ *b += a; });
58513653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
58613653Sqtt2@cornell.edu                0x1: AtomicMemOp::amoswap_d({{
58713653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
58813653Sqtt2@cornell.edu                }}, {{
58913653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint64_t> *amo_op =
59013653Sqtt2@cornell.edu                          new AtomicGenericOp<uint64_t>(Rs2_ud,
59113653Sqtt2@cornell.edu                                  [](uint64_t* b, uint64_t a){ *b = a; });
59213653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
59313653Sqtt2@cornell.edu                0x4: AtomicMemOp::amoxor_d({{
59413653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
59513653Sqtt2@cornell.edu                }}, {{
59613653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint64_t> *amo_op =
59713653Sqtt2@cornell.edu                          new AtomicGenericOp<uint64_t>(Rs2_ud,
59813653Sqtt2@cornell.edu                                 [](uint64_t* b, uint64_t a){ *b ^= a; });
59913653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
60013653Sqtt2@cornell.edu                0x8: AtomicMemOp::amoor_d({{
60113653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
60213653Sqtt2@cornell.edu                }}, {{
60313653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint64_t> *amo_op =
60413653Sqtt2@cornell.edu                          new AtomicGenericOp<uint64_t>(Rs2_ud,
60513653Sqtt2@cornell.edu                                 [](uint64_t* b, uint64_t a){ *b |= a; });
60613653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
60713653Sqtt2@cornell.edu                0xc: AtomicMemOp::amoand_d({{
60813653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
60913653Sqtt2@cornell.edu                }}, {{
61013653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint64_t> *amo_op =
61113653Sqtt2@cornell.edu                          new AtomicGenericOp<uint64_t>(Rs2_ud,
61213653Sqtt2@cornell.edu                                 [](uint64_t* b, uint64_t a){ *b &= a; });
61313653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
61413653Sqtt2@cornell.edu                0x10: AtomicMemOp::amomin_d({{
61513653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
61613653Sqtt2@cornell.edu                }}, {{
61713653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<int64_t> *amo_op =
61813653Sqtt2@cornell.edu                      new AtomicGenericOp<int64_t>(Rs2_sd,
61913653Sqtt2@cornell.edu                        [](int64_t* b, int64_t a){ if (a < *b) *b = a; });
62013653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
62113653Sqtt2@cornell.edu                0x14: AtomicMemOp::amomax_d({{
62213653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
62313653Sqtt2@cornell.edu                }}, {{
62413653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<int64_t> *amo_op =
62513653Sqtt2@cornell.edu                      new AtomicGenericOp<int64_t>(Rs2_sd,
62613653Sqtt2@cornell.edu                        [](int64_t* b, int64_t a){ if (a > *b) *b = a; });
62713653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
62813653Sqtt2@cornell.edu                0x18: AtomicMemOp::amominu_d({{
62913653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
63013653Sqtt2@cornell.edu                }}, {{
63113653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint64_t> *amo_op =
63213653Sqtt2@cornell.edu                      new AtomicGenericOp<uint64_t>(Rs2_ud,
63313653Sqtt2@cornell.edu                        [](uint64_t* b, uint64_t a){ if (a < *b) *b = a; });
63413653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
63513653Sqtt2@cornell.edu                0x1c: AtomicMemOp::amomaxu_d({{
63613653Sqtt2@cornell.edu                    Rd_sd = Mem_sd;
63713653Sqtt2@cornell.edu                }}, {{
63813653Sqtt2@cornell.edu                    TypedAtomicOpFunctor<uint64_t> *amo_op =
63913653Sqtt2@cornell.edu                      new AtomicGenericOp<uint64_t>(Rs2_ud,
64013653Sqtt2@cornell.edu                        [](uint64_t* b, uint64_t a){ if (a > *b) *b = a; });
64113653Sqtt2@cornell.edu                }}, mem_flags=ATOMIC_RETURN_OP);
64212120Sar4jc@virginia.edu            }
64312120Sar4jc@virginia.edu        }
64412120Sar4jc@virginia.edu        0x0c: decode FUNCT3 {
64512120Sar4jc@virginia.edu            format ROp {
64612120Sar4jc@virginia.edu                0x0: decode FUNCT7 {
64712120Sar4jc@virginia.edu                    0x0: add({{
64812120Sar4jc@virginia.edu                        Rd = Rs1_sd + Rs2_sd;
64912120Sar4jc@virginia.edu                    }});
65012120Sar4jc@virginia.edu                    0x1: mul({{
65112120Sar4jc@virginia.edu                        Rd = Rs1_sd*Rs2_sd;
65212120Sar4jc@virginia.edu                    }}, IntMultOp);
65312120Sar4jc@virginia.edu                    0x20: sub({{
65412120Sar4jc@virginia.edu                        Rd = Rs1_sd - Rs2_sd;
65512120Sar4jc@virginia.edu                    }});
65612120Sar4jc@virginia.edu                }
65712120Sar4jc@virginia.edu                0x1: decode FUNCT7 {
65812120Sar4jc@virginia.edu                    0x0: sll({{
65912120Sar4jc@virginia.edu                        Rd = Rs1 << Rs2<5:0>;
66012120Sar4jc@virginia.edu                    }});
66112120Sar4jc@virginia.edu                    0x1: mulh({{
66212120Sar4jc@virginia.edu                        bool negate = (Rs1_sd < 0) != (Rs2_sd < 0);
66312120Sar4jc@virginia.edu
66412120Sar4jc@virginia.edu                        uint64_t Rs1_lo = (uint32_t)abs(Rs1_sd);
66512120Sar4jc@virginia.edu                        uint64_t Rs1_hi = (uint64_t)abs(Rs1_sd) >> 32;
66612120Sar4jc@virginia.edu                        uint64_t Rs2_lo = (uint32_t)abs(Rs2_sd);
66712120Sar4jc@virginia.edu                        uint64_t Rs2_hi = (uint64_t)abs(Rs2_sd) >> 32;
66812120Sar4jc@virginia.edu
66912120Sar4jc@virginia.edu                        uint64_t hi = Rs1_hi*Rs2_hi;
67012120Sar4jc@virginia.edu                        uint64_t mid1 = Rs1_hi*Rs2_lo;
67112120Sar4jc@virginia.edu                        uint64_t mid2 = Rs1_lo*Rs2_hi;
67212120Sar4jc@virginia.edu                        uint64_t lo = Rs2_lo*Rs1_lo;
67312120Sar4jc@virginia.edu                        uint64_t carry = ((uint64_t)(uint32_t)mid1
67412120Sar4jc@virginia.edu                                + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32;
67512120Sar4jc@virginia.edu
67612120Sar4jc@virginia.edu                        uint64_t res = hi +
67712120Sar4jc@virginia.edu                                       (mid1 >> 32) +
67812120Sar4jc@virginia.edu                                       (mid2 >> 32) +
67912120Sar4jc@virginia.edu                                       carry;
68012120Sar4jc@virginia.edu                        Rd = negate ? ~res + (Rs1_sd*Rs2_sd == 0 ? 1 : 0)
68112120Sar4jc@virginia.edu                                    : res;
68212120Sar4jc@virginia.edu                    }}, IntMultOp);
68312120Sar4jc@virginia.edu                }
68412120Sar4jc@virginia.edu                0x2: decode FUNCT7 {
68512120Sar4jc@virginia.edu                    0x0: slt({{
68612120Sar4jc@virginia.edu                        Rd = (Rs1_sd < Rs2_sd) ? 1 : 0;
68712120Sar4jc@virginia.edu                    }});
68812120Sar4jc@virginia.edu                    0x1: mulhsu({{
68912120Sar4jc@virginia.edu                        bool negate = Rs1_sd < 0;
69012120Sar4jc@virginia.edu                        uint64_t Rs1_lo = (uint32_t)abs(Rs1_sd);
69112120Sar4jc@virginia.edu                        uint64_t Rs1_hi = (uint64_t)abs(Rs1_sd) >> 32;
69212120Sar4jc@virginia.edu                        uint64_t Rs2_lo = (uint32_t)Rs2;
69312120Sar4jc@virginia.edu                        uint64_t Rs2_hi = Rs2 >> 32;
69412120Sar4jc@virginia.edu
69512120Sar4jc@virginia.edu                        uint64_t hi = Rs1_hi*Rs2_hi;
69612120Sar4jc@virginia.edu                        uint64_t mid1 = Rs1_hi*Rs2_lo;
69712120Sar4jc@virginia.edu                        uint64_t mid2 = Rs1_lo*Rs2_hi;
69812120Sar4jc@virginia.edu                        uint64_t lo = Rs1_lo*Rs2_lo;
69912120Sar4jc@virginia.edu                        uint64_t carry = ((uint64_t)(uint32_t)mid1
70012120Sar4jc@virginia.edu                                + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32;
70112120Sar4jc@virginia.edu
70212120Sar4jc@virginia.edu                        uint64_t res = hi +
70312120Sar4jc@virginia.edu                                       (mid1 >> 32) +
70412120Sar4jc@virginia.edu                                       (mid2 >> 32) +
70512120Sar4jc@virginia.edu                                       carry;
70612120Sar4jc@virginia.edu                        Rd = negate ? ~res + (Rs1_sd*Rs2 == 0 ? 1 : 0) : res;
70712120Sar4jc@virginia.edu                    }}, IntMultOp);
70812120Sar4jc@virginia.edu                }
70912120Sar4jc@virginia.edu                0x3: decode FUNCT7 {
71012120Sar4jc@virginia.edu                    0x0: sltu({{
71112120Sar4jc@virginia.edu                        Rd = (Rs1 < Rs2) ? 1 : 0;
71212120Sar4jc@virginia.edu                    }});
71312120Sar4jc@virginia.edu                    0x1: mulhu({{
71412120Sar4jc@virginia.edu                        uint64_t Rs1_lo = (uint32_t)Rs1;
71512120Sar4jc@virginia.edu                        uint64_t Rs1_hi = Rs1 >> 32;
71612120Sar4jc@virginia.edu                        uint64_t Rs2_lo = (uint32_t)Rs2;
71712120Sar4jc@virginia.edu                        uint64_t Rs2_hi = Rs2 >> 32;
71812120Sar4jc@virginia.edu
71912120Sar4jc@virginia.edu                        uint64_t hi = Rs1_hi*Rs2_hi;
72012120Sar4jc@virginia.edu                        uint64_t mid1 = Rs1_hi*Rs2_lo;
72112120Sar4jc@virginia.edu                        uint64_t mid2 = Rs1_lo*Rs2_hi;
72212120Sar4jc@virginia.edu                        uint64_t lo = Rs1_lo*Rs2_lo;
72312120Sar4jc@virginia.edu                        uint64_t carry = ((uint64_t)(uint32_t)mid1
72412120Sar4jc@virginia.edu                                + (uint64_t)(uint32_t)mid2 + (lo >> 32)) >> 32;
72512120Sar4jc@virginia.edu
72612120Sar4jc@virginia.edu                        Rd = hi + (mid1 >> 32) + (mid2 >> 32) + carry;
72712120Sar4jc@virginia.edu                    }}, IntMultOp);
72812120Sar4jc@virginia.edu                }
72912120Sar4jc@virginia.edu                0x4: decode FUNCT7 {
73012120Sar4jc@virginia.edu                    0x0: xor({{
73112120Sar4jc@virginia.edu                        Rd = Rs1 ^ Rs2;
73212120Sar4jc@virginia.edu                    }});
73312120Sar4jc@virginia.edu                    0x1: div({{
73412120Sar4jc@virginia.edu                        if (Rs2_sd == 0) {
73512120Sar4jc@virginia.edu                            Rd_sd = -1;
73612120Sar4jc@virginia.edu                        } else if (Rs1_sd == numeric_limits<int64_t>::min()
73712120Sar4jc@virginia.edu                                && Rs2_sd == -1) {
73812120Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::min();
73912120Sar4jc@virginia.edu                        } else {
74012120Sar4jc@virginia.edu                            Rd_sd = Rs1_sd/Rs2_sd;
74112120Sar4jc@virginia.edu                        }
74212120Sar4jc@virginia.edu                    }}, IntDivOp);
74312120Sar4jc@virginia.edu                }
74412120Sar4jc@virginia.edu                0x5: decode FUNCT7 {
74512120Sar4jc@virginia.edu                    0x0: srl({{
74612120Sar4jc@virginia.edu                        Rd = Rs1 >> Rs2<5:0>;
74712120Sar4jc@virginia.edu                    }});
74812120Sar4jc@virginia.edu                    0x1: divu({{
74912120Sar4jc@virginia.edu                        if (Rs2 == 0) {
75012120Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
75112120Sar4jc@virginia.edu                        } else {
75212120Sar4jc@virginia.edu                            Rd = Rs1/Rs2;
75312120Sar4jc@virginia.edu                        }
75412120Sar4jc@virginia.edu                    }}, IntDivOp);
75512120Sar4jc@virginia.edu                    0x20: sra({{
75612120Sar4jc@virginia.edu                        Rd_sd = Rs1_sd >> Rs2<5:0>;
75712120Sar4jc@virginia.edu                    }});
75812120Sar4jc@virginia.edu                }
75912120Sar4jc@virginia.edu                0x6: decode FUNCT7 {
76012120Sar4jc@virginia.edu                    0x0: or({{
76112120Sar4jc@virginia.edu                        Rd = Rs1 | Rs2;
76212120Sar4jc@virginia.edu                    }});
76312120Sar4jc@virginia.edu                    0x1: rem({{
76412120Sar4jc@virginia.edu                        if (Rs2_sd == 0) {
76512120Sar4jc@virginia.edu                            Rd = Rs1_sd;
76612120Sar4jc@virginia.edu                        } else if (Rs1_sd == numeric_limits<int64_t>::min()
76712120Sar4jc@virginia.edu                                && Rs2_sd == -1) {
76812120Sar4jc@virginia.edu                            Rd = 0;
76912120Sar4jc@virginia.edu                        } else {
77012120Sar4jc@virginia.edu                            Rd = Rs1_sd%Rs2_sd;
77112120Sar4jc@virginia.edu                        }
77212120Sar4jc@virginia.edu                    }}, IntDivOp);
77312120Sar4jc@virginia.edu                }
77412120Sar4jc@virginia.edu                0x7: decode FUNCT7 {
77512120Sar4jc@virginia.edu                    0x0: and({{
77612120Sar4jc@virginia.edu                        Rd = Rs1 & Rs2;
77712120Sar4jc@virginia.edu                    }});
77812120Sar4jc@virginia.edu                    0x1: remu({{
77912120Sar4jc@virginia.edu                        if (Rs2 == 0) {
78012120Sar4jc@virginia.edu                            Rd = Rs1;
78112120Sar4jc@virginia.edu                        } else {
78212120Sar4jc@virginia.edu                            Rd = Rs1%Rs2;
78312120Sar4jc@virginia.edu                        }
78412120Sar4jc@virginia.edu                    }}, IntDivOp);
78512120Sar4jc@virginia.edu                }
78612120Sar4jc@virginia.edu            }
78712120Sar4jc@virginia.edu        }
78812120Sar4jc@virginia.edu
78912120Sar4jc@virginia.edu        0x0d: UOp::lui({{
79012120Sar4jc@virginia.edu            Rd = (uint64_t)imm;
79112120Sar4jc@virginia.edu        }});
79212120Sar4jc@virginia.edu
79312120Sar4jc@virginia.edu        0x0e: decode FUNCT3 {
79412120Sar4jc@virginia.edu            format ROp {
79512120Sar4jc@virginia.edu                0x0: decode FUNCT7 {
79612120Sar4jc@virginia.edu                    0x0: addw({{
79712120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw + Rs2_sw;
79812120Sar4jc@virginia.edu                    }});
79912120Sar4jc@virginia.edu                    0x1: mulw({{
80012120Sar4jc@virginia.edu                        Rd_sd = (int32_t)(Rs1_sw*Rs2_sw);
80112120Sar4jc@virginia.edu                    }}, IntMultOp);
80212120Sar4jc@virginia.edu                    0x20: subw({{
80312120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw - Rs2_sw;
80412120Sar4jc@virginia.edu                    }});
80512120Sar4jc@virginia.edu                }
80612120Sar4jc@virginia.edu                0x1: sllw({{
80712120Sar4jc@virginia.edu                    Rd_sd = Rs1_sw << Rs2<4:0>;
80811723Sar4jc@virginia.edu                }});
80912120Sar4jc@virginia.edu                0x4: divw({{
81012120Sar4jc@virginia.edu                    if (Rs2_sw == 0) {
81111724Sar4jc@virginia.edu                        Rd_sd = -1;
81212120Sar4jc@virginia.edu                    } else if (Rs1_sw == numeric_limits<int32_t>::min()
81312120Sar4jc@virginia.edu                            && Rs2_sw == -1) {
81412120Sar4jc@virginia.edu                        Rd_sd = numeric_limits<int32_t>::min();
81511724Sar4jc@virginia.edu                    } else {
81612120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw/Rs2_sw;
81711724Sar4jc@virginia.edu                    }
81811724Sar4jc@virginia.edu                }}, IntDivOp);
81912120Sar4jc@virginia.edu                0x5: decode FUNCT7 {
82012120Sar4jc@virginia.edu                    0x0: srlw({{
82112807Saustinharris@utexas.edu                        Rd_sd = (int32_t)(Rs1_uw >> Rs2<4:0>);
82212120Sar4jc@virginia.edu                    }});
82312120Sar4jc@virginia.edu                    0x1: divuw({{
82412120Sar4jc@virginia.edu                        if (Rs2_uw == 0) {
82513612Sgabeblack@google.com                            Rd_sd = numeric_limits<uint64_t>::max();
82612120Sar4jc@virginia.edu                        } else {
82712120Sar4jc@virginia.edu                            Rd_sd = (int32_t)(Rs1_uw/Rs2_uw);
82812120Sar4jc@virginia.edu                        }
82912120Sar4jc@virginia.edu                    }}, IntDivOp);
83012120Sar4jc@virginia.edu                    0x20: sraw({{
83112120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw >> Rs2<4:0>;
83212120Sar4jc@virginia.edu                    }});
83312120Sar4jc@virginia.edu                }
83412120Sar4jc@virginia.edu                0x6: remw({{
83512120Sar4jc@virginia.edu                    if (Rs2_sw == 0) {
83612120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw;
83712120Sar4jc@virginia.edu                    } else if (Rs1_sw == numeric_limits<int32_t>::min()
83812120Sar4jc@virginia.edu                            && Rs2_sw == -1) {
83912120Sar4jc@virginia.edu                        Rd_sd = 0;
84011724Sar4jc@virginia.edu                    } else {
84112120Sar4jc@virginia.edu                        Rd_sd = Rs1_sw%Rs2_sw;
84211724Sar4jc@virginia.edu                    }
84311724Sar4jc@virginia.edu                }}, IntDivOp);
84412120Sar4jc@virginia.edu                0x7: remuw({{
84512120Sar4jc@virginia.edu                    if (Rs2_uw == 0) {
84612120Sar4jc@virginia.edu                        Rd_sd = (int32_t)Rs1_uw;
84711724Sar4jc@virginia.edu                    } else {
84812120Sar4jc@virginia.edu                        Rd_sd = (int32_t)(Rs1_uw%Rs2_uw);
84911724Sar4jc@virginia.edu                    }
85011724Sar4jc@virginia.edu                }}, IntDivOp);
85111723Sar4jc@virginia.edu            }
85211723Sar4jc@virginia.edu        }
85311723Sar4jc@virginia.edu
85412120Sar4jc@virginia.edu        format FPROp {
85512120Sar4jc@virginia.edu            0x10: decode FUNCT2 {
85612120Sar4jc@virginia.edu                0x0: fmadd_s({{
85712120Sar4jc@virginia.edu                    uint32_t temp;
85812120Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
85912120Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
86012120Sar4jc@virginia.edu                    float fs3 = reinterpret_cast<float&>(temp = Fs3_bits);
86112120Sar4jc@virginia.edu                    float fd;
86211723Sar4jc@virginia.edu
86312138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2) ||
86412138Sgabeblack@google.com                            std::isnan(fs3)) {
86512120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)
86612120Sar4jc@virginia.edu                                || issignalingnan(fs3)) {
86712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
86812120Sar4jc@virginia.edu                        }
86912120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
87012138Sgabeblack@google.com                    } else if (std::isinf(fs1) || std::isinf(fs2) ||
87112138Sgabeblack@google.com                            std::isinf(fs3)) {
87212120Sar4jc@virginia.edu                        if (signbit(fs1) == signbit(fs2)
87312138Sgabeblack@google.com                                && !std::isinf(fs3)) {
87412120Sar4jc@virginia.edu                            fd = numeric_limits<float>::infinity();
87512120Sar4jc@virginia.edu                        } else if (signbit(fs1) != signbit(fs2)
87612138Sgabeblack@google.com                                && !std::isinf(fs3)) {
87712120Sar4jc@virginia.edu                            fd = -numeric_limits<float>::infinity();
87812120Sar4jc@virginia.edu                        } else { // Fs3_sf is infinity
87912120Sar4jc@virginia.edu                            fd = fs3;
88012120Sar4jc@virginia.edu                        }
88112120Sar4jc@virginia.edu                    } else {
88212120Sar4jc@virginia.edu                        fd = fs1*fs2 + fs3;
88312120Sar4jc@virginia.edu                    }
88412120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
88512445Sar4jc@virginia.edu                }}, FloatMultAccOp);
88612120Sar4jc@virginia.edu                0x1: fmadd_d({{
88712138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2) ||
88812138Sgabeblack@google.com                            std::isnan(Fs3)) {
88912120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)
89012120Sar4jc@virginia.edu                                || issignalingnan(Fs3)) {
89112120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
89212120Sar4jc@virginia.edu                        }
89312120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
89412138Sgabeblack@google.com                    } else if (std::isinf(Fs1) || std::isinf(Fs2) ||
89512138Sgabeblack@google.com                            std::isinf(Fs3)) {
89612120Sar4jc@virginia.edu                        if (signbit(Fs1) == signbit(Fs2)
89712138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
89812120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::infinity();
89912120Sar4jc@virginia.edu                        } else if (signbit(Fs1) != signbit(Fs2)
90012138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
90112120Sar4jc@virginia.edu                            Fd = -numeric_limits<double>::infinity();
90212120Sar4jc@virginia.edu                        } else {
90312120Sar4jc@virginia.edu                            Fd = Fs3;
90412120Sar4jc@virginia.edu                        }
90512120Sar4jc@virginia.edu                    } else {
90612120Sar4jc@virginia.edu                        Fd = Fs1*Fs2 + Fs3;
90712120Sar4jc@virginia.edu                    }
90812445Sar4jc@virginia.edu                }}, FloatMultAccOp);
90911723Sar4jc@virginia.edu            }
91012120Sar4jc@virginia.edu            0x11: decode FUNCT2 {
91112120Sar4jc@virginia.edu                0x0: fmsub_s({{
91212120Sar4jc@virginia.edu                    uint32_t temp;
91312120Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
91412120Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
91512120Sar4jc@virginia.edu                    float fs3 = reinterpret_cast<float&>(temp = Fs3_bits);
91612120Sar4jc@virginia.edu                    float fd;
91712120Sar4jc@virginia.edu
91812138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2) ||
91912138Sgabeblack@google.com                            std::isnan(fs3)) {
92012120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)
92112120Sar4jc@virginia.edu                                || issignalingnan(fs3)) {
92212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
92312120Sar4jc@virginia.edu                        }
92412120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
92512138Sgabeblack@google.com                    } else if (std::isinf(fs1) || std::isinf(fs2) ||
92612138Sgabeblack@google.com                            std::isinf(fs3)) {
92712120Sar4jc@virginia.edu                        if (signbit(fs1) == signbit(fs2)
92812138Sgabeblack@google.com                                && !std::isinf(fs3)) {
92912120Sar4jc@virginia.edu                            fd = numeric_limits<float>::infinity();
93012120Sar4jc@virginia.edu                        } else if (signbit(fs1) != signbit(fs2)
93112138Sgabeblack@google.com                                && !std::isinf(fs3)) {
93212120Sar4jc@virginia.edu                            fd = -numeric_limits<float>::infinity();
93312120Sar4jc@virginia.edu                        } else { // Fs3_sf is infinity
93412120Sar4jc@virginia.edu                            fd = -fs3;
93512120Sar4jc@virginia.edu                        }
93611724Sar4jc@virginia.edu                    } else {
93712120Sar4jc@virginia.edu                        fd = fs1*fs2 - fs3;
93811724Sar4jc@virginia.edu                    }
93912120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
94012445Sar4jc@virginia.edu                }}, FloatMultAccOp);
94112120Sar4jc@virginia.edu                0x1: fmsub_d({{
94212138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2) ||
94312138Sgabeblack@google.com                            std::isnan(Fs3)) {
94412120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)
94512120Sar4jc@virginia.edu                                || issignalingnan(Fs3)) {
94612120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
94712120Sar4jc@virginia.edu                        }
94812120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
94912138Sgabeblack@google.com                    } else if (std::isinf(Fs1) || std::isinf(Fs2) ||
95012138Sgabeblack@google.com                            std::isinf(Fs3)) {
95112120Sar4jc@virginia.edu                        if (signbit(Fs1) == signbit(Fs2)
95212138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
95312120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::infinity();
95412120Sar4jc@virginia.edu                        } else if (signbit(Fs1) != signbit(Fs2)
95512138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
95612120Sar4jc@virginia.edu                            Fd = -numeric_limits<double>::infinity();
95712120Sar4jc@virginia.edu                        } else {
95812120Sar4jc@virginia.edu                            Fd = -Fs3;
95912120Sar4jc@virginia.edu                        }
96012120Sar4jc@virginia.edu                    } else {
96112120Sar4jc@virginia.edu                        Fd = Fs1*Fs2 - Fs3;
96212120Sar4jc@virginia.edu                    }
96312445Sar4jc@virginia.edu                }}, FloatMultAccOp);
96411723Sar4jc@virginia.edu            }
96512120Sar4jc@virginia.edu            0x12: decode FUNCT2 {
96612120Sar4jc@virginia.edu                0x0: fnmsub_s({{
96712120Sar4jc@virginia.edu                    uint32_t temp;
96812120Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
96912120Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
97012120Sar4jc@virginia.edu                    float fs3 = reinterpret_cast<float&>(temp = Fs3_bits);
97112120Sar4jc@virginia.edu                    float fd;
97211723Sar4jc@virginia.edu
97312138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2) ||
97412138Sgabeblack@google.com                            std::isnan(fs3)) {
97512120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)
97612120Sar4jc@virginia.edu                                || issignalingnan(fs3)) {
97712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
97812120Sar4jc@virginia.edu                        }
97912120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
98012138Sgabeblack@google.com                    } else if (std::isinf(fs1) || std::isinf(fs2) ||
98112138Sgabeblack@google.com                            std::isinf(fs3)) {
98212120Sar4jc@virginia.edu                        if (signbit(fs1) == signbit(fs2)
98312138Sgabeblack@google.com                                && !std::isinf(fs3)) {
98412120Sar4jc@virginia.edu                            fd = -numeric_limits<float>::infinity();
98512120Sar4jc@virginia.edu                        } else if (signbit(fs1) != signbit(fs2)
98612138Sgabeblack@google.com                                && !std::isinf(fs3)) {
98712120Sar4jc@virginia.edu                            fd = numeric_limits<float>::infinity();
98812120Sar4jc@virginia.edu                        } else { // Fs3_sf is infinity
98912120Sar4jc@virginia.edu                            fd = fs3;
99012120Sar4jc@virginia.edu                        }
99112120Sar4jc@virginia.edu                    } else {
99212120Sar4jc@virginia.edu                        fd = -(fs1*fs2 - fs3);
99312120Sar4jc@virginia.edu                    }
99412120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
99512445Sar4jc@virginia.edu                }}, FloatMultAccOp);
99612120Sar4jc@virginia.edu                0x1: fnmsub_d({{
99712138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2) ||
99812138Sgabeblack@google.com                            std::isnan(Fs3)) {
99912120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)
100012120Sar4jc@virginia.edu                                || issignalingnan(Fs3)) {
100112120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
100212120Sar4jc@virginia.edu                        }
100312120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
100412138Sgabeblack@google.com                    } else if (std::isinf(Fs1) || std::isinf(Fs2)
100512138Sgabeblack@google.com                            || std::isinf(Fs3)) {
100612120Sar4jc@virginia.edu                        if (signbit(Fs1) == signbit(Fs2)
100712138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
100812120Sar4jc@virginia.edu                            Fd = -numeric_limits<double>::infinity();
100912120Sar4jc@virginia.edu                        } else if (signbit(Fs1) != signbit(Fs2)
101012138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
101112120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::infinity();
101212120Sar4jc@virginia.edu                        } else {
101312120Sar4jc@virginia.edu                            Fd = Fs3;
101412120Sar4jc@virginia.edu                        }
101512120Sar4jc@virginia.edu                    } else {
101612120Sar4jc@virginia.edu                        Fd = -(Fs1*Fs2 - Fs3);
101712120Sar4jc@virginia.edu                    }
101812445Sar4jc@virginia.edu                }}, FloatMultAccOp);
101912120Sar4jc@virginia.edu            }
102012120Sar4jc@virginia.edu            0x13: decode FUNCT2 {
102112120Sar4jc@virginia.edu                0x0: fnmadd_s({{
102212120Sar4jc@virginia.edu                    uint32_t temp;
102312120Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
102412120Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
102512120Sar4jc@virginia.edu                    float fs3 = reinterpret_cast<float&>(temp = Fs3_bits);
102612120Sar4jc@virginia.edu                    float fd;
102711725Sar4jc@virginia.edu
102812138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2) ||
102912138Sgabeblack@google.com                            std::isnan(fs3)) {
103012120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)
103112120Sar4jc@virginia.edu                                || issignalingnan(fs3)) {
103212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
103312120Sar4jc@virginia.edu                        }
103412120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
103512138Sgabeblack@google.com                    } else if (std::isinf(fs1) || std::isinf(fs2) ||
103612138Sgabeblack@google.com                            std::isinf(fs3)) {
103712120Sar4jc@virginia.edu                        if (signbit(fs1) == signbit(fs2)
103812138Sgabeblack@google.com                                && !std::isinf(fs3)) {
103912120Sar4jc@virginia.edu                            fd = -numeric_limits<float>::infinity();
104012120Sar4jc@virginia.edu                        } else if (signbit(fs1) != signbit(fs2)
104112138Sgabeblack@google.com                                && !std::isinf(fs3)) {
104212120Sar4jc@virginia.edu                            fd = numeric_limits<float>::infinity();
104312120Sar4jc@virginia.edu                        } else { // Fs3_sf is infinity
104412120Sar4jc@virginia.edu                            fd = -fs3;
104512120Sar4jc@virginia.edu                        }
104612120Sar4jc@virginia.edu                    } else {
104712120Sar4jc@virginia.edu                        fd = -(fs1*fs2 + fs3);
104811725Sar4jc@virginia.edu                    }
104912120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
105012445Sar4jc@virginia.edu                }}, FloatMultAccOp);
105112120Sar4jc@virginia.edu                0x1: fnmadd_d({{
105212138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2) ||
105312138Sgabeblack@google.com                            std::isnan(Fs3)) {
105412120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)
105512120Sar4jc@virginia.edu                                || issignalingnan(Fs3)) {
105612120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
105712120Sar4jc@virginia.edu                        }
105812120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
105912138Sgabeblack@google.com                    } else if (std::isinf(Fs1) || std::isinf(Fs2) ||
106012138Sgabeblack@google.com                            std::isinf(Fs3)) {
106112120Sar4jc@virginia.edu                        if (signbit(Fs1) == signbit(Fs2)
106212138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
106312120Sar4jc@virginia.edu                            Fd = -numeric_limits<double>::infinity();
106412120Sar4jc@virginia.edu                        } else if (signbit(Fs1) != signbit(Fs2)
106512138Sgabeblack@google.com                                && !std::isinf(Fs3)) {
106612120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::infinity();
106712120Sar4jc@virginia.edu                        } else {
106812120Sar4jc@virginia.edu                            Fd = -Fs3;
106912120Sar4jc@virginia.edu                        }
107012120Sar4jc@virginia.edu                    } else {
107112120Sar4jc@virginia.edu                        Fd = -(Fs1*Fs2 + Fs3);
107211725Sar4jc@virginia.edu                    }
107312445Sar4jc@virginia.edu                }}, FloatMultAccOp);
107412120Sar4jc@virginia.edu            }
107512120Sar4jc@virginia.edu            0x14: decode FUNCT7 {
107612120Sar4jc@virginia.edu                0x0: fadd_s({{
107711725Sar4jc@virginia.edu                    uint32_t temp;
107811725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
107911725Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
108011725Sar4jc@virginia.edu                    float fd;
108111725Sar4jc@virginia.edu
108212138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2)) {
108312120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
108412120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
108512120Sar4jc@virginia.edu                        }
108612120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
108711725Sar4jc@virginia.edu                    } else {
108812120Sar4jc@virginia.edu                        fd = fs1 + fs2;
108911725Sar4jc@virginia.edu                    }
109011725Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
109112120Sar4jc@virginia.edu                }}, FloatAddOp);
109212120Sar4jc@virginia.edu                0x1: fadd_d({{
109312138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2)) {
109412120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
109512120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
109612120Sar4jc@virginia.edu                        }
109712120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
109812120Sar4jc@virginia.edu                    } else {
109912120Sar4jc@virginia.edu                        Fd = Fs1 + Fs2;
110012120Sar4jc@virginia.edu                    }
110112120Sar4jc@virginia.edu                }}, FloatAddOp);
110212120Sar4jc@virginia.edu                0x4: fsub_s({{
110311725Sar4jc@virginia.edu                    uint32_t temp;
110411725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
110511725Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
110611725Sar4jc@virginia.edu                    float fd;
110711725Sar4jc@virginia.edu
110812138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2)) {
110912120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
111012120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
111112120Sar4jc@virginia.edu                        }
111212120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
111311725Sar4jc@virginia.edu                    } else {
111412120Sar4jc@virginia.edu                        fd = fs1 - fs2;
111511725Sar4jc@virginia.edu                    }
111611725Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
111712120Sar4jc@virginia.edu                }}, FloatAddOp);
111812120Sar4jc@virginia.edu                0x5: fsub_d({{
111912138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2)) {
112012120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
112112120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
112212120Sar4jc@virginia.edu                        }
112312120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
112412120Sar4jc@virginia.edu                    } else {
112512120Sar4jc@virginia.edu                        Fd = Fs1 - Fs2;
112612120Sar4jc@virginia.edu                    }
112712120Sar4jc@virginia.edu                }}, FloatAddOp);
112812120Sar4jc@virginia.edu                0x8: fmul_s({{
112911725Sar4jc@virginia.edu                    uint32_t temp;
113011725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
113111725Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
113211725Sar4jc@virginia.edu                    float fd;
113311725Sar4jc@virginia.edu
113412138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2)) {
113512120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
113612120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
113712120Sar4jc@virginia.edu                        }
113812120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
113911725Sar4jc@virginia.edu                    } else {
114012120Sar4jc@virginia.edu                        fd = fs1*fs2;
114111725Sar4jc@virginia.edu                    }
114211725Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
114312120Sar4jc@virginia.edu                }}, FloatMultOp);
114412120Sar4jc@virginia.edu                0x9: fmul_d({{
114512138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2)) {
114612120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
114712120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
114812120Sar4jc@virginia.edu                        }
114912120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
115011725Sar4jc@virginia.edu                    } else {
115112120Sar4jc@virginia.edu                        Fd = Fs1*Fs2;
115211725Sar4jc@virginia.edu                    }
115312120Sar4jc@virginia.edu                }}, FloatMultOp);
115412120Sar4jc@virginia.edu                0xc: fdiv_s({{
115511725Sar4jc@virginia.edu                    uint32_t temp;
115611725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
115711725Sar4jc@virginia.edu                    float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
115811725Sar4jc@virginia.edu                    float fd;
115911725Sar4jc@virginia.edu
116012138Sgabeblack@google.com                    if (std::isnan(fs1) || std::isnan(fs2)) {
116112120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
116212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
116312120Sar4jc@virginia.edu                        }
116412120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
116512120Sar4jc@virginia.edu                    } else {
116612120Sar4jc@virginia.edu                        fd = fs1/fs2;
116712120Sar4jc@virginia.edu                    }
116812120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
116912120Sar4jc@virginia.edu                }}, FloatDivOp);
117012120Sar4jc@virginia.edu                0xd: fdiv_d({{
117112138Sgabeblack@google.com                    if (std::isnan(Fs1) || std::isnan(Fs2)) {
117212120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
117312120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
117412120Sar4jc@virginia.edu                        }
117512120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
117612120Sar4jc@virginia.edu                    } else {
117712120Sar4jc@virginia.edu                        Fd = Fs1/Fs2;
117812120Sar4jc@virginia.edu                    }
117912120Sar4jc@virginia.edu                }}, FloatDivOp);
118012120Sar4jc@virginia.edu                0x10: decode ROUND_MODE {
118112120Sar4jc@virginia.edu                    0x0: fsgnj_s({{
118212120Sar4jc@virginia.edu                        uint32_t temp;
118312120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
118412120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
118512120Sar4jc@virginia.edu                        float fd;
118612120Sar4jc@virginia.edu
118712120Sar4jc@virginia.edu                        if (issignalingnan(fs1)) {
118812120Sar4jc@virginia.edu                            fd = numeric_limits<float>::signaling_NaN();
118912120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
119012120Sar4jc@virginia.edu                        } else {
119112120Sar4jc@virginia.edu                            fd = copysign(fs1, fs2);
119212120Sar4jc@virginia.edu                        }
119312120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
119412445Sar4jc@virginia.edu                    }}, FloatMiscOp);
119512120Sar4jc@virginia.edu                    0x1: fsgnjn_s({{
119612120Sar4jc@virginia.edu                        uint32_t temp;
119712120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
119812120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
119912120Sar4jc@virginia.edu                        float fd;
120012120Sar4jc@virginia.edu
120112120Sar4jc@virginia.edu                        if (issignalingnan(fs1)) {
120212120Sar4jc@virginia.edu                            fd = numeric_limits<float>::signaling_NaN();
120312120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
120412120Sar4jc@virginia.edu                        } else {
120512120Sar4jc@virginia.edu                            fd = copysign(fs1, -fs2);
120612120Sar4jc@virginia.edu                        }
120712120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
120812445Sar4jc@virginia.edu                    }}, FloatMiscOp);
120912120Sar4jc@virginia.edu                    0x2: fsgnjx_s({{
121012120Sar4jc@virginia.edu                        uint32_t temp;
121112120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
121212120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
121312120Sar4jc@virginia.edu                        float fd;
121412120Sar4jc@virginia.edu
121512120Sar4jc@virginia.edu                        if (issignalingnan(fs1)) {
121612120Sar4jc@virginia.edu                            fd = numeric_limits<float>::signaling_NaN();
121712120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
121812120Sar4jc@virginia.edu                        } else {
121912120Sar4jc@virginia.edu                            fd = fs1*(signbit(fs2) ? -1.0 : 1.0);
122012120Sar4jc@virginia.edu                        }
122112120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
122212445Sar4jc@virginia.edu                    }}, FloatMiscOp);
122312120Sar4jc@virginia.edu                }
122412120Sar4jc@virginia.edu                0x11: decode ROUND_MODE {
122512120Sar4jc@virginia.edu                    0x0: fsgnj_d({{
122612120Sar4jc@virginia.edu                        if (issignalingnan(Fs1)) {
122712120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::signaling_NaN();
122812120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
122912120Sar4jc@virginia.edu                        } else {
123012120Sar4jc@virginia.edu                            Fd = copysign(Fs1, Fs2);
123112120Sar4jc@virginia.edu                        }
123212445Sar4jc@virginia.edu                    }}, FloatMiscOp);
123312120Sar4jc@virginia.edu                    0x1: fsgnjn_d({{
123412120Sar4jc@virginia.edu                        if (issignalingnan(Fs1)) {
123512120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::signaling_NaN();
123612120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
123712120Sar4jc@virginia.edu                        } else {
123812120Sar4jc@virginia.edu                            Fd = copysign(Fs1, -Fs2);
123912120Sar4jc@virginia.edu                        }
124012445Sar4jc@virginia.edu                    }}, FloatMiscOp);
124112120Sar4jc@virginia.edu                    0x2: fsgnjx_d({{
124212120Sar4jc@virginia.edu                        if (issignalingnan(Fs1)) {
124312120Sar4jc@virginia.edu                            Fd = numeric_limits<double>::signaling_NaN();
124412120Sar4jc@virginia.edu                            feclearexcept(FE_INVALID);
124512120Sar4jc@virginia.edu                        } else {
124612120Sar4jc@virginia.edu                            Fd = Fs1*(signbit(Fs2) ? -1.0 : 1.0);
124712120Sar4jc@virginia.edu                        }
124812445Sar4jc@virginia.edu                    }}, FloatMiscOp);
124912120Sar4jc@virginia.edu                }
125012120Sar4jc@virginia.edu                0x14: decode ROUND_MODE {
125112120Sar4jc@virginia.edu                    0x0: fmin_s({{
125212120Sar4jc@virginia.edu                        uint32_t temp;
125312120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
125412120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
125512120Sar4jc@virginia.edu                        float fd;
125612120Sar4jc@virginia.edu
125712120Sar4jc@virginia.edu                        if (issignalingnan(fs2)) {
125812120Sar4jc@virginia.edu                            fd = fs1;
125912120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
126012120Sar4jc@virginia.edu                        } else if (issignalingnan(fs1)) {
126112120Sar4jc@virginia.edu                            fd = fs2;
126212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
126312120Sar4jc@virginia.edu                        } else {
126412120Sar4jc@virginia.edu                            fd = fmin(fs1, fs2);
126512120Sar4jc@virginia.edu                        }
126612120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
126712120Sar4jc@virginia.edu                    }}, FloatCmpOp);
126812120Sar4jc@virginia.edu                    0x1: fmax_s({{
126912120Sar4jc@virginia.edu                        uint32_t temp;
127012120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
127112120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
127212120Sar4jc@virginia.edu                        float fd;
127312120Sar4jc@virginia.edu
127412120Sar4jc@virginia.edu                        if (issignalingnan(fs2)) {
127512120Sar4jc@virginia.edu                            fd = fs1;
127612120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
127712120Sar4jc@virginia.edu                        } else if (issignalingnan(fs1)) {
127812120Sar4jc@virginia.edu                            fd = fs2;
127912120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
128012120Sar4jc@virginia.edu                        } else {
128112120Sar4jc@virginia.edu                            fd = fmax(fs1, fs2);
128212120Sar4jc@virginia.edu                        }
128312120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
128412120Sar4jc@virginia.edu                    }}, FloatCmpOp);
128512120Sar4jc@virginia.edu                }
128612120Sar4jc@virginia.edu                0x15: decode ROUND_MODE {
128712120Sar4jc@virginia.edu                    0x0: fmin_d({{
128812120Sar4jc@virginia.edu                        if (issignalingnan(Fs2)) {
128912120Sar4jc@virginia.edu                            Fd = Fs1;
129012120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
129112120Sar4jc@virginia.edu                        } else if (issignalingnan(Fs1)) {
129212120Sar4jc@virginia.edu                            Fd = Fs2;
129312120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
129412120Sar4jc@virginia.edu                        } else {
129512120Sar4jc@virginia.edu                            Fd = fmin(Fs1, Fs2);
129612120Sar4jc@virginia.edu                        }
129712120Sar4jc@virginia.edu                    }}, FloatCmpOp);
129812120Sar4jc@virginia.edu                    0x1: fmax_d({{
129912120Sar4jc@virginia.edu                        if (issignalingnan(Fs2)) {
130012120Sar4jc@virginia.edu                            Fd = Fs1;
130112120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
130212120Sar4jc@virginia.edu                        } else if (issignalingnan(Fs1)) {
130312120Sar4jc@virginia.edu                            Fd = Fs2;
130412120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
130512120Sar4jc@virginia.edu                        } else {
130612120Sar4jc@virginia.edu                            Fd = fmax(Fs1, Fs2);
130712120Sar4jc@virginia.edu                        }
130812120Sar4jc@virginia.edu                    }}, FloatCmpOp);
130912120Sar4jc@virginia.edu                }
131012120Sar4jc@virginia.edu                0x20: fcvt_s_d({{
131112596Sqtt2@cornell.edu                    if (CONV_SGN != 1) {
131212849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("CONV_SGN != 1",
131312849Sar4jc@virginia.edu                                                              machInst);
131412596Sqtt2@cornell.edu                    }
131512120Sar4jc@virginia.edu                    float fd;
131612120Sar4jc@virginia.edu                    if (issignalingnan(Fs1)) {
131712120Sar4jc@virginia.edu                        fd = numeric_limits<float>::quiet_NaN();
131811725Sar4jc@virginia.edu                        FFLAGS |= FloatInvalid;
131911725Sar4jc@virginia.edu                    } else {
132012120Sar4jc@virginia.edu                        fd = (float)Fs1;
132111725Sar4jc@virginia.edu                    }
132211725Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
132312120Sar4jc@virginia.edu                }}, FloatCvtOp);
132412120Sar4jc@virginia.edu                0x21: fcvt_d_s({{
132512596Sqtt2@cornell.edu                    if (CONV_SGN != 0) {
132612849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("CONV_SGN != 0",
132712849Sar4jc@virginia.edu                                                              machInst);
132812596Sqtt2@cornell.edu                    }
132911725Sar4jc@virginia.edu                    uint32_t temp;
133011725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
133111725Sar4jc@virginia.edu
133212120Sar4jc@virginia.edu                    if (issignalingnan(fs1)) {
133312120Sar4jc@virginia.edu                        Fd = numeric_limits<double>::quiet_NaN();
133411725Sar4jc@virginia.edu                        FFLAGS |= FloatInvalid;
133511725Sar4jc@virginia.edu                    } else {
133612120Sar4jc@virginia.edu                        Fd = (double)fs1;
133711725Sar4jc@virginia.edu                    }
133811725Sar4jc@virginia.edu                }}, FloatCvtOp);
133912120Sar4jc@virginia.edu                0x2c: fsqrt_s({{
134012596Sqtt2@cornell.edu                    if (RS2 != 0) {
134112849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("source reg x1",
134212849Sar4jc@virginia.edu                                                              machInst);
134312596Sqtt2@cornell.edu                    }
134411725Sar4jc@virginia.edu                    uint32_t temp;
134511725Sar4jc@virginia.edu                    float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
134612120Sar4jc@virginia.edu                    float fd;
134711725Sar4jc@virginia.edu
134812120Sar4jc@virginia.edu                    if (issignalingnan(Fs1_sf)) {
134911725Sar4jc@virginia.edu                        FFLAGS |= FloatInvalid;
135012120Sar4jc@virginia.edu                    }
135112120Sar4jc@virginia.edu                    fd = sqrt(fs1);
135212120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
135312120Sar4jc@virginia.edu                }}, FloatSqrtOp);
135412120Sar4jc@virginia.edu                0x2d: fsqrt_d({{
135512596Sqtt2@cornell.edu                    if (RS2 != 0) {
135612849Sar4jc@virginia.edu                        fault = make_shared<IllegalInstFault>("source reg x1",
135712849Sar4jc@virginia.edu                                                              machInst);
135812596Sqtt2@cornell.edu                    }
135912120Sar4jc@virginia.edu                    Fd = sqrt(Fs1);
136012120Sar4jc@virginia.edu                }}, FloatSqrtOp);
136112120Sar4jc@virginia.edu                0x50: decode ROUND_MODE {
136212120Sar4jc@virginia.edu                    0x0: fle_s({{
136312120Sar4jc@virginia.edu                        uint32_t temp;
136412120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
136512120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
136612120Sar4jc@virginia.edu
136712138Sgabeblack@google.com                        if (std::isnan(fs1) || std::isnan(fs2)) {
136812120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
136912120Sar4jc@virginia.edu                            Rd = 0;
137012120Sar4jc@virginia.edu                        } else {
137112120Sar4jc@virginia.edu                            Rd = fs1 <= fs2 ? 1 : 0;
137211725Sar4jc@virginia.edu                        }
137312120Sar4jc@virginia.edu                    }}, FloatCmpOp);
137412120Sar4jc@virginia.edu                    0x1: flt_s({{
137512120Sar4jc@virginia.edu                        uint32_t temp;
137612120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
137712120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
137812120Sar4jc@virginia.edu
137912138Sgabeblack@google.com                        if (std::isnan(fs1) || std::isnan(fs2)) {
138012120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
138112120Sar4jc@virginia.edu                            Rd = 0;
138212120Sar4jc@virginia.edu                        } else {
138312120Sar4jc@virginia.edu                            Rd = fs1 < fs2 ? 1 : 0;
138412120Sar4jc@virginia.edu                        }
138512120Sar4jc@virginia.edu                    }}, FloatCmpOp);
138612120Sar4jc@virginia.edu                    0x2: feq_s({{
138712120Sar4jc@virginia.edu                        uint32_t temp;
138812120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
138912120Sar4jc@virginia.edu                        float fs2 = reinterpret_cast<float&>(temp = Fs2_bits);
139012120Sar4jc@virginia.edu
139112120Sar4jc@virginia.edu                        if (issignalingnan(fs1) || issignalingnan(fs2)) {
139212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
139312120Sar4jc@virginia.edu                        }
139412120Sar4jc@virginia.edu                        Rd = fs1 == fs2 ? 1 : 0;
139512120Sar4jc@virginia.edu                    }}, FloatCmpOp);
139612120Sar4jc@virginia.edu                }
139712120Sar4jc@virginia.edu                0x51: decode ROUND_MODE {
139812120Sar4jc@virginia.edu                    0x0: fle_d({{
139912138Sgabeblack@google.com                        if (std::isnan(Fs1) || std::isnan(Fs2)) {
140012120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
140112120Sar4jc@virginia.edu                            Rd = 0;
140212120Sar4jc@virginia.edu                        } else {
140312120Sar4jc@virginia.edu                            Rd = Fs1 <= Fs2 ? 1 : 0;
140412120Sar4jc@virginia.edu                        }
140512120Sar4jc@virginia.edu                    }}, FloatCmpOp);
140612120Sar4jc@virginia.edu                    0x1: flt_d({{
140712138Sgabeblack@google.com                        if (std::isnan(Fs1) || std::isnan(Fs2)) {
140812120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
140912120Sar4jc@virginia.edu                            Rd = 0;
141012120Sar4jc@virginia.edu                        } else {
141112120Sar4jc@virginia.edu                            Rd = Fs1 < Fs2 ? 1 : 0;
141212120Sar4jc@virginia.edu                        }
141312120Sar4jc@virginia.edu                    }}, FloatCmpOp);
141412120Sar4jc@virginia.edu                    0x2: feq_d({{
141512120Sar4jc@virginia.edu                        if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
141612120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
141712120Sar4jc@virginia.edu                        }
141812120Sar4jc@virginia.edu                        Rd = Fs1 == Fs2 ? 1 : 0;
141912120Sar4jc@virginia.edu                    }}, FloatCmpOp);
142012120Sar4jc@virginia.edu                }
142112120Sar4jc@virginia.edu                0x60: decode CONV_SGN {
142212120Sar4jc@virginia.edu                    0x0: fcvt_w_s({{
142312120Sar4jc@virginia.edu                        uint32_t temp;
142412120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
142512120Sar4jc@virginia.edu
142612138Sgabeblack@google.com                        if (std::isnan(fs1)) {
142712120Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::max();
142812120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
142912444Sar4jc@virginia.edu                        } else if (fs1 >= numeric_limits<int32_t>::max()) {
143012444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::max();
143112444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
143212444Sar4jc@virginia.edu                        } else if (fs1 <= numeric_limits<int32_t>::min()) {
143312444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::min();
143412444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
143512120Sar4jc@virginia.edu                        } else {
143612120Sar4jc@virginia.edu                            Rd_sd = (int32_t)fs1;
143712120Sar4jc@virginia.edu                        }
143812120Sar4jc@virginia.edu                    }}, FloatCvtOp);
143912120Sar4jc@virginia.edu                    0x1: fcvt_wu_s({{
144012120Sar4jc@virginia.edu                        uint32_t temp;
144112120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
144212120Sar4jc@virginia.edu
144312444Sar4jc@virginia.edu                        if (std::isnan(fs1)) {
144412444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
144512444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
144612444Sar4jc@virginia.edu                        } else if (fs1 < 0.0) {
144712120Sar4jc@virginia.edu                            Rd = 0;
144812120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
144912444Sar4jc@virginia.edu                        } else if (fs1 > numeric_limits<uint32_t>::max()) {
145012444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
145112444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
145212120Sar4jc@virginia.edu                        } else {
145312120Sar4jc@virginia.edu                            Rd = (uint32_t)fs1;
145412120Sar4jc@virginia.edu                        }
145512120Sar4jc@virginia.edu                    }}, FloatCvtOp);
145612120Sar4jc@virginia.edu                    0x2: fcvt_l_s({{
145712120Sar4jc@virginia.edu                        uint32_t temp;
145812120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
145912120Sar4jc@virginia.edu
146012138Sgabeblack@google.com                        if (std::isnan(fs1)) {
146112120Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::max();
146212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
146312444Sar4jc@virginia.edu                        } else if (fs1 > numeric_limits<int64_t>::max()) {
146412444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::max();
146512444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
146612444Sar4jc@virginia.edu                        } else if (fs1 < numeric_limits<int64_t>::min()) {
146712444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::min();
146812444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
146912120Sar4jc@virginia.edu                        } else {
147012120Sar4jc@virginia.edu                            Rd_sd = (int64_t)fs1;
147112120Sar4jc@virginia.edu                        }
147212120Sar4jc@virginia.edu                    }}, FloatCvtOp);
147312120Sar4jc@virginia.edu                    0x3: fcvt_lu_s({{
147412120Sar4jc@virginia.edu                        uint32_t temp;
147512120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
147612120Sar4jc@virginia.edu
147712444Sar4jc@virginia.edu                        if (std::isnan(fs1)) {
147812444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
147912444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
148012444Sar4jc@virginia.edu                        } else if (fs1 < 0.0) {
148112120Sar4jc@virginia.edu                            Rd = 0;
148212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
148312444Sar4jc@virginia.edu                        } else if (fs1 > numeric_limits<uint64_t>::max()) {
148412444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
148512444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
148612120Sar4jc@virginia.edu                        } else {
148712120Sar4jc@virginia.edu                            Rd = (uint64_t)fs1;
148812120Sar4jc@virginia.edu                        }
148912120Sar4jc@virginia.edu                    }}, FloatCvtOp);
149012120Sar4jc@virginia.edu                }
149112120Sar4jc@virginia.edu                0x61: decode CONV_SGN {
149212120Sar4jc@virginia.edu                    0x0: fcvt_w_d({{
149312444Sar4jc@virginia.edu                        if (std::isnan(Fs1)) {
149412444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::max();
149512444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
149612444Sar4jc@virginia.edu                        } else if (Fs1 > numeric_limits<int32_t>::max()) {
149712444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::max();
149812444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
149912444Sar4jc@virginia.edu                        } else if (Fs1 < numeric_limits<int32_t>::min()) {
150012444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int32_t>::min();
150112444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
150212444Sar4jc@virginia.edu                        } else {
150312444Sar4jc@virginia.edu                            Rd_sd = (int32_t)Fs1;
150412120Sar4jc@virginia.edu                        }
150512120Sar4jc@virginia.edu                    }}, FloatCvtOp);
150612120Sar4jc@virginia.edu                    0x1: fcvt_wu_d({{
150712444Sar4jc@virginia.edu                        if (std::isnan(Fs1)) {
150812444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
150912444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
151012444Sar4jc@virginia.edu                        } else if (Fs1 < 0) {
151112120Sar4jc@virginia.edu                            Rd = 0;
151212120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
151312444Sar4jc@virginia.edu                        } else if (Fs1 > numeric_limits<uint32_t>::max()) {
151412444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
151512444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
151612120Sar4jc@virginia.edu                        } else {
151712120Sar4jc@virginia.edu                            Rd = (uint32_t)Fs1;
151812120Sar4jc@virginia.edu                        }
151912120Sar4jc@virginia.edu                    }}, FloatCvtOp);
152012120Sar4jc@virginia.edu                    0x2: fcvt_l_d({{
152112444Sar4jc@virginia.edu                        if (std::isnan(Fs1)) {
152212444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::max();
152312444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
152412444Sar4jc@virginia.edu                        } else if (Fs1 > numeric_limits<int64_t>::max()) {
152512444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::max();
152612444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
152712444Sar4jc@virginia.edu                        } else if (Fs1 < numeric_limits<int64_t>::min()) {
152812444Sar4jc@virginia.edu                            Rd_sd = numeric_limits<int64_t>::min();
152912444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
153012444Sar4jc@virginia.edu                        } else {
153112444Sar4jc@virginia.edu                            Rd_sd = Fs1;
153212120Sar4jc@virginia.edu                        }
153312120Sar4jc@virginia.edu                    }}, FloatCvtOp);
153412120Sar4jc@virginia.edu                    0x3: fcvt_lu_d({{
153512444Sar4jc@virginia.edu                        if (std::isnan(Fs1)) {
153612444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
153712444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
153812444Sar4jc@virginia.edu                        } else if (Fs1 < 0) {
153912120Sar4jc@virginia.edu                            Rd = 0;
154012120Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
154112444Sar4jc@virginia.edu                        } else if (Fs1 > numeric_limits<uint64_t>::max()) {
154212444Sar4jc@virginia.edu                            Rd = numeric_limits<uint64_t>::max();
154312444Sar4jc@virginia.edu                            FFLAGS |= FloatInvalid;
154412120Sar4jc@virginia.edu                        } else {
154512444Sar4jc@virginia.edu                            Rd = Fs1;
154612120Sar4jc@virginia.edu                        }
154712120Sar4jc@virginia.edu                    }}, FloatCvtOp);
154812120Sar4jc@virginia.edu                }
154912120Sar4jc@virginia.edu                0x68: decode CONV_SGN {
155012120Sar4jc@virginia.edu                    0x0: fcvt_s_w({{
155112120Sar4jc@virginia.edu                        float temp = (float)Rs1_sw;
155212120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
155312120Sar4jc@virginia.edu                    }}, FloatCvtOp);
155412120Sar4jc@virginia.edu                    0x1: fcvt_s_wu({{
155512120Sar4jc@virginia.edu                        float temp = (float)Rs1_uw;
155612120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
155712120Sar4jc@virginia.edu                    }}, FloatCvtOp);
155812120Sar4jc@virginia.edu                    0x2: fcvt_s_l({{
155912120Sar4jc@virginia.edu                        float temp = (float)Rs1_sd;
156012120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
156112120Sar4jc@virginia.edu                    }}, FloatCvtOp);
156212120Sar4jc@virginia.edu                    0x3: fcvt_s_lu({{
156312120Sar4jc@virginia.edu                        float temp = (float)Rs1;
156412120Sar4jc@virginia.edu                        Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(temp);
156512120Sar4jc@virginia.edu                    }}, FloatCvtOp);
156612120Sar4jc@virginia.edu                }
156712120Sar4jc@virginia.edu                0x69: decode CONV_SGN {
156812120Sar4jc@virginia.edu                    0x0: fcvt_d_w({{
156912120Sar4jc@virginia.edu                        Fd = (double)Rs1_sw;
157012120Sar4jc@virginia.edu                    }}, FloatCvtOp);
157112120Sar4jc@virginia.edu                    0x1: fcvt_d_wu({{
157212120Sar4jc@virginia.edu                        Fd = (double)Rs1_uw;
157312120Sar4jc@virginia.edu                    }}, FloatCvtOp);
157412120Sar4jc@virginia.edu                    0x2: fcvt_d_l({{
157512120Sar4jc@virginia.edu                        Fd = (double)Rs1_sd;
157612120Sar4jc@virginia.edu                    }}, FloatCvtOp);
157712120Sar4jc@virginia.edu                    0x3: fcvt_d_lu({{
157812120Sar4jc@virginia.edu                        Fd = (double)Rs1;
157912120Sar4jc@virginia.edu                    }}, FloatCvtOp);
158012120Sar4jc@virginia.edu                }
158112120Sar4jc@virginia.edu                0x70: decode ROUND_MODE {
158212120Sar4jc@virginia.edu                    0x0: fmv_x_s({{
158312120Sar4jc@virginia.edu                        Rd = (uint32_t)Fs1_bits;
158412120Sar4jc@virginia.edu                        if ((Rd&0x80000000) != 0) {
158512120Sar4jc@virginia.edu                            Rd |= (0xFFFFFFFFULL << 32);
158612120Sar4jc@virginia.edu                        }
158712120Sar4jc@virginia.edu                    }}, FloatCvtOp);
158812120Sar4jc@virginia.edu                    0x1: fclass_s({{
158912120Sar4jc@virginia.edu                        uint32_t temp;
159012120Sar4jc@virginia.edu                        float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
159112120Sar4jc@virginia.edu                        switch (fpclassify(fs1)) {
159212445Sar4jc@virginia.edu                          case FP_INFINITE:
159312120Sar4jc@virginia.edu                            if (signbit(fs1)) {
159412120Sar4jc@virginia.edu                                Rd = 1 << 0;
159512120Sar4jc@virginia.edu                            } else {
159612120Sar4jc@virginia.edu                                Rd = 1 << 7;
159712120Sar4jc@virginia.edu                            }
159812120Sar4jc@virginia.edu                            break;
159912445Sar4jc@virginia.edu                          case FP_NAN:
160012120Sar4jc@virginia.edu                            if (issignalingnan(fs1)) {
160112120Sar4jc@virginia.edu                                Rd = 1 << 8;
160212120Sar4jc@virginia.edu                            } else {
160312120Sar4jc@virginia.edu                                Rd = 1 << 9;
160412120Sar4jc@virginia.edu                            }
160512120Sar4jc@virginia.edu                            break;
160612445Sar4jc@virginia.edu                          case FP_ZERO:
160712120Sar4jc@virginia.edu                            if (signbit(fs1)) {
160812120Sar4jc@virginia.edu                                Rd = 1 << 3;
160912120Sar4jc@virginia.edu                            } else {
161012120Sar4jc@virginia.edu                                Rd = 1 << 4;
161112120Sar4jc@virginia.edu                            }
161212120Sar4jc@virginia.edu                            break;
161312445Sar4jc@virginia.edu                          case FP_SUBNORMAL:
161412120Sar4jc@virginia.edu                            if (signbit(fs1)) {
161512120Sar4jc@virginia.edu                                Rd = 1 << 2;
161612120Sar4jc@virginia.edu                            } else {
161712120Sar4jc@virginia.edu                                Rd = 1 << 5;
161812120Sar4jc@virginia.edu                            }
161912120Sar4jc@virginia.edu                            break;
162012445Sar4jc@virginia.edu                          case FP_NORMAL:
162112120Sar4jc@virginia.edu                            if (signbit(fs1)) {
162212120Sar4jc@virginia.edu                                Rd = 1 << 1;
162312120Sar4jc@virginia.edu                            } else {
162412120Sar4jc@virginia.edu                                Rd = 1 << 6;
162512120Sar4jc@virginia.edu                            }
162612120Sar4jc@virginia.edu                            break;
162712445Sar4jc@virginia.edu                          default:
162812120Sar4jc@virginia.edu                            panic("Unknown classification for operand.");
162912120Sar4jc@virginia.edu                            break;
163012120Sar4jc@virginia.edu                        }
163112445Sar4jc@virginia.edu                    }}, FloatMiscOp);
163212120Sar4jc@virginia.edu                }
163312120Sar4jc@virginia.edu                0x71: decode ROUND_MODE {
163412120Sar4jc@virginia.edu                    0x0: fmv_x_d({{
163512120Sar4jc@virginia.edu                        Rd = Fs1_bits;
163612120Sar4jc@virginia.edu                    }}, FloatCvtOp);
163712120Sar4jc@virginia.edu                    0x1: fclass_d({{
163812120Sar4jc@virginia.edu                        switch (fpclassify(Fs1)) {
163912445Sar4jc@virginia.edu                          case FP_INFINITE:
164012120Sar4jc@virginia.edu                            if (signbit(Fs1)) {
164112120Sar4jc@virginia.edu                                Rd = 1 << 0;
164212120Sar4jc@virginia.edu                            } else {
164312120Sar4jc@virginia.edu                                Rd = 1 << 7;
164412120Sar4jc@virginia.edu                            }
164512120Sar4jc@virginia.edu                            break;
164612445Sar4jc@virginia.edu                          case FP_NAN:
164712120Sar4jc@virginia.edu                            if (issignalingnan(Fs1)) {
164812120Sar4jc@virginia.edu                                Rd = 1 << 8;
164912120Sar4jc@virginia.edu                            } else {
165012120Sar4jc@virginia.edu                                Rd = 1 << 9;
165112120Sar4jc@virginia.edu                            }
165212120Sar4jc@virginia.edu                            break;
165312445Sar4jc@virginia.edu                          case FP_ZERO:
165412120Sar4jc@virginia.edu                            if (signbit(Fs1)) {
165512120Sar4jc@virginia.edu                                Rd = 1 << 3;
165612120Sar4jc@virginia.edu                            } else {
165712120Sar4jc@virginia.edu                                Rd = 1 << 4;
165812120Sar4jc@virginia.edu                            }
165912120Sar4jc@virginia.edu                            break;
166012445Sar4jc@virginia.edu                          case FP_SUBNORMAL:
166112120Sar4jc@virginia.edu                            if (signbit(Fs1)) {
166212120Sar4jc@virginia.edu                                Rd = 1 << 2;
166312120Sar4jc@virginia.edu                            } else {
166412120Sar4jc@virginia.edu                                Rd = 1 << 5;
166512120Sar4jc@virginia.edu                            }
166612120Sar4jc@virginia.edu                            break;
166712445Sar4jc@virginia.edu                          case FP_NORMAL:
166812120Sar4jc@virginia.edu                            if (signbit(Fs1)) {
166912120Sar4jc@virginia.edu                                Rd = 1 << 1;
167012120Sar4jc@virginia.edu                            } else {
167112120Sar4jc@virginia.edu                                Rd = 1 << 6;
167212120Sar4jc@virginia.edu                            }
167312120Sar4jc@virginia.edu                            break;
167412445Sar4jc@virginia.edu                          default:
167512120Sar4jc@virginia.edu                            panic("Unknown classification for operand.");
167612120Sar4jc@virginia.edu                            break;
167712120Sar4jc@virginia.edu                        }
167812445Sar4jc@virginia.edu                    }}, FloatMiscOp);
167912120Sar4jc@virginia.edu                }
168012120Sar4jc@virginia.edu                0x78: fmv_s_x({{
168112120Sar4jc@virginia.edu                    Fd_bits = (uint64_t)Rs1_uw;
168211725Sar4jc@virginia.edu                }}, FloatCvtOp);
168312120Sar4jc@virginia.edu                0x79: fmv_d_x({{
168412120Sar4jc@virginia.edu                    Fd_bits = Rs1;
168511725Sar4jc@virginia.edu                }}, FloatCvtOp);
168611725Sar4jc@virginia.edu            }
168712120Sar4jc@virginia.edu        }
168812120Sar4jc@virginia.edu
168912120Sar4jc@virginia.edu        0x18: decode FUNCT3 {
169012120Sar4jc@virginia.edu            format BOp {
169112120Sar4jc@virginia.edu                0x0: beq({{
169212120Sar4jc@virginia.edu                    if (Rs1 == Rs2) {
169312120Sar4jc@virginia.edu                        NPC = PC + imm;
169412120Sar4jc@virginia.edu                    } else {
169512120Sar4jc@virginia.edu                        NPC = NPC;
169611725Sar4jc@virginia.edu                    }
169712120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
169812120Sar4jc@virginia.edu                0x1: bne({{
169912120Sar4jc@virginia.edu                    if (Rs1 != Rs2) {
170012120Sar4jc@virginia.edu                        NPC = PC + imm;
170111725Sar4jc@virginia.edu                    } else {
170212120Sar4jc@virginia.edu                        NPC = NPC;
170311725Sar4jc@virginia.edu                    }
170412120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
170512120Sar4jc@virginia.edu                0x4: blt({{
170612120Sar4jc@virginia.edu                    if (Rs1_sd < Rs2_sd) {
170712120Sar4jc@virginia.edu                        NPC = PC + imm;
170812120Sar4jc@virginia.edu                    } else {
170912120Sar4jc@virginia.edu                        NPC = NPC;
171011725Sar4jc@virginia.edu                    }
171112120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
171212120Sar4jc@virginia.edu                0x5: bge({{
171312120Sar4jc@virginia.edu                    if (Rs1_sd >= Rs2_sd) {
171412120Sar4jc@virginia.edu                        NPC = PC + imm;
171511725Sar4jc@virginia.edu                    } else {
171612120Sar4jc@virginia.edu                        NPC = NPC;
171711725Sar4jc@virginia.edu                    }
171812120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
171912120Sar4jc@virginia.edu                0x6: bltu({{
172012120Sar4jc@virginia.edu                    if (Rs1 < Rs2) {
172112120Sar4jc@virginia.edu                        NPC = PC + imm;
172212120Sar4jc@virginia.edu                    } else {
172312120Sar4jc@virginia.edu                        NPC = NPC;
172412120Sar4jc@virginia.edu                    }
172512120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
172612120Sar4jc@virginia.edu                0x7: bgeu({{
172712120Sar4jc@virginia.edu                    if (Rs1 >= Rs2) {
172812120Sar4jc@virginia.edu                        NPC = PC + imm;
172912120Sar4jc@virginia.edu                    } else {
173012120Sar4jc@virginia.edu                        NPC = NPC;
173112120Sar4jc@virginia.edu                    }
173212120Sar4jc@virginia.edu                }}, IsDirectControl, IsCondControl);
173311725Sar4jc@virginia.edu            }
173412120Sar4jc@virginia.edu        }
173512120Sar4jc@virginia.edu
173612120Sar4jc@virginia.edu        0x19: decode FUNCT3 {
173712120Sar4jc@virginia.edu            0x0: Jump::jalr({{
173812120Sar4jc@virginia.edu                Rd = NPC;
173912120Sar4jc@virginia.edu                NPC = (imm + Rs1) & (~0x1);
174012120Sar4jc@virginia.edu            }}, IsIndirectControl, IsUncondControl, IsCall);
174112120Sar4jc@virginia.edu        }
174212120Sar4jc@virginia.edu
174312120Sar4jc@virginia.edu        0x1b: JOp::jal({{
174412120Sar4jc@virginia.edu            Rd = NPC;
174512120Sar4jc@virginia.edu            NPC = PC + imm;
174612120Sar4jc@virginia.edu        }}, IsDirectControl, IsUncondControl, IsCall);
174712120Sar4jc@virginia.edu
174812120Sar4jc@virginia.edu        0x1c: decode FUNCT3 {
174912120Sar4jc@virginia.edu            format SystemOp {
175012120Sar4jc@virginia.edu                0x0: decode FUNCT12 {
175112120Sar4jc@virginia.edu                    0x0: ecall({{
175212850Salec.roelke@gmail.com                        fault = make_shared<SyscallFault>(
175312850Salec.roelke@gmail.com                                (PrivilegeMode)xc->readMiscReg(MISCREG_PRV));
175412120Sar4jc@virginia.edu                    }}, IsSerializeAfter, IsNonSpeculative, IsSyscall,
175512120Sar4jc@virginia.edu                        No_OpClass);
175612120Sar4jc@virginia.edu                    0x1: ebreak({{
175712849Sar4jc@virginia.edu                        fault = make_shared<BreakpointFault>(xc->pcState());
175812120Sar4jc@virginia.edu                    }}, IsSerializeAfter, IsNonSpeculative, No_OpClass);
175912850Salec.roelke@gmail.com                    0x2: uret({{
176012850Salec.roelke@gmail.com                        STATUS status = xc->readMiscReg(MISCREG_STATUS);
176112850Salec.roelke@gmail.com                        status.uie = status.upie;
176212850Salec.roelke@gmail.com                        status.upie = 1;
176312850Salec.roelke@gmail.com                        xc->setMiscReg(MISCREG_STATUS, status);
176412850Salec.roelke@gmail.com                        NPC = xc->readMiscReg(MISCREG_UEPC);
176512850Salec.roelke@gmail.com                    }}, IsReturn);
176612850Salec.roelke@gmail.com                    0x102: sret({{
176712850Salec.roelke@gmail.com                        if (xc->readMiscReg(MISCREG_PRV) == PRV_U) {
176812850Salec.roelke@gmail.com                            fault = make_shared<IllegalInstFault>(
176912850Salec.roelke@gmail.com                                        "sret in user mode", machInst);
177012850Salec.roelke@gmail.com                            NPC = NPC;
177112850Salec.roelke@gmail.com                        } else {
177212850Salec.roelke@gmail.com                            STATUS status = xc->readMiscReg(MISCREG_STATUS);
177312850Salec.roelke@gmail.com                            xc->setMiscReg(MISCREG_PRV, status.spp);
177412850Salec.roelke@gmail.com                            status.sie = status.spie;
177512850Salec.roelke@gmail.com                            status.spie = 1;
177612850Salec.roelke@gmail.com                            status.spp = PRV_U;
177712850Salec.roelke@gmail.com                            xc->setMiscReg(MISCREG_STATUS, status);
177812850Salec.roelke@gmail.com                            NPC = xc->readMiscReg(MISCREG_SEPC);
177912850Salec.roelke@gmail.com                        }
178012850Salec.roelke@gmail.com                    }}, IsReturn);
178112850Salec.roelke@gmail.com                    0x302: mret({{
178212850Salec.roelke@gmail.com                        if (xc->readMiscReg(MISCREG_PRV) != PRV_M) {
178312850Salec.roelke@gmail.com                            fault = make_shared<IllegalInstFault>(
178412850Salec.roelke@gmail.com                                        "mret at lower privilege", machInst);
178512850Salec.roelke@gmail.com                            NPC = NPC;
178612850Salec.roelke@gmail.com                        } else {
178712850Salec.roelke@gmail.com                            STATUS status = xc->readMiscReg(MISCREG_STATUS);
178812850Salec.roelke@gmail.com                            xc->setMiscReg(MISCREG_PRV, status.mpp);
178912850Salec.roelke@gmail.com                            status.mie = status.mpie;
179012850Salec.roelke@gmail.com                            status.mpie = 1;
179112850Salec.roelke@gmail.com                            status.mpp = PRV_U;
179212850Salec.roelke@gmail.com                            xc->setMiscReg(MISCREG_STATUS, status);
179312850Salec.roelke@gmail.com                            NPC = xc->readMiscReg(MISCREG_MEPC);
179412850Salec.roelke@gmail.com                        }
179512850Salec.roelke@gmail.com                    }}, IsReturn);
179612120Sar4jc@virginia.edu                }
179711725Sar4jc@virginia.edu            }
179812120Sar4jc@virginia.edu            format CSROp {
179912120Sar4jc@virginia.edu                0x1: csrrw({{
180012695Sar4jc@virginia.edu                    Rd = data;
180112695Sar4jc@virginia.edu                    data = Rs1;
180212120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
180312120Sar4jc@virginia.edu                0x2: csrrs({{
180412695Sar4jc@virginia.edu                    Rd = data;
180512695Sar4jc@virginia.edu                    data |= Rs1;
180612120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
180712120Sar4jc@virginia.edu                0x3: csrrc({{
180812695Sar4jc@virginia.edu                    Rd = data;
180912695Sar4jc@virginia.edu                    data &= ~Rs1;
181012120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
181112120Sar4jc@virginia.edu                0x5: csrrwi({{
181212695Sar4jc@virginia.edu                    Rd = data;
181312695Sar4jc@virginia.edu                    data = uimm;
181412120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
181512120Sar4jc@virginia.edu                0x6: csrrsi({{
181612695Sar4jc@virginia.edu                    Rd = data;
181712695Sar4jc@virginia.edu                    data |= uimm;
181812120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
181912120Sar4jc@virginia.edu                0x7: csrrci({{
182012695Sar4jc@virginia.edu                    Rd = data;
182112695Sar4jc@virginia.edu                    data &= ~uimm;
182212120Sar4jc@virginia.edu                }}, IsNonSpeculative, No_OpClass);
182311725Sar4jc@virginia.edu            }
182411725Sar4jc@virginia.edu        }
182511725Sar4jc@virginia.edu    }
182612138Sgabeblack@google.com}
1827