faults.hh revision 13547
111723Sar4jc@virginia.edu/* 211723Sar4jc@virginia.edu * Copyright (c) 2016 RISC-V Foundation 311723Sar4jc@virginia.edu * Copyright (c) 2016 The University of Virginia 412808Srobert.scheffel1@tu-dresden.de * Copyright (c) 2018 TU Dresden 511723Sar4jc@virginia.edu * All rights reserved. 611723Sar4jc@virginia.edu * 711723Sar4jc@virginia.edu * Redistribution and use in source and binary forms, with or without 811723Sar4jc@virginia.edu * modification, are permitted provided that the following conditions are 911723Sar4jc@virginia.edu * met: redistributions of source code must retain the above copyright 1011723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer; 1111723Sar4jc@virginia.edu * redistributions in binary form must reproduce the above copyright 1211723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer in the 1311723Sar4jc@virginia.edu * documentation and/or other materials provided with the distribution; 1411723Sar4jc@virginia.edu * neither the name of the copyright holders nor the names of its 1511723Sar4jc@virginia.edu * contributors may be used to endorse or promote products derived from 1611723Sar4jc@virginia.edu * this software without specific prior written permission. 1711723Sar4jc@virginia.edu * 1811723Sar4jc@virginia.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1911723Sar4jc@virginia.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2011723Sar4jc@virginia.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2111723Sar4jc@virginia.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2211723Sar4jc@virginia.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2311723Sar4jc@virginia.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2411723Sar4jc@virginia.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2511723Sar4jc@virginia.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2611723Sar4jc@virginia.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2711723Sar4jc@virginia.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2811723Sar4jc@virginia.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2911723Sar4jc@virginia.edu * 3011723Sar4jc@virginia.edu * Authors: Alec Roelke 3112808Srobert.scheffel1@tu-dresden.de * Robert Scheffel 3211723Sar4jc@virginia.edu */ 3311723Sar4jc@virginia.edu 3411723Sar4jc@virginia.edu#ifndef __ARCH_RISCV_FAULTS_HH__ 3511723Sar4jc@virginia.edu#define __ARCH_RISCV_FAULTS_HH__ 3611723Sar4jc@virginia.edu 3712850Salec.roelke@gmail.com#include <map> 3811723Sar4jc@virginia.edu#include <string> 3911723Sar4jc@virginia.edu 4012850Salec.roelke@gmail.com#include "arch/riscv/isa.hh" 4112848Sar4jc@virginia.edu#include "arch/riscv/registers.hh" 4211723Sar4jc@virginia.edu#include "cpu/thread_context.hh" 4311723Sar4jc@virginia.edu#include "sim/faults.hh" 4411723Sar4jc@virginia.edu 4511723Sar4jc@virginia.edunamespace RiscvISA 4611723Sar4jc@virginia.edu{ 4711723Sar4jc@virginia.edu 4812848Sar4jc@virginia.eduenum FloatException : MiscReg { 4912848Sar4jc@virginia.edu FloatInexact = 0x1, 5012848Sar4jc@virginia.edu FloatUnderflow = 0x2, 5112848Sar4jc@virginia.edu FloatOverflow = 0x4, 5212848Sar4jc@virginia.edu FloatDivZero = 0x8, 5312848Sar4jc@virginia.edu FloatInvalid = 0x10 5412848Sar4jc@virginia.edu}; 5511725Sar4jc@virginia.edu 5612848Sar4jc@virginia.eduenum ExceptionCode : MiscReg { 5711723Sar4jc@virginia.edu INST_ADDR_MISALIGNED = 0, 5811723Sar4jc@virginia.edu INST_ACCESS = 1, 5911723Sar4jc@virginia.edu INST_ILLEGAL = 2, 6011723Sar4jc@virginia.edu BREAKPOINT = 3, 6111723Sar4jc@virginia.edu LOAD_ADDR_MISALIGNED = 4, 6211723Sar4jc@virginia.edu LOAD_ACCESS = 5, 6311723Sar4jc@virginia.edu STORE_ADDR_MISALIGNED = 6, 6411723Sar4jc@virginia.edu AMO_ADDR_MISALIGNED = 6, 6511723Sar4jc@virginia.edu STORE_ACCESS = 7, 6611723Sar4jc@virginia.edu AMO_ACCESS = 7, 6711723Sar4jc@virginia.edu ECALL_USER = 8, 6811723Sar4jc@virginia.edu ECALL_SUPER = 9, 6912848Sar4jc@virginia.edu ECALL_MACHINE = 11, 7012848Sar4jc@virginia.edu INST_PAGE = 12, 7112848Sar4jc@virginia.edu LOAD_PAGE = 13, 7212848Sar4jc@virginia.edu STORE_PAGE = 15, 7312848Sar4jc@virginia.edu AMO_PAGE = 15 7411723Sar4jc@virginia.edu}; 7511723Sar4jc@virginia.edu 7611723Sar4jc@virginia.educlass RiscvFault : public FaultBase 7711723Sar4jc@virginia.edu{ 7811723Sar4jc@virginia.edu protected: 7911723Sar4jc@virginia.edu const FaultName _name; 8012850Salec.roelke@gmail.com const bool _interrupt; 8112850Salec.roelke@gmail.com ExceptionCode _code; 8211723Sar4jc@virginia.edu 8312848Sar4jc@virginia.edu RiscvFault(FaultName n, bool i, ExceptionCode c) 8412848Sar4jc@virginia.edu : _name(n), _interrupt(i), _code(c) 8511723Sar4jc@virginia.edu {} 8611723Sar4jc@virginia.edu 8712849Sar4jc@virginia.edu FaultName name() const override { return _name; } 8812848Sar4jc@virginia.edu bool isInterrupt() const { return _interrupt; } 8912848Sar4jc@virginia.edu ExceptionCode exception() const { return _code; } 9012849Sar4jc@virginia.edu virtual MiscReg trap_value() const { return 0; } 9111723Sar4jc@virginia.edu 9212848Sar4jc@virginia.edu virtual void invokeSE(ThreadContext *tc, const StaticInstPtr &inst); 9312848Sar4jc@virginia.edu void invoke(ThreadContext *tc, const StaticInstPtr &inst) override; 9411723Sar4jc@virginia.edu}; 9511723Sar4jc@virginia.edu 9612808Srobert.scheffel1@tu-dresden.declass Reset : public FaultBase 9712808Srobert.scheffel1@tu-dresden.de{ 9813547Sar4jc@virginia.edu private: 9913547Sar4jc@virginia.edu const FaultName _name; 10012808Srobert.scheffel1@tu-dresden.de 10113547Sar4jc@virginia.edu public: 10213547Sar4jc@virginia.edu Reset() : _name("reset") {} 10313547Sar4jc@virginia.edu FaultName name() const override { return _name; } 10412808Srobert.scheffel1@tu-dresden.de 10513547Sar4jc@virginia.edu void invoke(ThreadContext *tc, const StaticInstPtr &inst = 10613547Sar4jc@virginia.edu StaticInst::nullStaticInstPtr) override; 10712808Srobert.scheffel1@tu-dresden.de}; 10811723Sar4jc@virginia.edu 10912849Sar4jc@virginia.educlass InstFault : public RiscvFault 11012849Sar4jc@virginia.edu{ 11112849Sar4jc@virginia.edu protected: 11212849Sar4jc@virginia.edu const ExtMachInst _inst; 11312849Sar4jc@virginia.edu 11412849Sar4jc@virginia.edu public: 11512849Sar4jc@virginia.edu InstFault(FaultName n, const ExtMachInst inst) 11612849Sar4jc@virginia.edu : RiscvFault(n, false, INST_ILLEGAL), _inst(inst) 11712849Sar4jc@virginia.edu {} 11812849Sar4jc@virginia.edu 11912849Sar4jc@virginia.edu MiscReg trap_value() const override { return _inst; } 12012849Sar4jc@virginia.edu}; 12112849Sar4jc@virginia.edu 12212849Sar4jc@virginia.educlass UnknownInstFault : public InstFault 12311723Sar4jc@virginia.edu{ 12411723Sar4jc@virginia.edu public: 12512849Sar4jc@virginia.edu UnknownInstFault(const ExtMachInst inst) 12612849Sar4jc@virginia.edu : InstFault("Unknown instruction", inst) 12711723Sar4jc@virginia.edu {} 12811723Sar4jc@virginia.edu 12912848Sar4jc@virginia.edu void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override; 13011723Sar4jc@virginia.edu}; 13111723Sar4jc@virginia.edu 13212849Sar4jc@virginia.educlass IllegalInstFault : public InstFault 13312136Sar4jc@virginia.edu{ 13412136Sar4jc@virginia.edu private: 13512136Sar4jc@virginia.edu const std::string reason; 13612848Sar4jc@virginia.edu 13712136Sar4jc@virginia.edu public: 13812849Sar4jc@virginia.edu IllegalInstFault(std::string r, const ExtMachInst inst) 13912849Sar4jc@virginia.edu : InstFault("Illegal instruction", inst) 14012136Sar4jc@virginia.edu {} 14112136Sar4jc@virginia.edu 14212848Sar4jc@virginia.edu void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override; 14312136Sar4jc@virginia.edu}; 14412136Sar4jc@virginia.edu 14512849Sar4jc@virginia.educlass UnimplementedFault : public InstFault 14611723Sar4jc@virginia.edu{ 14711723Sar4jc@virginia.edu private: 14811723Sar4jc@virginia.edu const std::string instName; 14912848Sar4jc@virginia.edu 15011723Sar4jc@virginia.edu public: 15112849Sar4jc@virginia.edu UnimplementedFault(std::string name, const ExtMachInst inst) 15212849Sar4jc@virginia.edu : InstFault("Unimplemented instruction", inst), 15312848Sar4jc@virginia.edu instName(name) 15411723Sar4jc@virginia.edu {} 15511723Sar4jc@virginia.edu 15612848Sar4jc@virginia.edu void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override; 15711723Sar4jc@virginia.edu}; 15811723Sar4jc@virginia.edu 15912849Sar4jc@virginia.educlass IllegalFrmFault: public InstFault 16011725Sar4jc@virginia.edu{ 16111725Sar4jc@virginia.edu private: 16211725Sar4jc@virginia.edu const uint8_t frm; 16312848Sar4jc@virginia.edu 16411725Sar4jc@virginia.edu public: 16512849Sar4jc@virginia.edu IllegalFrmFault(uint8_t r, const ExtMachInst inst) 16612849Sar4jc@virginia.edu : InstFault("Illegal floating-point rounding mode", inst), 16712848Sar4jc@virginia.edu frm(r) 16811725Sar4jc@virginia.edu {} 16911725Sar4jc@virginia.edu 17012848Sar4jc@virginia.edu void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override; 17111725Sar4jc@virginia.edu}; 17211725Sar4jc@virginia.edu 17312849Sar4jc@virginia.educlass AddressFault : public RiscvFault 17412849Sar4jc@virginia.edu{ 17512849Sar4jc@virginia.edu private: 17612849Sar4jc@virginia.edu const Addr _addr; 17712849Sar4jc@virginia.edu 17812849Sar4jc@virginia.edu public: 17912849Sar4jc@virginia.edu AddressFault(const Addr addr, ExceptionCode code) 18012849Sar4jc@virginia.edu : RiscvFault("Address", false, code), _addr(addr) 18112849Sar4jc@virginia.edu {} 18212849Sar4jc@virginia.edu 18312849Sar4jc@virginia.edu MiscReg trap_value() const override { return _addr; } 18412849Sar4jc@virginia.edu}; 18512849Sar4jc@virginia.edu 18611723Sar4jc@virginia.educlass BreakpointFault : public RiscvFault 18711723Sar4jc@virginia.edu{ 18812849Sar4jc@virginia.edu private: 18912849Sar4jc@virginia.edu const PCState pcState; 19012849Sar4jc@virginia.edu 19111723Sar4jc@virginia.edu public: 19212849Sar4jc@virginia.edu BreakpointFault(const PCState &pc) 19312849Sar4jc@virginia.edu : RiscvFault("Breakpoint", false, BREAKPOINT), pcState(pc) 19412849Sar4jc@virginia.edu {} 19512849Sar4jc@virginia.edu 19612849Sar4jc@virginia.edu MiscReg trap_value() const override { return pcState.pc(); } 19712848Sar4jc@virginia.edu void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override; 19811723Sar4jc@virginia.edu}; 19911723Sar4jc@virginia.edu 20011723Sar4jc@virginia.educlass SyscallFault : public RiscvFault 20111723Sar4jc@virginia.edu{ 20211723Sar4jc@virginia.edu public: 20312850Salec.roelke@gmail.com SyscallFault(PrivilegeMode prv) 20412850Salec.roelke@gmail.com : RiscvFault("System call", false, ECALL_USER) 20512850Salec.roelke@gmail.com { 20612850Salec.roelke@gmail.com switch (prv) { 20712850Salec.roelke@gmail.com case PRV_U: 20812850Salec.roelke@gmail.com _code = ECALL_USER; 20912850Salec.roelke@gmail.com break; 21012850Salec.roelke@gmail.com case PRV_S: 21112850Salec.roelke@gmail.com _code = ECALL_SUPER; 21212850Salec.roelke@gmail.com break; 21312850Salec.roelke@gmail.com case PRV_M: 21412850Salec.roelke@gmail.com _code = ECALL_MACHINE; 21512850Salec.roelke@gmail.com break; 21612850Salec.roelke@gmail.com default: 21712850Salec.roelke@gmail.com panic("Unknown privilege mode %d.", prv); 21812850Salec.roelke@gmail.com break; 21912850Salec.roelke@gmail.com } 22012850Salec.roelke@gmail.com } 22112850Salec.roelke@gmail.com 22212848Sar4jc@virginia.edu void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override; 22311723Sar4jc@virginia.edu}; 22411723Sar4jc@virginia.edu 22511723Sar4jc@virginia.edu} // namespace RiscvISA 22611723Sar4jc@virginia.edu 22712850Salec.roelke@gmail.com#endif // __ARCH_RISCV_FAULTS_HH__ 228