process.cc revision 13894 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 *          Korey Sewell
31 */
32
33#include "arch/mips/process.hh"
34
35#include "arch/mips/isa_traits.hh"
36#include "base/loader/elf_object.hh"
37#include "base/loader/object_file.hh"
38#include "base/logging.hh"
39#include "cpu/thread_context.hh"
40#include "debug/Loader.hh"
41#include "mem/page_table.hh"
42#include "params/Process.hh"
43#include "sim/aux_vector.hh"
44#include "sim/process.hh"
45#include "sim/process_impl.hh"
46#include "sim/syscall_return.hh"
47#include "sim/system.hh"
48
49using namespace std;
50using namespace MipsISA;
51
52MipsProcess::MipsProcess(ProcessParams *params, ObjectFile *objFile)
53    : Process(params,
54              new EmulationPageTable(params->name, params->pid, PageBytes),
55              objFile)
56{
57    fatal_if(params->useArchPT, "Arch page tables not implemented.");
58    // Set up stack. On MIPS, stack starts at the top of kuseg
59    // user address space. MIPS stack grows down from here
60    Addr stack_base = 0x7FFFFFFF;
61
62    Addr max_stack_size = 8 * 1024 * 1024;
63
64    // Set pointer for next thread stack.  Reserve 8M for main stack.
65    Addr next_thread_stack_base = stack_base - max_stack_size;
66
67    // Set up break point (Top of Heap)
68    Addr brk_point = objFile->dataBase() + objFile->dataSize() +
69                     objFile->bssSize();
70    brk_point = roundUp(brk_point, PageBytes);
71
72    // Set up region for mmaps.  Start it 1GB above the top of the heap.
73    Addr mmap_end = brk_point + 0x40000000L;
74
75    memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
76                                     next_thread_stack_base, mmap_end);
77}
78
79void
80MipsProcess::initState()
81{
82    Process::initState();
83
84    argsInit<uint32_t>(PageBytes);
85}
86
87template<class IntType>
88void
89MipsProcess::argsInit(int pageSize)
90{
91    int intSize = sizeof(IntType);
92
93    // Patch the ld_bias for dynamic executables.
94    updateBias();
95
96    // load object file into target memory
97    objFile->loadSections(initVirtMem);
98
99    std::vector<AuxVector<IntType>> auxv;
100
101    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
102    if (elfObject)
103    {
104        // Set the system page size
105        auxv.emplace_back(M5_AT_PAGESZ, MipsISA::PageBytes);
106        // Set the frequency at which time() increments
107        auxv.emplace_back(M5_AT_CLKTCK, 100);
108        // For statically linked executables, this is the virtual
109        // address of the program header tables if they appear in the
110        // executable image.
111        auxv.emplace_back(M5_AT_PHDR, elfObject->programHeaderTable());
112        DPRINTF(Loader, "auxv at PHDR %08p\n",
113                elfObject->programHeaderTable());
114        // This is the size of a program header entry from the elf file.
115        auxv.emplace_back(M5_AT_PHENT, elfObject->programHeaderSize());
116        // This is the number of program headers from the original elf file.
117        auxv.emplace_back(M5_AT_PHNUM, elfObject->programHeaderCount());
118        // This is the base address of the ELF interpreter; it should be
119        // zero for static executables or contain the base address for
120        // dynamic executables.
121        auxv.emplace_back(M5_AT_BASE, getBias());
122        //The entry point to the program
123        auxv.emplace_back(M5_AT_ENTRY, objFile->entryPoint());
124        //Different user and group IDs
125        auxv.emplace_back(M5_AT_UID, uid());
126        auxv.emplace_back(M5_AT_EUID, euid());
127        auxv.emplace_back(M5_AT_GID, gid());
128        auxv.emplace_back(M5_AT_EGID, egid());
129    }
130
131    // Calculate how much space we need for arg & env & auxv arrays.
132    int argv_array_size = intSize * (argv.size() + 1);
133    int envp_array_size = intSize * (envp.size() + 1);
134    int auxv_array_size = intSize * 2 * (auxv.size() + 1);
135
136    int arg_data_size = 0;
137    for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
138        arg_data_size += argv[i].size() + 1;
139    }
140    int env_data_size = 0;
141    for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
142        env_data_size += envp[i].size() + 1;
143    }
144
145    int space_needed =
146        argv_array_size +
147        envp_array_size +
148        auxv_array_size +
149        arg_data_size +
150        env_data_size;
151
152    // set bottom of stack
153    memState->setStackMin(memState->getStackBase() - space_needed);
154    // align it
155    memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
156    memState->setStackSize(memState->getStackBase() - memState->getStackMin());
157    // map memory
158    allocateMem(memState->getStackMin(), roundUp(memState->getStackSize(),
159                pageSize));
160
161    // map out initial stack contents; leave room for argc
162    IntType argv_array_base = memState->getStackMin() + intSize;
163    IntType envp_array_base = argv_array_base + argv_array_size;
164    IntType auxv_array_base = envp_array_base + envp_array_size;
165    IntType arg_data_base = auxv_array_base + auxv_array_size;
166    IntType env_data_base = arg_data_base + arg_data_size;
167
168    // write contents to stack
169    IntType argc = argv.size();
170
171    argc = htog((IntType)argc);
172
173    initVirtMem.writeBlob(memState->getStackMin(), (uint8_t*)&argc, intSize);
174
175    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
176
177    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
178
179    // Copy the aux vector
180    Addr auxv_array_end = auxv_array_base;
181    for (const auto &aux: auxv) {
182        initVirtMem.write(auxv_array_end, aux, GuestByteOrder);
183        auxv_array_end += sizeof(aux);
184    }
185
186    // Write out the terminating zeroed auxilliary vector
187    const AuxVector<IntType> zero(0, 0);
188    initVirtMem.write(auxv_array_end, zero);
189    auxv_array_end += sizeof(zero);
190
191    ThreadContext *tc = system->getThreadContext(contextIds[0]);
192
193    setSyscallArg(tc, 0, argc);
194    setSyscallArg(tc, 1, argv_array_base);
195    tc->setIntReg(StackPointerReg, memState->getStackMin());
196
197    tc->pcState(getStartPC());
198}
199
200
201RegVal
202MipsProcess::getSyscallArg(ThreadContext *tc, int &i)
203{
204    assert(i < 6);
205    return tc->readIntReg(FirstArgumentReg + i++);
206}
207
208void
209MipsProcess::setSyscallArg(ThreadContext *tc, int i, RegVal val)
210{
211    assert(i < 6);
212    tc->setIntReg(FirstArgumentReg + i, val);
213}
214
215void
216MipsProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
217{
218    if (sysret.successful()) {
219        // no error
220        tc->setIntReg(SyscallSuccessReg, 0);
221        tc->setIntReg(ReturnValueReg, sysret.returnValue());
222    } else {
223        // got an error, return details
224        tc->setIntReg(SyscallSuccessReg, (uint32_t)(-1));
225        tc->setIntReg(ReturnValueReg, sysret.errnoValue());
226    }
227}
228