decoder.isa revision 2742
12686Sksewell@umich.edu// -*- mode:c++ -*- 22100SN/A 32706Sksewell@umich.edu// Copyright (c) 2003-2006 The Regents of The University of Michigan 42706Sksewell@umich.edu// All rights reserved. 52706Sksewell@umich.edu// 62706Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without 72706Sksewell@umich.edu// modification, are permitted provided that the following conditions are 82706Sksewell@umich.edu// met: redistributions of source code must retain the above copyright 92706Sksewell@umich.edu// notice, this list of conditions and the following disclaimer; 102706Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright 112706Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the 122706Sksewell@umich.edu// documentation and/or other materials provided with the distribution; 132706Sksewell@umich.edu// neither the name of the copyright holders nor the names of its 142706Sksewell@umich.edu// contributors may be used to endorse or promote products derived from 152706Sksewell@umich.edu// this software without specific prior written permission. 162706Sksewell@umich.edu// 172706Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182706Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192706Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202706Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212706Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222706Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232706Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242706Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252706Sksewell@umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262706Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272706Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282706Sksewell@umich.edu// 292706Sksewell@umich.edu// Authors: Korey Sewell 302706Sksewell@umich.edu 312022SN/A//////////////////////////////////////////////////////////////////// 322022SN/A// 332043SN/A// The actual MIPS32 ISA decoder 342024SN/A// ----------------------------- 352024SN/A// The following instructions are specified in the MIPS32 ISA 362043SN/A// Specification. Decoding closely follows the style specified 372686Sksewell@umich.edu// in the MIPS32 ISA specification document starting with Table 382024SN/A// A-2 (document available @ www.mips.com) 392022SN/A// 402083SN/Adecode OPCODE_HI default Unknown::unknown() { 412686Sksewell@umich.edu //Table A-2 422101SN/A 0x0: decode OPCODE_LO { 432043SN/A 0x0: decode FUNCTION_HI { 442043SN/A 0x0: decode FUNCTION_LO { 452101SN/A 0x1: decode MOVCI { 462101SN/A format BasicOp { 472686Sksewell@umich.edu 0: movf({{ Rd = (getCondCode(FCSR, CC) == 0) ? Rd : Rs; }}); 482686Sksewell@umich.edu 1: movt({{ Rd = (getCondCode(FCSR, CC) == 1) ? Rd : Rs; }}); 492101SN/A } 502101SN/A } 512101SN/A 522046SN/A format BasicOp { 532686Sksewell@umich.edu //Table A-3 Note: "Specific encodings of the rd, rs, and 542686Sksewell@umich.edu //rt fields are used to distinguish SLL, SSNOP, and EHB 552686Sksewell@umich.edu //functions 562470SN/A 0x0: decode RS { 572686Sksewell@umich.edu 0x0: decode RT_RD { 582686Sksewell@umich.edu 0x0: decode SA default Nop::nop(){ 592686Sksewell@umich.edu 0x1: WarnUnimpl::ssnop(); 602686Sksewell@umich.edu 0x3: WarnUnimpl::ehb(); 612686Sksewell@umich.edu } 622686Sksewell@umich.edu default: sll({{ Rd = Rt.uw << SA; }}); 632470SN/A } 642241SN/A } 652101SN/A 662495SN/A 0x2: decode RS_SRL { 672495SN/A 0x0:decode SRL { 682495SN/A 0: srl({{ Rd = Rt.uw >> SA; }}); 692101SN/A 702495SN/A //Hardcoded assuming 32-bit ISA, probably need parameter here 712495SN/A 1: rotr({{ Rd = (Rt.uw << (32 - SA)) | (Rt.uw >> SA);}}); 722495SN/A } 732101SN/A } 742101SN/A 752495SN/A 0x3: decode RS { 762495SN/A 0x0: sra({{ 772495SN/A uint32_t temp = Rt >> SA; 782495SN/A if ( (Rt & 0x80000000) > 0 ) { 792495SN/A uint32_t mask = 0x80000000; 802495SN/A for(int i=0; i < SA; i++) { 812495SN/A temp |= mask; 822495SN/A mask = mask >> 1; 832495SN/A } 842495SN/A } 852495SN/A Rd = temp; 862495SN/A }}); 872495SN/A } 882101SN/A 892101SN/A 0x4: sllv({{ Rd = Rt.uw << Rs<4:0>; }}); 902101SN/A 912101SN/A 0x6: decode SRLV { 922101SN/A 0: srlv({{ Rd = Rt.uw >> Rs<4:0>; }}); 932101SN/A 942101SN/A //Hardcoded assuming 32-bit ISA, probably need parameter here 952101SN/A 1: rotrv({{ Rd = (Rt.uw << (32 - Rs<4:0>)) | (Rt.uw >> Rs<4:0>);}}); 962101SN/A } 972101SN/A 982495SN/A 0x7: srav({{ 992495SN/A int shift_amt = Rs<4:0>; 1002495SN/A 1012495SN/A uint32_t temp = Rt >> shift_amt; 1022495SN/A 1032495SN/A if ( (Rt & 0x80000000) > 0 ) { 1042495SN/A uint32_t mask = 0x80000000; 1052495SN/A for(int i=0; i < shift_amt; i++) { 1062495SN/A temp |= mask; 1072495SN/A mask = mask >> 1; 1082495SN/A } 1092495SN/A } 1102495SN/A 1112495SN/A Rd = temp; 1122495SN/A }}); 1132043SN/A } 1142043SN/A } 1152025SN/A 1162043SN/A 0x1: decode FUNCTION_LO { 1172686Sksewell@umich.edu //Table A-3 Note: "Specific encodings of the hint field are 1182686Sksewell@umich.edu //used to distinguish JR from JR.HB and JALR from JALR.HB" 1192123SN/A format Jump { 1202101SN/A 0x0: decode HINT { 1212686Sksewell@umich.edu 0x1: jr_hb({{ NNPC = Rs & ~1; }}, IsReturn, ClearHazards); 1222686Sksewell@umich.edu default: jr({{ NNPC = Rs & ~1; }}, IsReturn); 1232101SN/A } 1242042SN/A 1252101SN/A 0x1: decode HINT { 1262686Sksewell@umich.edu 0x1: jalr_hb({{ Rd = NNPC; NNPC = Rs; }}, IsCall, Link 1272686Sksewell@umich.edu , ClearHazards); 1282686Sksewell@umich.edu default: jalr({{ Rd = NNPC; NNPC = Rs; }}, IsCall, 1292686Sksewell@umich.edu Link); 1302101SN/A } 1312101SN/A } 1322042SN/A 1332101SN/A format BasicOp { 1342686Sksewell@umich.edu 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 1352686Sksewell@umich.edu 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); 1362686Sksewell@umich.edu 0x4: syscall({{ xc->syscall(R2); }}, IsNonSpeculative); 1372686Sksewell@umich.edu 0x7: sync({{ ; }}, IsMemBarrier); 1382101SN/A } 1392083SN/A 1402686Sksewell@umich.edu format FailUnimpl { 1412686Sksewell@umich.edu 0x5: break(); 1422101SN/A } 1432043SN/A } 1442025SN/A 1452043SN/A 0x2: decode FUNCTION_LO { 1462686Sksewell@umich.edu format HiLoMiscOp { 1472616SN/A 0x0: mfhi({{ Rd = HI; }}); 1482616SN/A 0x1: mthi({{ HI = Rs; }}); 1492616SN/A 0x2: mflo({{ Rd = LO; }}); 1502616SN/A 0x3: mtlo({{ LO = Rs; }}); 1512101SN/A } 1522083SN/A } 1532025SN/A 1542043SN/A 0x3: decode FUNCTION_LO { 1552686Sksewell@umich.edu format HiLoOp { 1562686Sksewell@umich.edu 0x0: mult({{ val = Rs.sd * Rt.sd; }}); 1572686Sksewell@umich.edu 0x1: multu({{ val = Rs.ud * Rt.ud; }}); 1582686Sksewell@umich.edu } 1592025SN/A 1602686Sksewell@umich.edu format HiLoMiscOp { 1612742Sksewell@umich.edu 0x2: div({{ if (Rt.sd != 0) { 1622742Sksewell@umich.edu HI = Rs.sd % Rt.sd; 1632742Sksewell@umich.edu LO = Rs.sd / Rt.sd; 1642742Sksewell@umich.edu } 1652742Sksewell@umich.edu }}); 1662742Sksewell@umich.edu 0x3: divu({{ if (Rt.ud != 0) { 1672742Sksewell@umich.edu HI = Rs.ud % Rt.ud; 1682742Sksewell@umich.edu LO = Rs.ud / Rt.ud; 1692742Sksewell@umich.edu } 1702742Sksewell@umich.edu }}); 1712101SN/A } 1722084SN/A } 1732025SN/A 1742495SN/A 0x4: decode HINT { 1752495SN/A 0x0: decode FUNCTION_LO { 1762495SN/A format IntOp { 1772616SN/A 0x0: add({{ Rd.sw = Rs.sw + Rt.sw; /*Trap on Overflow*/}}); 1782495SN/A 0x1: addu({{ Rd.sw = Rs.sw + Rt.sw;}}); 1792616SN/A 0x2: sub({{ Rd.sw = Rs.sw - Rt.sw; /*Trap on Overflow*/}}); 1802495SN/A 0x3: subu({{ Rd.sw = Rs.sw - Rt.sw;}}); 1812495SN/A 0x4: and({{ Rd = Rs & Rt;}}); 1822495SN/A 0x5: or({{ Rd = Rs | Rt;}}); 1832495SN/A 0x6: xor({{ Rd = Rs ^ Rt;}}); 1842495SN/A 0x7: nor({{ Rd = ~(Rs | Rt);}}); 1852495SN/A } 1862101SN/A } 1872043SN/A } 1882025SN/A 1892495SN/A 0x5: decode HINT { 1902495SN/A 0x0: decode FUNCTION_LO { 1912495SN/A format IntOp{ 1922495SN/A 0x2: slt({{ Rd.sw = ( Rs.sw < Rt.sw ) ? 1 : 0}}); 1932495SN/A 0x3: sltu({{ Rd.uw = ( Rs.uw < Rt.uw ) ? 1 : 0}}); 1942495SN/A } 1952101SN/A } 1962084SN/A } 1972024SN/A 1982043SN/A 0x6: decode FUNCTION_LO { 1992239SN/A format Trap { 2002239SN/A 0x0: tge({{ cond = (Rs.sw >= Rt.sw); }}); 2012101SN/A 0x1: tgeu({{ cond = (Rs.uw >= Rt.uw); }}); 2022101SN/A 0x2: tlt({{ cond = (Rs.sw < Rt.sw); }}); 2032101SN/A 0x3: tltu({{ cond = (Rs.uw >= Rt.uw); }}); 2042101SN/A 0x4: teq({{ cond = (Rs.sw == Rt.sw); }}); 2052101SN/A 0x6: tne({{ cond = (Rs.sw != Rt.sw); }}); 2062101SN/A } 2072043SN/A } 2082043SN/A } 2092025SN/A 2102043SN/A 0x1: decode REGIMM_HI { 2112043SN/A 0x0: decode REGIMM_LO { 2122101SN/A format Branch { 2132101SN/A 0x0: bltz({{ cond = (Rs.sw < 0); }}); 2142101SN/A 0x1: bgez({{ cond = (Rs.sw >= 0); }}); 2152686Sksewell@umich.edu 0x2: bltzl({{ cond = (Rs.sw < 0); }}, Likely); 2162686Sksewell@umich.edu 0x3: bgezl({{ cond = (Rs.sw >= 0); }}, Likely); 2172101SN/A } 2182043SN/A } 2192025SN/A 2202043SN/A 0x1: decode REGIMM_LO { 2212239SN/A format Trap { 2222101SN/A 0x0: tgei( {{ cond = (Rs.sw >= INTIMM); }}); 2232104SN/A 0x1: tgeiu({{ cond = (Rs.uw >= INTIMM); }}); 2242101SN/A 0x2: tlti( {{ cond = (Rs.sw < INTIMM); }}); 2252101SN/A 0x3: tltiu({{ cond = (Rs.uw < INTIMM); }}); 2262101SN/A 0x4: teqi( {{ cond = (Rs.sw == INTIMM);}}); 2272101SN/A 0x6: tnei( {{ cond = (Rs.sw != INTIMM);}}); 2282101SN/A } 2292043SN/A } 2302043SN/A 2312043SN/A 0x2: decode REGIMM_LO { 2322101SN/A format Branch { 2332686Sksewell@umich.edu 0x0: bltzal({{ cond = (Rs.sw < 0); }}, Link); 2342686Sksewell@umich.edu 0x1: decode RS { 2352686Sksewell@umich.edu 0x0: bal ({{ cond = 1; }}, IsCall, Link); 2362686Sksewell@umich.edu default: bgezal({{ cond = (Rs.sw >= 0); }}, Link); 2372686Sksewell@umich.edu } 2382686Sksewell@umich.edu 0x2: bltzall({{ cond = (Rs.sw < 0); }}, Link, Likely); 2392686Sksewell@umich.edu 0x3: bgezall({{ cond = (Rs.sw >= 0); }}, Link, Likely); 2402101SN/A } 2412043SN/A } 2422043SN/A 2432043SN/A 0x3: decode REGIMM_LO { 2442101SN/A format WarnUnimpl { 2452101SN/A 0x7: synci(); 2462101SN/A } 2472043SN/A } 2482043SN/A } 2492043SN/A 2502123SN/A format Jump { 2512239SN/A 0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2);}}); 2522686Sksewell@umich.edu 0x3: jal({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}, IsCall, 2532686Sksewell@umich.edu Link); 2542043SN/A } 2552043SN/A 2562100SN/A format Branch { 2572686Sksewell@umich.edu 0x4: decode RS_RT { 2582686Sksewell@umich.edu 0x0: b({{ cond = 1; }}); 2592686Sksewell@umich.edu default: beq({{ cond = (Rs.sw == Rt.sw); }}); 2602686Sksewell@umich.edu } 2612239SN/A 0x5: bne({{ cond = (Rs.sw != Rt.sw); }}); 2622686Sksewell@umich.edu 0x6: blez({{ cond = (Rs.sw <= 0); }}); 2632686Sksewell@umich.edu 0x7: bgtz({{ cond = (Rs.sw > 0); }}); 2642043SN/A } 2652084SN/A } 2662024SN/A 2672101SN/A 0x1: decode OPCODE_LO { 2682686Sksewell@umich.edu format IntImmOp { 2692239SN/A 0x0: addi({{ Rt.sw = Rs.sw + imm; /*Trap If Overflow*/}}); 2702239SN/A 0x1: addiu({{ Rt.sw = Rs.sw + imm;}}); 2712239SN/A 0x2: slti({{ Rt.sw = ( Rs.sw < imm) ? 1 : 0 }}); 2722495SN/A 0x3: sltiu({{ Rt.uw = ( Rs.uw < (uint32_t)sextImm ) ? 1 : 0 }}); 2732495SN/A 0x4: andi({{ Rt.sw = Rs.sw & zextImm;}}); 2742495SN/A 0x5: ori({{ Rt.sw = Rs.sw | zextImm;}}); 2752495SN/A 0x6: xori({{ Rt.sw = Rs.sw ^ zextImm;}}); 2762495SN/A 2772495SN/A 0x7: decode RS { 2782495SN/A 0x0: lui({{ Rt = imm << 16}}); 2792495SN/A } 2802084SN/A } 2812084SN/A } 2822024SN/A 2832101SN/A 0x2: decode OPCODE_LO { 2842101SN/A //Table A-11 MIPS32 COP0 Encoding of rs Field 2852101SN/A 0x0: decode RS_MSB { 2862101SN/A 0x0: decode RS { 2872686Sksewell@umich.edu format CP0Control { 2882686Sksewell@umich.edu 0x0: mfc0({{ Rt = xc->readMiscReg(RD << 5 | SEL); }}); 2892686Sksewell@umich.edu 0x4: mtc0({{ xc->setMiscReg(RD << 5 | SEL, Rt); }}); 2902686Sksewell@umich.edu } 2912052SN/A 2922686Sksewell@umich.edu format MipsMT { 2932686Sksewell@umich.edu 0x8: mftr(); 2942686Sksewell@umich.edu 0xC: mttr(); 2952101SN/A 0xB: decode RD { 2962101SN/A 0x0: decode SC { 2972686Sksewell@umich.edu 0x0: dvpe(); 2982686Sksewell@umich.edu 0x1: evpe(); 2992101SN/A } 3002101SN/A 0x1: decode SC { 3012686Sksewell@umich.edu 0x0: dmt(); 3022686Sksewell@umich.edu 0x1: emt(); 3032686Sksewell@umich.edu 0xC: decode SC { 3042686Sksewell@umich.edu 0x0: di(); 3052686Sksewell@umich.edu 0x1: ei(); 3062686Sksewell@umich.edu } 3072101SN/A } 3082101SN/A } 3092686Sksewell@umich.edu } 3102027SN/A 3112686Sksewell@umich.edu format FailUnimpl { 3122686Sksewell@umich.edu 0xA: rdpgpr(); 3132686Sksewell@umich.edu 0xE: wrpgpr(); 3142101SN/A } 3152101SN/A } 3162101SN/A 3172101SN/A //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO 3182101SN/A 0x1: decode FUNCTION { 3192686Sksewell@umich.edu format FailUnimpl { 3202686Sksewell@umich.edu 0x01: tlbr(); 3212686Sksewell@umich.edu 0x02: tlbwi(); 3222686Sksewell@umich.edu 0x06: tlbwr(); 3232686Sksewell@umich.edu 0x08: tlbp(); 3242101SN/A 3252101SN/A 0x18: eret(); 3262101SN/A 0x1F: deret(); 3272101SN/A 0x20: wait(); 3282101SN/A } 3292101SN/A } 3302043SN/A } 3312027SN/A 3322101SN/A //Table A-13 MIPS32 COP1 Encoding of rs Field 3332101SN/A 0x1: decode RS_MSB { 3342041SN/A 3352101SN/A 0x0: decode RS_HI { 3362101SN/A 0x0: decode RS_LO { 3372686Sksewell@umich.edu format CP1Control { 3382742Sksewell@umich.edu 0x0: mfc1 ({{ Rt.uw = Fs.uw; }}); 3392495SN/A 3402495SN/A 0x2: cfc1({{ 3412573SN/A switch (FS) 3422573SN/A { 3432573SN/A case 0: 3442616SN/A Rt = FIR; 3452573SN/A break; 3462573SN/A case 25: 3472616SN/A Rt = 0 | (FCSR & 0xFE000000) >> 24 | (FCSR & 0x00800000) >> 23; 3482573SN/A break; 3492573SN/A case 26: 3502616SN/A Rt = 0 | (FCSR & 0x0003F07C); 3512573SN/A break; 3522573SN/A case 28: 3532616SN/A Rt = 0 | (FCSR & 0x00000F80) | (FCSR & 0x01000000) >> 21 | (FCSR & 0x00000003); 3542573SN/A break; 3552573SN/A case 31: 3562616SN/A Rt = FCSR; 3572573SN/A break; 3582573SN/A default: 3592686Sksewell@umich.edu panic("FP Control Value (%d) Not Valid"); 3602573SN/A } 3612573SN/A }}); 3622573SN/A 3632686Sksewell@umich.edu 0x3: mfhc1({{ Rt.uw = Fs.ud<63:32>;}}); 3642686Sksewell@umich.edu 3652686Sksewell@umich.edu 0x4: mtc1 ({{ Fs.uw = Rt.uw; }}); 3662686Sksewell@umich.edu 3672573SN/A 0x6: ctc1({{ 3682573SN/A switch (FS) 3692573SN/A { 3702573SN/A case 25: 3712616SN/A FCSR = 0 | (Rt.uw<7:1> << 25) // move 31...25 3722616SN/A | (FCSR & 0x01000000) // bit 24 3732616SN/A | (FCSR & 0x004FFFFF);// bit 22...0 3742573SN/A break; 3752573SN/A 3762573SN/A case 26: 3772616SN/A FCSR = 0 | (FCSR & 0xFFFC0000) // move 31...18 3782573SN/A | Rt.uw<17:12> << 12 // bit 17...12 3792616SN/A | (FCSR & 0x00000F80) << 7// bit 11...7 3802573SN/A | Rt.uw<6:2> << 2 // bit 6...2 3812616SN/A | (FCSR & 0x00000002); // bit 1...0 3822573SN/A break; 3832573SN/A 3842573SN/A case 28: 3852616SN/A FCSR = 0 | (FCSR & 0xFE000000) // move 31...25 3862573SN/A | Rt.uw<2:2> << 24 // bit 24 3872616SN/A | (FCSR & 0x00FFF000) << 23// bit 23...12 3882573SN/A | Rt.uw<11:7> << 7 // bit 24 3892616SN/A | (FCSR & 0x000007E) 3902573SN/A | Rt.uw<1:0>;// bit 22...0 3912573SN/A break; 3922573SN/A 3932573SN/A case 31: 3942616SN/A FCSR = Rt.uw; 3952573SN/A break; 3962573SN/A 3972573SN/A default: 3982495SN/A panic("FP Control Value (%d) Not Available. Ignoring Access to" 3992616SN/A "Floating Control Status Register", FS); 4002495SN/A } 4012495SN/A }}); 4022686Sksewell@umich.edu 4032686Sksewell@umich.edu 0x7: mthc1({{ 4042686Sksewell@umich.edu uint64_t fs_hi = Rt.uw; 4052686Sksewell@umich.edu uint64_t fs_lo = Fs.ud & 0x0FFFFFFFF; 4062686Sksewell@umich.edu Fs.ud = (fs_hi << 32) | fs_lo; 4072686Sksewell@umich.edu }}); 4082686Sksewell@umich.edu 4092101SN/A } 4102101SN/A } 4112025SN/A 4122101SN/A 0x1: decode ND { 4132686Sksewell@umich.edu format Branch { 4142686Sksewell@umich.edu 0x0: decode TF { 4152686Sksewell@umich.edu 0x0: bc1f({{ cond = getCondCode(FCSR, BRANCH_CC) == 0; 4162686Sksewell@umich.edu }}); 4172686Sksewell@umich.edu 0x1: bc1t({{ cond = getCondCode(FCSR, BRANCH_CC) == 1; 4182686Sksewell@umich.edu }}); 4192101SN/A } 4202686Sksewell@umich.edu 0x1: decode TF { 4212686Sksewell@umich.edu 0x0: bc1fl({{ cond = getCondCode(FCSR, BRANCH_CC) == 0; 4222686Sksewell@umich.edu }}, Likely); 4232686Sksewell@umich.edu 0x1: bc1tl({{ cond = getCondCode(FCSR, BRANCH_CC) == 1; 4242686Sksewell@umich.edu }}, Likely); 4252101SN/A } 4262101SN/A } 4272101SN/A } 4282043SN/A } 4292027SN/A 4302101SN/A 0x1: decode RS_HI { 4312101SN/A 0x2: decode RS_LO { 4322101SN/A //Table A-14 MIPS32 COP1 Encoding of Function Field When rs=S 4332686Sksewell@umich.edu //(( single-precision floating point)) 4342572SN/A 0x0: decode FUNCTION_HI { 4352572SN/A 0x0: decode FUNCTION_LO { 4362101SN/A format FloatOp { 4372601SN/A 0x0: add_s({{ Fd.sf = Fs.sf + Ft.sf;}}); 4382601SN/A 0x1: sub_s({{ Fd.sf = Fs.sf - Ft.sf;}}); 4392601SN/A 0x2: mul_s({{ Fd.sf = Fs.sf * Ft.sf;}}); 4402601SN/A 0x3: div_s({{ Fd.sf = Fs.sf / Ft.sf;}}); 4412601SN/A 0x4: sqrt_s({{ Fd.sf = sqrt(Fs.sf);}}); 4422601SN/A 0x5: abs_s({{ Fd.sf = fabs(Fs.sf);}}); 4432686Sksewell@umich.edu 0x7: neg_s({{ Fd.sf = -Fs.sf;}}); 4442101SN/A } 4452742Sksewell@umich.edu 4462742Sksewell@umich.edu 0x6: BasicOp::mov_s({{ Fd.sf = Fs.sf;}}); 4472101SN/A } 4482027SN/A 4492572SN/A 0x1: decode FUNCTION_LO { 4502686Sksewell@umich.edu format FloatConvertOp { 4512686Sksewell@umich.edu 0x0: round_l_s({{ val = Fs.sf; }}, ToLong, 4522686Sksewell@umich.edu Round); 4532686Sksewell@umich.edu 0x1: trunc_l_s({{ val = Fs.sf; }}, ToLong, 4542686Sksewell@umich.edu Trunc); 4552686Sksewell@umich.edu 0x2: ceil_l_s({{ val = Fs.sf; }}, ToLong, 4562686Sksewell@umich.edu Ceil); 4572686Sksewell@umich.edu 0x3: floor_l_s({{ val = Fs.sf; }}, ToLong, 4582686Sksewell@umich.edu Floor); 4592686Sksewell@umich.edu 0x4: round_w_s({{ val = Fs.sf; }}, ToWord, 4602686Sksewell@umich.edu Round); 4612686Sksewell@umich.edu 0x5: trunc_w_s({{ val = Fs.sf; }}, ToWord, 4622686Sksewell@umich.edu Trunc); 4632686Sksewell@umich.edu 0x6: ceil_w_s({{ val = Fs.sf; }}, ToWord, 4642686Sksewell@umich.edu Ceil); 4652686Sksewell@umich.edu 0x7: floor_w_s({{ val = Fs.sf; }}, ToWord, 4662686Sksewell@umich.edu Floor); 4672101SN/A } 4682101SN/A } 4692027SN/A 4702572SN/A 0x2: decode FUNCTION_LO { 4712101SN/A 0x1: decode MOVCF { 4722686Sksewell@umich.edu format BasicOp { 4732686Sksewell@umich.edu 0x0: movf_s({{ Fd = (getCondCode(FCSR,CC) == 0) ? Fs : Fd; }}); 4742686Sksewell@umich.edu 0x1: movt_s({{ Fd = (getCondCode(FCSR,CC) == 1) ? Fs : Fd; }}); 4752101SN/A } 4762101SN/A } 4772027SN/A 4782686Sksewell@umich.edu format BasicOp { 4792686Sksewell@umich.edu 0x2: movz_s({{ Fd = (Rt == 0) ? Fs : Fd; }}); 4802686Sksewell@umich.edu 0x3: movn_s({{ Fd = (Rt != 0) ? Fs : Fd; }}); 4812686Sksewell@umich.edu } 4822686Sksewell@umich.edu 4832602SN/A format FloatOp { 4842602SN/A 0x5: recip_s({{ Fd = 1 / Fs; }}); 4852602SN/A 0x6: rsqrt_s({{ Fd = 1 / sqrt(Fs);}}); 4862101SN/A } 4872101SN/A } 4882027SN/A 4892572SN/A 0x4: decode FUNCTION_LO { 4902603SN/A format FloatConvertOp { 4912686Sksewell@umich.edu 0x1: cvt_d_s({{ val = Fs.sf; }}, ToDouble); 4922686Sksewell@umich.edu 0x4: cvt_w_s({{ val = Fs.sf; }}, ToWord); 4932686Sksewell@umich.edu 0x5: cvt_l_s({{ val = Fs.sf; }}, ToLong); 4942101SN/A } 4952055SN/A 4962686Sksewell@umich.edu 0x6: FloatOp::cvt_ps_s({{ 4972686Sksewell@umich.edu Fd.ud = (uint64_t) Fs.uw << 32 | 4982686Sksewell@umich.edu (uint64_t) Ft.uw; 4992101SN/A }}); 5002101SN/A } 5012602SN/A 5022602SN/A 0x6: decode FUNCTION_LO { 5032603SN/A format FloatCompareOp { 5042686Sksewell@umich.edu 0x0: c_f_s({{ cond = 0; }}, SinglePrecision, 5052686Sksewell@umich.edu UnorderedFalse); 5062686Sksewell@umich.edu 0x1: c_un_s({{ cond = 0; }}, SinglePrecision, 5072686Sksewell@umich.edu UnorderedTrue); 5082686Sksewell@umich.edu 0x2: c_eq_s({{ cond = (Fs.sf == Ft.sf); }}, 5092686Sksewell@umich.edu UnorderedFalse); 5102686Sksewell@umich.edu 0x3: c_ueq_s({{ cond = (Fs.sf == Ft.sf); }}, 5112686Sksewell@umich.edu UnorderedTrue); 5122686Sksewell@umich.edu 0x4: c_olt_s({{ cond = (Fs.sf < Ft.sf); }}, 5132686Sksewell@umich.edu UnorderedFalse); 5142686Sksewell@umich.edu 0x5: c_ult_s({{ cond = (Fs.sf < Ft.sf); }}, 5152686Sksewell@umich.edu UnorderedTrue); 5162686Sksewell@umich.edu 0x6: c_ole_s({{ cond = (Fs.sf <= Ft.sf); }}, 5172686Sksewell@umich.edu UnorderedFalse); 5182686Sksewell@umich.edu 0x7: c_ule_s({{ cond = (Fs.sf <= Ft.sf); }}, 5192686Sksewell@umich.edu UnorderedTrue); 5202602SN/A } 5212602SN/A } 5222602SN/A 5232602SN/A 0x7: decode FUNCTION_LO { 5242686Sksewell@umich.edu format FloatCompareOp { 5252686Sksewell@umich.edu 0x0: c_sf_s({{ cond = 0; }}, SinglePrecision, 5262686Sksewell@umich.edu UnorderedFalse, QnanException); 5272686Sksewell@umich.edu 0x1: c_ngle_s({{ cond = 0; }}, SinglePrecision, 5282686Sksewell@umich.edu UnorderedTrue, QnanException); 5292686Sksewell@umich.edu 0x2: c_seq_s({{ cond = (Fs.sf == Ft.sf);}}, 5302686Sksewell@umich.edu UnorderedFalse, QnanException); 5312686Sksewell@umich.edu 0x3: c_ngl_s({{ cond = (Fs.sf == Ft.sf); }}, 5322686Sksewell@umich.edu UnorderedTrue, QnanException); 5332686Sksewell@umich.edu 0x4: c_lt_s({{ cond = (Fs.sf < Ft.sf); }}, 5342686Sksewell@umich.edu UnorderedFalse, QnanException); 5352686Sksewell@umich.edu 0x5: c_nge_s({{ cond = (Fs.sf < Ft.sf); }}, 5362686Sksewell@umich.edu UnorderedTrue, QnanException); 5372686Sksewell@umich.edu 0x6: c_le_s({{ cond = (Fs.sf <= Ft.sf); }}, 5382686Sksewell@umich.edu UnorderedFalse, QnanException); 5392686Sksewell@umich.edu 0x7: c_ngt_s({{ cond = (Fs.sf <= Ft.sf); }}, 5402686Sksewell@umich.edu UnorderedTrue, QnanException); 5412602SN/A } 5422602SN/A } 5432101SN/A } 5442055SN/A 5452101SN/A //Table A-15 MIPS32 COP1 Encoding of Function Field When rs=D 5462572SN/A 0x1: decode FUNCTION_HI { 5472572SN/A 0x0: decode FUNCTION_LO { 5482101SN/A format FloatOp { 5492686Sksewell@umich.edu 0x0: add_d({{ Fd.df = Fs.df + Ft.df; }}); 5502686Sksewell@umich.edu 0x1: sub_d({{ Fd.df = Fs.df - Ft.df; }}); 5512686Sksewell@umich.edu 0x2: mul_d({{ Fd.df = Fs.df * Ft.df; }}); 5522686Sksewell@umich.edu 0x3: div_d({{ Fd.df = Fs.df / Ft.df; }}); 5532686Sksewell@umich.edu 0x4: sqrt_d({{ Fd.df = sqrt(Fs.df); }}); 5542686Sksewell@umich.edu 0x5: abs_d({{ Fd.df = fabs(Fs.df); }}); 5552686Sksewell@umich.edu 0x7: neg_d({{ Fd.df = -1 * Fs.df; }}); 5562101SN/A } 5572742Sksewell@umich.edu 5582742Sksewell@umich.edu 0x6: BasicOp::mov_d({{ Fd.df = Fs.df; }}); 5592101SN/A } 5602027SN/A 5612572SN/A 0x1: decode FUNCTION_LO { 5622686Sksewell@umich.edu format FloatConvertOp { 5632686Sksewell@umich.edu 0x0: round_l_d({{ val = Fs.df; }}, ToLong, 5642686Sksewell@umich.edu Round); 5652686Sksewell@umich.edu 0x1: trunc_l_d({{ val = Fs.df; }}, ToLong, 5662686Sksewell@umich.edu Trunc); 5672686Sksewell@umich.edu 0x2: ceil_l_d({{ val = Fs.df; }}, ToLong, 5682686Sksewell@umich.edu Ceil); 5692686Sksewell@umich.edu 0x3: floor_l_d({{ val = Fs.df; }}, ToLong, 5702686Sksewell@umich.edu Floor); 5712686Sksewell@umich.edu 0x4: round_w_d({{ val = Fs.df; }}, ToWord, 5722686Sksewell@umich.edu Round); 5732686Sksewell@umich.edu 0x5: trunc_w_d({{ val = Fs.df; }}, ToWord, 5742686Sksewell@umich.edu Trunc); 5752686Sksewell@umich.edu 0x6: ceil_w_d({{ val = Fs.df; }}, ToWord, 5762686Sksewell@umich.edu Ceil); 5772686Sksewell@umich.edu 0x7: floor_w_d({{ val = Fs.df; }}, ToWord, 5782686Sksewell@umich.edu Floor); 5792101SN/A } 5802101SN/A } 5812027SN/A 5822572SN/A 0x2: decode FUNCTION_LO { 5832101SN/A 0x1: decode MOVCF { 5842686Sksewell@umich.edu format BasicOp { 5852686Sksewell@umich.edu 0x0: movf_d({{ Fd.df = (getCondCode(FCSR,CC) == 0) ? 5862686Sksewell@umich.edu Fs.df : Fd.df; 5872686Sksewell@umich.edu }}); 5882686Sksewell@umich.edu 0x1: movt_d({{ Fd.df = (getCondCode(FCSR,CC) == 1) ? 5892686Sksewell@umich.edu Fs.df : Fd.df; 5902686Sksewell@umich.edu }}); 5912101SN/A } 5922101SN/A } 5932027SN/A 5942101SN/A format BasicOp { 5952686Sksewell@umich.edu 0x2: movz_d({{ Fd.df = (Rt == 0) ? Fs.df : Fd.df; }}); 5962686Sksewell@umich.edu 0x3: movn_d({{ Fd.df = (Rt != 0) ? Fs.df : Fd.df; }}); 5972101SN/A } 5982027SN/A 5992605SN/A format FloatOp { 6002686Sksewell@umich.edu 0x5: recip_d({{ Fd.df = 1 / Fs.df }}); 6012605SN/A 0x6: rsqrt_d({{ Fd.df = 1 / sqrt(Fs.df) }}); 6022101SN/A } 6032101SN/A } 6042027SN/A 6052572SN/A 0x4: decode FUNCTION_LO { 6062686Sksewell@umich.edu format FloatConvertOp { 6072686Sksewell@umich.edu 0x0: cvt_s_d({{ val = Fs.df; }}, ToSingle); 6082686Sksewell@umich.edu 0x4: cvt_w_d({{ val = Fs.df; }}, ToWord); 6092686Sksewell@umich.edu 0x5: cvt_l_d({{ val = Fs.df; }}, ToLong); 6102101SN/A } 6112101SN/A } 6122602SN/A 6132602SN/A 0x6: decode FUNCTION_LO { 6142604SN/A format FloatCompareOp { 6152686Sksewell@umich.edu 0x0: c_f_d({{ cond = 0; }}, DoublePrecision, 6162686Sksewell@umich.edu UnorderedFalse); 6172686Sksewell@umich.edu 0x1: c_un_d({{ cond = 0; }}, DoublePrecision, 6182686Sksewell@umich.edu UnorderedTrue); 6192686Sksewell@umich.edu 0x2: c_eq_d({{ cond = (Fs.df == Ft.df); }}, 6202686Sksewell@umich.edu UnorderedFalse); 6212686Sksewell@umich.edu 0x3: c_ueq_d({{ cond = (Fs.df == Ft.df); }}, 6222686Sksewell@umich.edu UnorderedTrue); 6232686Sksewell@umich.edu 0x4: c_olt_d({{ cond = (Fs.df < Ft.df); }}, 6242686Sksewell@umich.edu UnorderedFalse); 6252686Sksewell@umich.edu 0x5: c_ult_d({{ cond = (Fs.df < Ft.df); }}, 6262686Sksewell@umich.edu UnorderedTrue); 6272686Sksewell@umich.edu 0x6: c_ole_d({{ cond = (Fs.df <= Ft.df); }}, 6282686Sksewell@umich.edu UnorderedFalse); 6292686Sksewell@umich.edu 0x7: c_ule_d({{ cond = (Fs.df <= Ft.df); }}, 6302686Sksewell@umich.edu UnorderedTrue); 6312602SN/A } 6322602SN/A } 6332602SN/A 6342602SN/A 0x7: decode FUNCTION_LO { 6352686Sksewell@umich.edu format FloatCompareOp { 6362686Sksewell@umich.edu 0x0: c_sf_d({{ cond = 0; }}, DoublePrecision, 6372686Sksewell@umich.edu UnorderedFalse, QnanException); 6382686Sksewell@umich.edu 0x1: c_ngle_d({{ cond = 0; }}, DoublePrecision, 6392686Sksewell@umich.edu UnorderedTrue, QnanException); 6402686Sksewell@umich.edu 0x2: c_seq_d({{ cond = (Fs.df == Ft.df); }}, 6412686Sksewell@umich.edu UnorderedFalse, QnanException); 6422686Sksewell@umich.edu 0x3: c_ngl_d({{ cond = (Fs.df == Ft.df); }}, 6432686Sksewell@umich.edu UnorderedTrue, QnanException); 6442686Sksewell@umich.edu 0x4: c_lt_d({{ cond = (Fs.df < Ft.df); }}, 6452686Sksewell@umich.edu UnorderedFalse, QnanException); 6462686Sksewell@umich.edu 0x5: c_nge_d({{ cond = (Fs.df < Ft.df); }}, 6472686Sksewell@umich.edu UnorderedTrue, QnanException); 6482686Sksewell@umich.edu 0x6: c_le_d({{ cond = (Fs.df <= Ft.df); }}, 6492686Sksewell@umich.edu UnorderedFalse, QnanException); 6502686Sksewell@umich.edu 0x7: c_ngt_d({{ cond = (Fs.df <= Ft.df); }}, 6512686Sksewell@umich.edu UnorderedTrue, QnanException); 6522602SN/A } 6532602SN/A } 6542101SN/A } 6552027SN/A 6562101SN/A //Table A-16 MIPS32 COP1 Encoding of Function Field When rs=W 6572101SN/A 0x4: decode FUNCTION { 6582605SN/A format FloatConvertOp { 6592686Sksewell@umich.edu 0x20: cvt_s_w({{ val = Fs.uw; }}, ToSingle); 6602686Sksewell@umich.edu 0x21: cvt_d_w({{ val = Fs.uw; }}, ToDouble); 6612686Sksewell@umich.edu 0x26: FailUnimpl::cvt_ps_w(); 6622101SN/A } 6632101SN/A } 6642027SN/A 6652101SN/A //Table A-16 MIPS32 COP1 Encoding of Function Field When rs=L1 6662101SN/A //Note: "1. Format type L is legal only if 64-bit floating point operations 6672101SN/A //are enabled." 6682101SN/A 0x5: decode FUNCTION_HI { 6692686Sksewell@umich.edu format FloatConvertOp { 6702686Sksewell@umich.edu 0x20: cvt_s_l({{ val = Fs.ud; }}, ToSingle); 6712686Sksewell@umich.edu 0x21: cvt_d_l({{ val = Fs.ud; }}, ToDouble); 6722686Sksewell@umich.edu 0x26: FailUnimpl::cvt_ps_l(); 6732101SN/A } 6742101SN/A } 6752101SN/A 6762101SN/A //Table A-17 MIPS64 COP1 Encoding of Function Field When rs=PS1 6772101SN/A //Note: "1. Format type PS is legal only if 64-bit floating point operations 6782101SN/A //are enabled. " 6792572SN/A 0x6: decode FUNCTION_HI { 6802572SN/A 0x0: decode FUNCTION_LO { 6812101SN/A format Float64Op { 6822605SN/A 0x0: add_ps({{ 6832607SN/A Fd1.sf = Fs1.sf + Ft2.sf; 6842607SN/A Fd2.sf = Fs2.sf + Ft2.sf; 6852101SN/A }}); 6862605SN/A 0x1: sub_ps({{ 6872607SN/A Fd1.sf = Fs1.sf - Ft2.sf; 6882607SN/A Fd2.sf = Fs2.sf - Ft2.sf; 6892101SN/A }}); 6902605SN/A 0x2: mul_ps({{ 6912607SN/A Fd1.sf = Fs1.sf * Ft2.sf; 6922607SN/A Fd2.sf = Fs2.sf * Ft2.sf; 6932101SN/A }}); 6942605SN/A 0x5: abs_ps({{ 6952607SN/A Fd1.sf = fabs(Fs1.sf); 6962607SN/A Fd2.sf = fabs(Fs2.sf); 6972101SN/A }}); 6982605SN/A 0x6: mov_ps({{ 6992607SN/A Fd1.sf = Fs1.sf; 7002607SN/A Fd2.sf = Fs2.sf; 7012101SN/A }}); 7022605SN/A 0x7: neg_ps({{ 7032686Sksewell@umich.edu Fd1.sf = -(Fs1.sf); 7042686Sksewell@umich.edu Fd2.sf = -(Fs2.sf); 7052101SN/A }}); 7062101SN/A } 7072101SN/A } 7082101SN/A 7092572SN/A 0x2: decode FUNCTION_LO { 7102101SN/A 0x1: decode MOVCF { 7112101SN/A format Float64Op { 7122607SN/A 0x0: movf_ps({{ 7132686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 0) ? 7142686Sksewell@umich.edu Fs1 : Fd1; 7152686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC+1) == 0) ? 7162686Sksewell@umich.edu Fs2 : Fd2; 7172607SN/A }}); 7182607SN/A 0x1: movt_ps({{ 7192686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 1) ? 7202686Sksewell@umich.edu Fs1 : Fd1; 7212686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC+1) == 1) ? 7222686Sksewell@umich.edu Fs2 : Fd2; 7232607SN/A }}); 7242101SN/A } 7252101SN/A } 7262101SN/A 7272605SN/A format Float64Op { 7282607SN/A 0x2: movz_ps({{ 7292686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 0) ? 7302686Sksewell@umich.edu Fs1 : Fd1; 7312686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 0) ? 7322686Sksewell@umich.edu Fs2 : Fd2; 7332607SN/A }}); 7342607SN/A 0x3: movn_ps({{ 7352686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 1) ? 7362686Sksewell@umich.edu Fs1 : Fd1; 7372686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 1) ? 7382686Sksewell@umich.edu Fs2 : Fd2; 7392607SN/A }}); 7402135SN/A } 7412135SN/A 7422101SN/A } 7432101SN/A 7442572SN/A 0x4: decode FUNCTION_LO { 7452686Sksewell@umich.edu 0x0: FloatOp::cvt_s_pu({{ Fd.sf = Fs2.sf; }}); 7462101SN/A } 7472101SN/A 7482572SN/A 0x5: decode FUNCTION_LO { 7492686Sksewell@umich.edu 0x0: FloatOp::cvt_s_pl({{ Fd.sf = Fs1.sf; }}); 7502686Sksewell@umich.edu 7512101SN/A format Float64Op { 7522686Sksewell@umich.edu 0x4: pll({{ Fd.ud = (uint64_t) Fs1.uw << 32 | 7532686Sksewell@umich.edu Ft1.uw; 7542686Sksewell@umich.edu }}); 7552686Sksewell@umich.edu 0x5: plu({{ Fd.ud = (uint64_t) Fs1.uw << 32 | 7562686Sksewell@umich.edu Ft2.uw; 7572686Sksewell@umich.edu }}); 7582686Sksewell@umich.edu 0x6: pul({{ Fd.ud = (uint64_t) Fs2.uw << 32 | 7592686Sksewell@umich.edu Ft1.uw; 7602686Sksewell@umich.edu }}); 7612686Sksewell@umich.edu 0x7: puu({{ Fd.ud = (uint64_t) Fs2.uw << 32 | 7622686Sksewell@umich.edu Ft2.uw; 7632686Sksewell@umich.edu }}); 7642101SN/A } 7652101SN/A } 7662602SN/A 7672602SN/A 0x6: decode FUNCTION_LO { 7682608SN/A format FloatPSCompareOp { 7692686Sksewell@umich.edu 0x0: c_f_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 7702686Sksewell@umich.edu UnorderedFalse); 7712686Sksewell@umich.edu 0x1: c_un_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 7722686Sksewell@umich.edu UnorderedTrue); 7732686Sksewell@umich.edu 0x2: c_eq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 7742686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 7752686Sksewell@umich.edu UnorderedFalse); 7762686Sksewell@umich.edu 0x3: c_ueq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 7772686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 7782686Sksewell@umich.edu UnorderedTrue); 7792686Sksewell@umich.edu 0x4: c_olt_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 7802686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 7812686Sksewell@umich.edu UnorderedFalse); 7822686Sksewell@umich.edu 0x5: c_ult_ps({{ cond1 = (Fs.sf < Ft.sf); }}, 7832686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 7842686Sksewell@umich.edu UnorderedTrue); 7852686Sksewell@umich.edu 0x6: c_ole_ps({{ cond1 = (Fs.sf <= Ft.sf); }}, 7862686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 7872686Sksewell@umich.edu UnorderedFalse); 7882686Sksewell@umich.edu 0x7: c_ule_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 7892686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 7902686Sksewell@umich.edu UnorderedTrue); 7912602SN/A } 7922602SN/A } 7932602SN/A 7942602SN/A 0x7: decode FUNCTION_LO { 7952686Sksewell@umich.edu format FloatPSCompareOp { 7962686Sksewell@umich.edu 0x0: c_sf_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 7972686Sksewell@umich.edu UnorderedFalse, QnanException); 7982686Sksewell@umich.edu 0x1: c_ngle_ps({{ cond1 = 0; }}, 7992686Sksewell@umich.edu {{ cond2 = 0; }}, 8002686Sksewell@umich.edu UnorderedTrue, QnanException); 8012686Sksewell@umich.edu 0x2: c_seq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 8022686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 8032686Sksewell@umich.edu UnorderedFalse, QnanException); 8042686Sksewell@umich.edu 0x3: c_ngl_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 8052686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 8062686Sksewell@umich.edu UnorderedTrue, QnanException); 8072686Sksewell@umich.edu 0x4: c_lt_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 8082686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 8092686Sksewell@umich.edu UnorderedFalse, QnanException); 8102686Sksewell@umich.edu 0x5: c_nge_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 8112686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 8122686Sksewell@umich.edu UnorderedTrue, QnanException); 8132686Sksewell@umich.edu 0x6: c_le_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 8142686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 8152686Sksewell@umich.edu UnorderedFalse, QnanException); 8162686Sksewell@umich.edu 0x7: c_ngt_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 8172686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 8182686Sksewell@umich.edu UnorderedTrue, QnanException); 8192602SN/A } 8202602SN/A } 8212101SN/A } 8222101SN/A } 8232101SN/A } 8242101SN/A } 8252101SN/A 8262101SN/A //Table A-19 MIPS32 COP2 Encoding of rs Field 8272101SN/A 0x2: decode RS_MSB { 8282686Sksewell@umich.edu format FailUnimpl { 8292686Sksewell@umich.edu 0x0: decode RS_HI { 8302686Sksewell@umich.edu 0x0: decode RS_LO { 8312101SN/A 0x0: mfc2(); 8322101SN/A 0x2: cfc2(); 8332101SN/A 0x3: mfhc2(); 8342101SN/A 0x4: mtc2(); 8352101SN/A 0x6: ctc2(); 8362101SN/A 0x7: mftc2(); 8372101SN/A } 8382101SN/A 8392686Sksewell@umich.edu 0x1: decode ND { 8402686Sksewell@umich.edu 0x0: decode TF { 8412101SN/A 0x0: bc2f(); 8422101SN/A 0x1: bc2t(); 8432101SN/A } 8442101SN/A 8452686Sksewell@umich.edu 0x1: decode TF { 8462101SN/A 0x0: bc2fl(); 8472101SN/A 0x1: bc2tl(); 8482101SN/A } 8492101SN/A } 8502101SN/A } 8512101SN/A } 8522101SN/A } 8532101SN/A 8542101SN/A //Table A-20 MIPS64 COP1X Encoding of Function Field 1 8552101SN/A //Note: "COP1X instructions are legal only if 64-bit floating point 8562101SN/A //operations are enabled." 8572101SN/A 0x3: decode FUNCTION_HI { 8582101SN/A 0x0: decode FUNCTION_LO { 8592686Sksewell@umich.edu format LoadIndexedMemory { 8602742Sksewell@umich.edu 0x0: lwxc1({{ Fd.uw = Mem.uw;}}); 8612742Sksewell@umich.edu 0x1: ldxc1({{ Fd.ud = Mem.ud;}}); 8622742Sksewell@umich.edu 0x5: luxc1({{ Fd.uw = Mem.ud;}}, 8632742Sksewell@umich.edu {{ EA = (Rs + Rt) & ~7; }}); 8642101SN/A } 8652043SN/A } 8662027SN/A 8672101SN/A 0x1: decode FUNCTION_LO { 8682686Sksewell@umich.edu format StoreIndexedMemory { 8692742Sksewell@umich.edu 0x0: swxc1({{ Mem.uw = Fs.uw;}}); 8702742Sksewell@umich.edu 0x1: sdxc1({{ Mem.ud = Fs.ud;}}); 8712742Sksewell@umich.edu 0x5: suxc1({{ Mem.ud = Fs.ud;}}, 8722742Sksewell@umich.edu {{ EA = (Rs + Rt) & ~7; }}); 8732046SN/A } 8742084SN/A 8752686Sksewell@umich.edu 0x7: Prefetch::prefx({{ EA = Rs + Rt; }}); 8762101SN/A } 8772027SN/A 8782686Sksewell@umich.edu 0x3: decode FUNCTION_LO { 8792686Sksewell@umich.edu 0x6: Float64Op::alnv_ps({{ if (Rs<2:0> == 0) { 8802686Sksewell@umich.edu Fd.ud = Fs.ud; 8812686Sksewell@umich.edu } else if (Rs<2:0> == 4) { 8822686Sksewell@umich.edu #if BYTE_ORDER == BIG_ENDIAN 8832686Sksewell@umich.edu Fd.ud = Fs.ud<31:0> << 32 | 8842686Sksewell@umich.edu Ft.ud<63:32>; 8852686Sksewell@umich.edu #elif BYTE_ORDER == LITTLE_ENDIAN 8862686Sksewell@umich.edu Fd.ud = Ft.ud<31:0> << 32 | 8872686Sksewell@umich.edu Fs.ud<63:32>; 8882686Sksewell@umich.edu #endif 8892686Sksewell@umich.edu } else { 8902686Sksewell@umich.edu Fd.ud = Fd.ud; 8912686Sksewell@umich.edu } 8922686Sksewell@umich.edu }}); 8932686Sksewell@umich.edu } 8942027SN/A 8952686Sksewell@umich.edu format FloatAccOp { 8962686Sksewell@umich.edu 0x4: decode FUNCTION_LO { 8972686Sksewell@umich.edu 0x0: madd_s({{ Fd.sf = (Fs.sf * Ft.sf) + Fr.sf; }}); 8982686Sksewell@umich.edu 0x1: madd_d({{ Fd.df = (Fs.df * Ft.df) + Fr.df; }}); 8992686Sksewell@umich.edu 0x6: madd_ps({{ 9002686Sksewell@umich.edu Fd1.sf = (Fs1.df * Ft1.df) + Fr1.df; 9012686Sksewell@umich.edu Fd2.sf = (Fs2.df * Ft2.df) + Fr2.df; 9022686Sksewell@umich.edu }}); 9032686Sksewell@umich.edu } 9042027SN/A 9052686Sksewell@umich.edu 0x5: decode FUNCTION_LO { 9062686Sksewell@umich.edu 0x0: msub_s({{ Fd.sf = (Fs.sf * Ft.sf) - Fr.sf; }}); 9072686Sksewell@umich.edu 0x1: msub_d({{ Fd.df = (Fs.df * Ft.df) - Fr.df; }}); 9082686Sksewell@umich.edu 0x6: msub_ps({{ 9092686Sksewell@umich.edu Fd1.sf = (Fs1.df * Ft1.df) - Fr1.df; 9102686Sksewell@umich.edu Fd2.sf = (Fs2.df * Ft2.df) - Fr2.df; 9112686Sksewell@umich.edu }}); 9122686Sksewell@umich.edu } 9132027SN/A 9142686Sksewell@umich.edu 0x6: decode FUNCTION_LO { 9152686Sksewell@umich.edu 0x0: nmadd_s({{ Fd.sf = (-1 * Fs.sf * Ft.sf) - Fr.sf; }}); 9162686Sksewell@umich.edu 0x1: nmadd_d({{ Fd.df = (-1 * Fs.df * Ft.df) + Fr.df; }}); 9172686Sksewell@umich.edu 0x6: nmadd_ps({{ 9182686Sksewell@umich.edu Fd1.sf = -((Fs1.df * Ft1.df) + Fr1.df); 9192686Sksewell@umich.edu Fd2.sf = -((Fs2.df * Ft2.df) + Fr2.df); 9202686Sksewell@umich.edu }}); 9212686Sksewell@umich.edu } 9222027SN/A 9232686Sksewell@umich.edu 0x7: decode FUNCTION_LO { 9242686Sksewell@umich.edu 0x0: nmsub_s({{ Fd.sf = (-1 * Fs.sf * Ft.sf) - Fr.sf; }}); 9252686Sksewell@umich.edu 0x1: nmsub_d({{ Fd.df = (-1 * Fs.df * Ft.df) - Fr.df; }}); 9262686Sksewell@umich.edu 0x6: nmsub_ps({{ 9272686Sksewell@umich.edu Fd1.sf = -((Fs1.df * Ft1.df) - Fr1.df); 9282686Sksewell@umich.edu Fd2.sf = -((Fs2.df * Ft2.df) - Fr2.df); 9292686Sksewell@umich.edu }}); 9302046SN/A } 9312686Sksewell@umich.edu 9322101SN/A } 9332043SN/A } 9342025SN/A 9352686Sksewell@umich.edu format Branch { 9362686Sksewell@umich.edu 0x4: beql({{ cond = (Rs.sw == Rt.sw); }}, Likely); 9372686Sksewell@umich.edu 0x5: bnel({{ cond = (Rs.sw != Rt.sw); }}, Likely); 9382686Sksewell@umich.edu 0x6: blezl({{ cond = (Rs.sw <= 0); }}, Likely); 9392686Sksewell@umich.edu 0x7: bgtzl({{ cond = (Rs.sw > 0); }}, Likely); 9402046SN/A } 9412084SN/A } 9422024SN/A 9432686Sksewell@umich.edu 0x3: decode OPCODE_LO { 9442043SN/A //Table A-5 MIPS32 SPECIAL2 Encoding of Function Field 9452043SN/A 0x4: decode FUNCTION_HI { 9462686Sksewell@umich.edu 0x0: decode FUNCTION_LO { 9472686Sksewell@umich.edu 0x2: IntOp::mul({{ int64_t temp1 = Rs.sd * Rt.sd; 9482686Sksewell@umich.edu Rd.sw = temp1<31:0> 9492686Sksewell@umich.edu }}); 9502027SN/A 9512686Sksewell@umich.edu format HiLoOp { 9522686Sksewell@umich.edu 0x0: madd({{ val = ((int64_t) HI << 32 | LO) + 9532686Sksewell@umich.edu (Rs.sd * Rt.sd); 9542686Sksewell@umich.edu }}); 9552686Sksewell@umich.edu 0x1: maddu({{ val = ((uint64_t) HI << 32 | LO) + 9562686Sksewell@umich.edu (Rs.ud * Rt.ud); 9572686Sksewell@umich.edu }}); 9582686Sksewell@umich.edu 0x4: msub({{ val = ((int64_t) HI << 32 | LO) - 9592686Sksewell@umich.edu (Rs.sd * Rt.sd); 9602686Sksewell@umich.edu }}); 9612686Sksewell@umich.edu 0x5: msubu({{ val = ((uint64_t) HI << 32 | LO) - 9622686Sksewell@umich.edu (Rs.ud * Rt.ud); 9632686Sksewell@umich.edu }}); 9642043SN/A } 9652043SN/A } 9662027SN/A 9672043SN/A 0x4: decode FUNCTION_LO { 9682101SN/A format BasicOp { 9692686Sksewell@umich.edu 0x0: clz({{ int cnt = 32; 9702686Sksewell@umich.edu for (int idx = 31; idx >= 0; idx--) { 9712686Sksewell@umich.edu if( Rs<idx:idx> == 1) { 9722686Sksewell@umich.edu cnt = 31 - idx; 9732686Sksewell@umich.edu break; 9742686Sksewell@umich.edu } 9752686Sksewell@umich.edu } 9762686Sksewell@umich.edu Rd.uw = cnt; 9772686Sksewell@umich.edu }}); 9782686Sksewell@umich.edu 0x1: clo({{ int cnt = 32; 9792686Sksewell@umich.edu for (int idx = 31; idx >= 0; idx--) { 9802686Sksewell@umich.edu if( Rs<idx:idx> == 0) { 9812686Sksewell@umich.edu cnt = 31 - idx; 9822686Sksewell@umich.edu break; 9832686Sksewell@umich.edu } 9842686Sksewell@umich.edu } 9852686Sksewell@umich.edu Rd.uw = cnt; 9862686Sksewell@umich.edu }}); 9872101SN/A } 9882043SN/A } 9892027SN/A 9902043SN/A 0x7: decode FUNCTION_LO { 9912686Sksewell@umich.edu 0x7: FailUnimpl::sdbbp(); 9922043SN/A } 9932043SN/A } 9942024SN/A 9952686Sksewell@umich.edu //Table A-6 MIPS32 SPECIAL3 Encoding of Function Field for Release 2 9962686Sksewell@umich.edu //of the Architecture 9972043SN/A 0x7: decode FUNCTION_HI { 9982101SN/A 0x0: decode FUNCTION_LO { 9992686Sksewell@umich.edu format BasicOp { 10002742Sksewell@umich.edu 0x0: ext({{ Rt.uw = bits(Rs.uw, MSB+LSB, LSB); }}); 10012686Sksewell@umich.edu 0x4: ins({{ Rt.uw = bits(Rt.uw, 31, MSB+1) << (MSB+1) | 10022686Sksewell@umich.edu bits(Rs.uw, MSB-LSB, 0) << LSB | 10032686Sksewell@umich.edu bits(Rt.uw, LSB-1, 0); 10042686Sksewell@umich.edu }}); 10052046SN/A } 10062101SN/A } 10072026SN/A 10082101SN/A 0x1: decode FUNCTION_LO { 10092686Sksewell@umich.edu format MipsMT { 10102084SN/A 0x0: fork(); 10112084SN/A 0x1: yield(); 10122061SN/A } 10132101SN/A } 10142061SN/A 10152101SN/A //Table A-10 MIPS32 BSHFL Encoding of sa Field 10162101SN/A 0x4: decode SA { 10172046SN/A format BasicOp { 10182686Sksewell@umich.edu 0x02: wsbh({{ Rd.uw = Rt.uw<23:16> << 24 | 10192686Sksewell@umich.edu Rt.uw<31:24> << 16 | 10202686Sksewell@umich.edu Rt.uw<7:0> << 8 | 10212686Sksewell@umich.edu Rt.uw<15:8>; 10222686Sksewell@umich.edu }}); 10232742Sksewell@umich.edu 0x10: seb({{ Rd.sw = Rt.sb; }}); 10242742Sksewell@umich.edu 0x18: seh({{ Rd.sw = Rt.sh; }}); 10252046SN/A } 10262101SN/A } 10272043SN/A 10282101SN/A 0x6: decode FUNCTION_LO { 10292686Sksewell@umich.edu 0x7: FailUnimpl::rdhwr(); 10302101SN/A } 10312043SN/A } 10322084SN/A } 10332024SN/A 10342686Sksewell@umich.edu 0x4: decode OPCODE_LO { 10352124SN/A format LoadMemory { 10362239SN/A 0x0: lb({{ Rt.sw = Mem.sb; }}); 10372239SN/A 0x1: lh({{ Rt.sw = Mem.sh; }}); 10382479SN/A 0x3: lw({{ Rt.sw = Mem.sw; }}); 10392239SN/A 0x4: lbu({{ Rt.uw = Mem.ub; }}); 10402239SN/A 0x5: lhu({{ Rt.uw = Mem.uh; }}); 10412686Sksewell@umich.edu } 10422495SN/A 10432686Sksewell@umich.edu format LoadUnalignedMemory { 10442686Sksewell@umich.edu 0x2: lwl({{ uint32_t mem_shift = 24 - (8 * byte_offset); 10452686Sksewell@umich.edu Rt.uw = mem_word << mem_shift | 10462686Sksewell@umich.edu Rt.uw & mask(mem_shift); 10472686Sksewell@umich.edu }}); 10482686Sksewell@umich.edu 0x6: lwr({{ uint32_t mem_shift = 8 * byte_offset; 10492686Sksewell@umich.edu Rt.uw = Rt.uw & (mask(mem_shift) << (32 - mem_shift)) | 10502686Sksewell@umich.edu mem_word >> mem_shift; 10512686Sksewell@umich.edu }}); 10522084SN/A } 10532084SN/A } 10542024SN/A 10552686Sksewell@umich.edu 0x5: decode OPCODE_LO { 10562124SN/A format StoreMemory { 10572124SN/A 0x0: sb({{ Mem.ub = Rt<7:0>; }}); 10582124SN/A 0x1: sh({{ Mem.uh = Rt<15:0>; }}); 10592479SN/A 0x3: sw({{ Mem.uw = Rt<31:0>; }}); 10602084SN/A } 10612024SN/A 10622686Sksewell@umich.edu format StoreUnalignedMemory { 10632686Sksewell@umich.edu 0x2: swl({{ uint32_t reg_shift = 24 - (8 * byte_offset); 10642686Sksewell@umich.edu uint32_t mem_shift = 32 - reg_shift; 10652686Sksewell@umich.edu mem_word = mem_word & (mask(reg_shift) << mem_shift) | 10662686Sksewell@umich.edu Rt.uw >> reg_shift; 10672686Sksewell@umich.edu }}); 10682686Sksewell@umich.edu 0x6: swr({{ uint32_t reg_shift = 8 * byte_offset; 10692686Sksewell@umich.edu mem_word = Rt.uw << reg_shift | 10702686Sksewell@umich.edu mem_word & (mask(reg_shift)); 10712686Sksewell@umich.edu }}); 10722084SN/A } 10732024SN/A 10742686Sksewell@umich.edu 0x7: FailUnimpl::cache(); 10752084SN/A } 10762024SN/A 10772686Sksewell@umich.edu 0x6: decode OPCODE_LO { 10782686Sksewell@umich.edu format LoadMemory { 10792686Sksewell@umich.edu 0x0: ll({{ Rt.uw = Mem.uw; }}, mem_flags=LOCKED); 10802686Sksewell@umich.edu 0x1: lwc1({{ Ft.uw = Mem.uw; }}); 10812573SN/A 0x5: ldc1({{ Ft.ud = Mem.ud; }}); 10822084SN/A } 10832686Sksewell@umich.edu 10842686Sksewell@umich.edu 0x3: Prefetch::pref(); 10852084SN/A } 10862024SN/A 10872239SN/A 10882686Sksewell@umich.edu 0x7: decode OPCODE_LO { 10892686Sksewell@umich.edu 0x0: StoreCond::sc({{ Mem.uw = Rt.uw;}}, 10902686Sksewell@umich.edu {{ uint64_t tmp = write_result; 10912686Sksewell@umich.edu Rt.uw = (tmp == 0 || tmp == 1) ? tmp : Rt.uw; 10922686Sksewell@umich.edu }}, mem_flags=LOCKED); 10932055SN/A 10942686Sksewell@umich.edu format StoreMemory { 10952573SN/A 0x1: swc1({{ Mem.uw = Ft.uw; }}); 10962573SN/A 0x5: sdc1({{ Mem.ud = Ft.ud; }}); 10972084SN/A } 10982027SN/A } 10992024SN/A} 11002022SN/A 11012027SN/A 1102