decoder.isa revision 2604
12686Sksewell@umich.edu// -*- mode:c++ -*- 22100SN/A 35254Sksewell@umich.edu//////////////////////////////////////////////////////////////////// 45254Sksewell@umich.edu// 55254Sksewell@umich.edu// The actual MIPS32 ISA decoder 65254Sksewell@umich.edu// ----------------------------- 75254Sksewell@umich.edu// The following instructions are specified in the MIPS32 ISA 85254Sksewell@umich.edu// Specification. Decoding closely follows the style specified 95254Sksewell@umich.edu// in the MIPS32 ISAthe specification document starting with Table 105254Sksewell@umich.edu// A-2 (document available @ www.mips.com) 115254Sksewell@umich.edu// 125254Sksewell@umich.edu//@todo: Distinguish "unknown/future" use insts from "reserved" 135254Sksewell@umich.edu// ones 145254Sksewell@umich.edudecode OPCODE_HI default Unknown::unknown() { 155254Sksewell@umich.edu 165254Sksewell@umich.edu // Derived From ... Table A-2 MIPS32 ISA Manual 175254Sksewell@umich.edu 0x0: decode OPCODE_LO { 185254Sksewell@umich.edu 195254Sksewell@umich.edu 0x0: decode FUNCTION_HI { 205254Sksewell@umich.edu 0x0: decode FUNCTION_LO { 215254Sksewell@umich.edu 0x1: decode MOVCI { 225254Sksewell@umich.edu format BasicOp { 235254Sksewell@umich.edu 0: movf({{ if (xc->readMiscReg(FPCR) != CC) Rd = Rs}}); 245254Sksewell@umich.edu 1: movt({{ if (xc->readMiscReg(FPCR) == CC) Rd = Rs}}); 255254Sksewell@umich.edu } 265254Sksewell@umich.edu } 275254Sksewell@umich.edu 285254Sksewell@umich.edu format BasicOp { 295254Sksewell@umich.edu 305254Sksewell@umich.edu //Table A-3 Note: "1. Specific encodings of the rt, rd, and sa fields 315254Sksewell@umich.edu //are used to distinguish among the SLL, NOP, SSNOP and EHB functions. 322706Sksewell@umich.edu 0x0: decode RS { 332022SN/A 0x0: decode RT { //fix Nop traditional vs. Nop converted disassembly later 342022SN/A 0x0: decode RD default Nop::nop(){ 352043SN/A 0x0: decode SA { 362024SN/A 0x1: ssnop({{ ; }}); //really sll r0,r0,1 372024SN/A 0x3: ehb({{ ; }}); //really sll r0,r0,3 382043SN/A } 392686Sksewell@umich.edu } 404661Sksewell@umich.edu 412022SN/A default: sll({{ Rd = Rt.uw << SA; }}); 422083SN/A } 432686Sksewell@umich.edu 442101SN/A } 452043SN/A 462043SN/A 0x2: decode RS_SRL { 472101SN/A 0x0:decode SRL { 482101SN/A 0: srl({{ Rd = Rt.uw >> SA; }}); 496384Sgblack@eecs.umich.edu 506384Sgblack@eecs.umich.edu //Hardcoded assuming 32-bit ISA, probably need parameter here 516384Sgblack@eecs.umich.edu 1: rotr({{ Rd = (Rt.uw << (32 - SA)) | (Rt.uw >> SA);}}); 526384Sgblack@eecs.umich.edu } 536384Sgblack@eecs.umich.edu } 546384Sgblack@eecs.umich.edu 552101SN/A 0x3: decode RS { 562101SN/A 0x0: sra({{ 572101SN/A uint32_t temp = Rt >> SA; 582046SN/A 592686Sksewell@umich.edu if ( (Rt & 0x80000000) > 0 ) { 602686Sksewell@umich.edu uint32_t mask = 0x80000000; 612686Sksewell@umich.edu for(int i=0; i < SA; i++) { 622470SN/A temp |= mask; 632686Sksewell@umich.edu mask = mask >> 1; 644661Sksewell@umich.edu } 655222Sksewell@umich.edu } 665222Sksewell@umich.edu 672686Sksewell@umich.edu Rd = temp; 688588Sgblack@eecs.umich.edu }}); 692470SN/A } 702241SN/A 712101SN/A 0x4: sllv({{ Rd = Rt.uw << Rs<4:0>; }}); 722495SN/A 732495SN/A 0x6: decode SRLV { 748588Sgblack@eecs.umich.edu 0: srlv({{ Rd = Rt.uw >> Rs<4:0>; }}); 752101SN/A 766384Sgblack@eecs.umich.edu //Hardcoded assuming 32-bit ISA, probably need parameter here 776384Sgblack@eecs.umich.edu 1: rotrv({{ Rd = (Rt.uw << (32 - Rs<4:0>)) | (Rt.uw >> Rs<4:0>);}}); 786384Sgblack@eecs.umich.edu } 798588Sgblack@eecs.umich.edu 806384Sgblack@eecs.umich.edu 0x7: srav({{ 812495SN/A int shift_amt = Rs<4:0>; 822101SN/A 832101SN/A uint32_t temp = Rt >> shift_amt; 842495SN/A 852495SN/A if ( (Rt & 0x80000000) > 0 ) { 862495SN/A uint32_t mask = 0x80000000; 872495SN/A for(int i=0; i < shift_amt; i++) { 882495SN/A temp |= mask; 892495SN/A mask = mask >> 1; 902495SN/A } 912495SN/A } 922495SN/A 932495SN/A Rd = temp; 942495SN/A }}); 952495SN/A } 962495SN/A } 972101SN/A 988588Sgblack@eecs.umich.edu 0x1: decode FUNCTION_LO { 992101SN/A 1002101SN/A //Table A-3 Note: "Specific encodings of the hint field are used 1018588Sgblack@eecs.umich.edu //to distinguish JR from JR.HB and JALR from JALR.HB" 1022101SN/A format Jump { 1036384Sgblack@eecs.umich.edu 0x0: decode HINT { 1046384Sgblack@eecs.umich.edu 0:jr({{ NNPC = Rs & ~1; }},IsReturn); 1056384Sgblack@eecs.umich.edu 1068588Sgblack@eecs.umich.edu 1:jr_hb({{ NNPC = Rs & ~1; clear_exe_inst_hazards(); }},IsReturn); 1078588Sgblack@eecs.umich.edu } 1086384Sgblack@eecs.umich.edu 1092101SN/A 0x1: decode HINT { 1102101SN/A 0: jalr({{ Rd = NNPC; NNPC = Rs; }},IsCall,IsReturn); 1112495SN/A 1122495SN/A 1: jalr_hb({{ Rd = NNPC; NNPC = Rs; clear_exe_inst_hazards();}},IsCall,IsReturn); 1132495SN/A } 1142495SN/A } 1152495SN/A 1166384Sgblack@eecs.umich.edu format BasicOp { 1176384Sgblack@eecs.umich.edu 0x2: movz({{ if (Rt == 0) Rd = Rs; }}); 1186384Sgblack@eecs.umich.edu 0x3: movn({{ if (Rt != 0) Rd = Rs; }}); 1196384Sgblack@eecs.umich.edu } 1206384Sgblack@eecs.umich.edu 1212495SN/A format BasicOp { 1226384Sgblack@eecs.umich.edu 0x4: syscall({{ xc->syscall(R2); }},IsNonSpeculative); 1232495SN/A 0x5: break({{ panic("Not implemented break yet"); }},IsNonSpeculative); 1242495SN/A 0x7: sync({{ panic("Not implemented sync yet"); }},IsNonSpeculative); 1252043SN/A } 1262043SN/A } 1272025SN/A 1282043SN/A 0x2: decode FUNCTION_LO { 1292686Sksewell@umich.edu format BasicOp { 1302686Sksewell@umich.edu 0x0: mfhi({{ Rd = xc->readMiscReg(Hi); }}); 1312123SN/A 0x1: mthi({{ xc->setMiscReg(Hi,Rs); }}); 1322101SN/A 0x2: mflo({{ Rd = xc->readMiscReg(Lo); }}); 1336376Sgblack@eecs.umich.edu 0x3: mtlo({{ xc->setMiscReg(Lo,Rs); }}); 1346376Sgblack@eecs.umich.edu } 1356376Sgblack@eecs.umich.edu } 1367792Sgblack@eecs.umich.edu 1376376Sgblack@eecs.umich.edu 0x3: decode FUNCTION_LO { 1386376Sgblack@eecs.umich.edu format IntOp { 1396376Sgblack@eecs.umich.edu 0x0: mult({{ 1406376Sgblack@eecs.umich.edu int64_t temp1 = Rs.sd * Rt.sd; 1416376Sgblack@eecs.umich.edu xc->setMiscReg(Hi,temp1<63:32>); 1426376Sgblack@eecs.umich.edu xc->setMiscReg(Lo,temp1<31:0>); 1436376Sgblack@eecs.umich.edu }}); 1447792Sgblack@eecs.umich.edu 1456376Sgblack@eecs.umich.edu 0x1: multu({{ 1466376Sgblack@eecs.umich.edu uint64_t temp1 = Rs.ud * Rt.ud; 1476376Sgblack@eecs.umich.edu xc->setMiscReg(Hi,temp1<63:32>); 1486376Sgblack@eecs.umich.edu xc->setMiscReg(Lo,temp1<31:0>); 1492101SN/A }}); 1502042SN/A 1512101SN/A 0x2: div({{ 1527720Sgblack@eecs.umich.edu xc->setMiscReg(Hi,Rs.sd % Rt.sd); 1537792Sgblack@eecs.umich.edu xc->setMiscReg(Lo,Rs.sd / Rt.sd); 1547792Sgblack@eecs.umich.edu }}); 1557720Sgblack@eecs.umich.edu 1567720Sgblack@eecs.umich.edu 0x3: divu({{ 1577792Sgblack@eecs.umich.edu xc->setMiscReg(Hi,Rs.ud % Rt.ud); 1587792Sgblack@eecs.umich.edu xc->setMiscReg(Lo,Rs.ud / Rt.ud); 1597720Sgblack@eecs.umich.edu }}); 1602101SN/A } 1612101SN/A } 1622042SN/A 1632101SN/A 0x4: decode HINT { 1642686Sksewell@umich.edu 0x0: decode FUNCTION_LO { 1652686Sksewell@umich.edu format IntOp { 1668738Sgblack@eecs.umich.edu 0x0: add({{ Rd.sw = Rs.sw + Rt.sw;/*Trap on Overflow*/}}); 1678564Sgblack@eecs.umich.edu 0x1: addu({{ Rd.sw = Rs.sw + Rt.sw;}}); 1688564Sgblack@eecs.umich.edu 0x2: sub({{ Rd.sw = Rs.sw - Rt.sw; /*Trap on Overflow*/}}); 1698564Sgblack@eecs.umich.edu 0x3: subu({{ Rd.sw = Rs.sw - Rt.sw;}}); 1708564Sgblack@eecs.umich.edu 0x4: and({{ Rd = Rs & Rt;}}); 1712686Sksewell@umich.edu 0x5: or({{ Rd = Rs | Rt;}}); 1725222Sksewell@umich.edu 0x6: xor({{ Rd = Rs ^ Rt;}}); 1732101SN/A 0x7: nor({{ Rd = ~(Rs | Rt);}}); 1742083SN/A } 1752043SN/A } 1762025SN/A } 1772043SN/A 1786384Sgblack@eecs.umich.edu 0x5: decode HINT { 1796384Sgblack@eecs.umich.edu 0x0: decode FUNCTION_LO { 1804661Sksewell@umich.edu format IntOp{ 1816384Sgblack@eecs.umich.edu 0x2: slt({{ Rd.sw = ( Rs.sw < Rt.sw ) ? 1 : 0}}); 1826384Sgblack@eecs.umich.edu 0x3: sltu({{ Rd.uw = ( Rs.uw < Rt.uw ) ? 1 : 0}}); 1834661Sksewell@umich.edu } 1842083SN/A } 1852025SN/A } 1862043SN/A 1874661Sksewell@umich.edu 0x6: decode FUNCTION_LO { 1888588Sgblack@eecs.umich.edu format Trap { 1898588Sgblack@eecs.umich.edu 0x0: tge({{ cond = (Rs.sw >= Rt.sw); }}); 1904661Sksewell@umich.edu 0x1: tgeu({{ cond = (Rs.uw >= Rt.uw); }}); 1914661Sksewell@umich.edu 0x2: tlt({{ cond = (Rs.sw < Rt.sw); }}); 1922686Sksewell@umich.edu 0x3: tltu({{ cond = (Rs.uw >= Rt.uw); }}); 1936384Sgblack@eecs.umich.edu 0x4: teq({{ cond = (Rs.sw == Rt.sw); }}); 1948588Sgblack@eecs.umich.edu 0x6: tne({{ cond = (Rs.sw != Rt.sw); }}); 1958588Sgblack@eecs.umich.edu } 1968588Sgblack@eecs.umich.edu } 1976384Sgblack@eecs.umich.edu } 1985222Sksewell@umich.edu 1995222Sksewell@umich.edu 0x1: decode REGIMM_HI { 2006384Sgblack@eecs.umich.edu 0x0: decode REGIMM_LO { 2018588Sgblack@eecs.umich.edu format Branch { 2028588Sgblack@eecs.umich.edu 0x0: bltz({{ cond = (Rs.sw < 0); }}); 2038588Sgblack@eecs.umich.edu 0x1: bgez({{ cond = (Rs.sw >= 0); }}); 2046384Sgblack@eecs.umich.edu } 2055222Sksewell@umich.edu 2062101SN/A format BranchLikely { 2072084SN/A 0x2: bltzl({{ cond = (Rs.sw < 0); }}); 2082025SN/A 0x3: bgezl({{ cond = (Rs.sw >= 0); }}); 2092495SN/A } 2102495SN/A } 2112495SN/A 2126384Sgblack@eecs.umich.edu 0x1: decode REGIMM_LO { 2138564Sgblack@eecs.umich.edu format Trap { 2148564Sgblack@eecs.umich.edu 0x0: tgei( {{ cond = (Rs.sw >= INTIMM); }}); 2158738Sgblack@eecs.umich.edu 0x1: tgeiu({{ cond = (Rs.uw >= INTIMM); }}); 2168564Sgblack@eecs.umich.edu 0x2: tlti( {{ cond = (Rs.sw < INTIMM); }}); 2178568Sgblack@eecs.umich.edu 0x3: tltiu({{ cond = (Rs.uw < INTIMM); }}); 2186384Sgblack@eecs.umich.edu 0x4: teqi( {{ cond = (Rs.sw == INTIMM);}}); 2196384Sgblack@eecs.umich.edu 0x6: tnei( {{ cond = (Rs.sw != INTIMM);}}); 2208588Sgblack@eecs.umich.edu } 2215222Sksewell@umich.edu } 2228564Sgblack@eecs.umich.edu 2238564Sgblack@eecs.umich.edu 0x2: decode REGIMM_LO { 2248738Sgblack@eecs.umich.edu format Branch { 2258564Sgblack@eecs.umich.edu 0x0: bltzal({{ cond = (Rs.sw < 0); }}, IsCall,IsReturn); 2268568Sgblack@eecs.umich.edu 0x1: bgezal({{ cond = (Rs.sw >= 0); }}, IsCall,IsReturn); 2276384Sgblack@eecs.umich.edu } 2286384Sgblack@eecs.umich.edu 2298588Sgblack@eecs.umich.edu format BranchLikely { 2306384Sgblack@eecs.umich.edu 0x2: bltzall({{ cond = (Rs.sw < 0); }}, IsCall, IsReturn); 2316384Sgblack@eecs.umich.edu 0x3: bgezall({{ cond = (Rs.sw >= 0); }}, IsCall, IsReturn); 2326384Sgblack@eecs.umich.edu } 2336384Sgblack@eecs.umich.edu } 2342495SN/A 2352101SN/A 0x3: decode REGIMM_LO { 2362043SN/A format WarnUnimpl { 2372025SN/A 0x7: synci(); 2382495SN/A } 2392495SN/A } 2402495SN/A } 2418588Sgblack@eecs.umich.edu 2428588Sgblack@eecs.umich.edu format Jump { 2432495SN/A 0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2);}}); 2442101SN/A 2452084SN/A 0x3: jal({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }},IsCall,IsReturn); 2462024SN/A } 2472043SN/A 2482239SN/A format Branch { 2498588Sgblack@eecs.umich.edu 0x4: beq({{ cond = (Rs.sw == Rt.sw); }}); 2508588Sgblack@eecs.umich.edu 0x5: bne({{ cond = (Rs.sw != Rt.sw); }}); 2518588Sgblack@eecs.umich.edu 0x6: decode RT { 2528588Sgblack@eecs.umich.edu 0x0: blez({{ cond = (Rs.sw <= 0); }}); 2538588Sgblack@eecs.umich.edu } 2548588Sgblack@eecs.umich.edu 2552101SN/A 0x7: decode RT { 2562043SN/A 0x0: bgtz({{ cond = (Rs.sw > 0); }}); 2572043SN/A } 2582025SN/A } 2592043SN/A } 2602043SN/A 2612101SN/A 0x1: decode OPCODE_LO { 2628588Sgblack@eecs.umich.edu format IntOp { 2638588Sgblack@eecs.umich.edu 0x0: addi({{ Rt.sw = Rs.sw + imm; /*Trap If Overflow*/}}); 2648588Sgblack@eecs.umich.edu 0x1: addiu({{ Rt.sw = Rs.sw + imm;}}); 2658588Sgblack@eecs.umich.edu 0x2: slti({{ Rt.sw = ( Rs.sw < imm) ? 1 : 0 }}); 2662101SN/A 0x3: sltiu({{ Rt.uw = ( Rs.uw < (uint32_t)sextImm ) ? 1 : 0 }}); 2672043SN/A 0x4: andi({{ Rt.sw = Rs.sw & zextImm;}}); 2682025SN/A 0x5: ori({{ Rt.sw = Rs.sw | zextImm;}}); 2692043SN/A 0x6: xori({{ Rt.sw = Rs.sw ^ zextImm;}}); 2705222Sksewell@umich.edu 2718588Sgblack@eecs.umich.edu 0x7: decode RS { 2726384Sgblack@eecs.umich.edu 0x0: lui({{ Rt = imm << 16}}); 2738588Sgblack@eecs.umich.edu } 2746384Sgblack@eecs.umich.edu } 2758588Sgblack@eecs.umich.edu } 2766384Sgblack@eecs.umich.edu 2778588Sgblack@eecs.umich.edu 0x2: decode OPCODE_LO { 2786384Sgblack@eecs.umich.edu 2798588Sgblack@eecs.umich.edu //Table A-11 MIPS32 COP0 Encoding of rs Field 2808588Sgblack@eecs.umich.edu 0x0: decode RS_MSB { 2812101SN/A 0x0: decode RS { 2822043SN/A format System { 2832043SN/A 0x0: mfc0({{ 2842043SN/A //uint64_t reg_num = Rd.uw; 2852101SN/A 2868588Sgblack@eecs.umich.edu Rt = xc->readMiscReg(RD << 5 | SEL); 2872686Sksewell@umich.edu }}); 2882686Sksewell@umich.edu 2898588Sgblack@eecs.umich.edu 0x4: mtc0({{ 2902686Sksewell@umich.edu //uint64_t reg_num = Rd.uw; 2918588Sgblack@eecs.umich.edu 2928588Sgblack@eecs.umich.edu xc->setMiscReg(RD << 5 | SEL,Rt); 2932101SN/A }}); 2942043SN/A 2952043SN/A 0x8: mftr({{ 2962043SN/A //The contents of the coprocessor 0 register specified by the 2976384Sgblack@eecs.umich.edu //combination of rd and sel are loaded into general register 2986384Sgblack@eecs.umich.edu //rt. Note that not all coprocessor 0 registers support the 2994661Sksewell@umich.edu //sel field. In those instances, the sel field must be zero. 3002101SN/A 3012101SN/A //MT Code Needed Here 3022101SN/A }}); 3032043SN/A 3042043SN/A 0xC: mttr({{ 3052043SN/A //The contents of the coprocessor 0 register specified by the 3062123SN/A //combination of rd and sel are loaded into general register 3077792Sgblack@eecs.umich.edu //rt. Note that not all coprocessor 0 registers support the 3087792Sgblack@eecs.umich.edu //sel field. In those instances, the sel field must be zero. 3097792Sgblack@eecs.umich.edu 3102043SN/A //MT Code Needed Here 3112043SN/A }}); 3122100SN/A 3132686Sksewell@umich.edu 3142686Sksewell@umich.edu 0xA: rdpgpr({{ 3158588Sgblack@eecs.umich.edu //Accessing Previous Shadow Set Register Number 3162686Sksewell@umich.edu //uint64_t prev = xc->readMiscReg(SRSCtl)/*[PSS]*/; 3178588Sgblack@eecs.umich.edu //uint64_t reg_num = Rt.uw; 3188588Sgblack@eecs.umich.edu 3198588Sgblack@eecs.umich.edu //Rd = xc->regs.IntRegFile[prev]; 3202043SN/A //Rd = xc->shadowIntRegFile[prev][reg_num]; 3212084SN/A }}); 3222024SN/A 3232101SN/A 0xB: decode RD { 3242686Sksewell@umich.edu 3255222Sksewell@umich.edu 0x0: decode SC { 3268564Sgblack@eecs.umich.edu 0x0: dvpe({{ 3278564Sgblack@eecs.umich.edu Rt.sw = xc->readMiscReg(MVPControl); 3288738Sgblack@eecs.umich.edu xc->setMiscReg(MVPControl,0); 3298564Sgblack@eecs.umich.edu }}); 3308568Sgblack@eecs.umich.edu 3316384Sgblack@eecs.umich.edu 0x1: evpe({{ 3326384Sgblack@eecs.umich.edu Rt.sw = xc->readMiscReg(MVPControl); 3338588Sgblack@eecs.umich.edu xc->setMiscReg(MVPControl,1); 3348588Sgblack@eecs.umich.edu }}); 3358588Sgblack@eecs.umich.edu } 3368588Sgblack@eecs.umich.edu 3378588Sgblack@eecs.umich.edu 0x1: decode SC { 3388588Sgblack@eecs.umich.edu 0x0: dmt({{ 3392495SN/A Rt.sw = xc->readMiscReg(VPEControl); 3402495SN/A xc->setMiscReg(VPEControl,0); 3416384Sgblack@eecs.umich.edu }}); 3422495SN/A 3432084SN/A 0x1: emt({{ 3442084SN/A Rt.sw = xc->readMiscReg(VPEControl); 3452024SN/A xc->setMiscReg(VPEControl,1); 3462101SN/A }}); 3472101SN/A } 3482101SN/A 3492101SN/A 0xC: decode SC { 3506384Sgblack@eecs.umich.edu 0x0: di({{ 3516384Sgblack@eecs.umich.edu Rt.sw = xc->readMiscReg(Status); 3526384Sgblack@eecs.umich.edu xc->setMiscReg(Status,0); 3536384Sgblack@eecs.umich.edu }}); 3546384Sgblack@eecs.umich.edu 3556384Sgblack@eecs.umich.edu 0x1: ei({{ 3566384Sgblack@eecs.umich.edu Rt.sw = xc->readMiscReg(Status); 3576384Sgblack@eecs.umich.edu xc->setMiscReg(Status,1); 3586384Sgblack@eecs.umich.edu }}); 3596384Sgblack@eecs.umich.edu } 3606384Sgblack@eecs.umich.edu } 3616384Sgblack@eecs.umich.edu 3626384Sgblack@eecs.umich.edu 0xE: wrpgpr({{ 3636384Sgblack@eecs.umich.edu //Accessing Previous Shadow Set Register Number 3646384Sgblack@eecs.umich.edu //uint64_t prev = xc->readMiscReg(SRSCtl/*[PSS]*/); 3656384Sgblack@eecs.umich.edu //uint64_t reg_num = Rd.uw; 3666384Sgblack@eecs.umich.edu 3676384Sgblack@eecs.umich.edu //xc->regs.IntRegFile[prev]; 3686384Sgblack@eecs.umich.edu //xc->shadowIntRegFile[prev][reg_num] = Rt; 3696384Sgblack@eecs.umich.edu }}); 3706384Sgblack@eecs.umich.edu } 3716384Sgblack@eecs.umich.edu } 3726384Sgblack@eecs.umich.edu 3736384Sgblack@eecs.umich.edu //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO 3746384Sgblack@eecs.umich.edu 0x1: decode FUNCTION { 3756384Sgblack@eecs.umich.edu format System { 3766384Sgblack@eecs.umich.edu 0x01: tlbr({{ }}); 3776384Sgblack@eecs.umich.edu 0x02: tlbwi({{ }}); 3786384Sgblack@eecs.umich.edu 0x06: tlbwr({{ }}); 3796384Sgblack@eecs.umich.edu 0x08: tlbp({{ }}); 3806384Sgblack@eecs.umich.edu } 3816384Sgblack@eecs.umich.edu 3826384Sgblack@eecs.umich.edu format WarnUnimpl { 3836384Sgblack@eecs.umich.edu 0x18: eret(); 3846384Sgblack@eecs.umich.edu 0x1F: deret(); 3854661Sksewell@umich.edu 0x20: wait(); 3866376Sgblack@eecs.umich.edu } 3876376Sgblack@eecs.umich.edu } 3886376Sgblack@eecs.umich.edu } 3896376Sgblack@eecs.umich.edu 3904661Sksewell@umich.edu //Table A-13 MIPS32 COP1 Encoding of rs Field 3916384Sgblack@eecs.umich.edu 0x1: decode RS_MSB { 3926384Sgblack@eecs.umich.edu 3936384Sgblack@eecs.umich.edu 0x0: decode RS_HI { 3944661Sksewell@umich.edu 0x0: decode RS_LO { 3956383Sgblack@eecs.umich.edu format FloatOp { 3966383Sgblack@eecs.umich.edu 0x0: mfc1 ({{ Rt.uw = Fs.uw<31:0>; }}); 3976383Sgblack@eecs.umich.edu 0x3: mfhc1({{ Rt.uw = Fs.ud<63:32>;}}); 3986383Sgblack@eecs.umich.edu 0x4: mtc1 ({{ Fs.uw = Rt.uw; }}); 3996383Sgblack@eecs.umich.edu 0x7: mthc1({{ 4006383Sgblack@eecs.umich.edu uint64_t fs_hi = Rt.ud << 32; 4016383Sgblack@eecs.umich.edu uint64_t fs_lo = Fs.ud & 0x0000FFFF; 4026383Sgblack@eecs.umich.edu Fs.ud = fs_hi & fs_lo; 4036383Sgblack@eecs.umich.edu }}); 4046383Sgblack@eecs.umich.edu } 4056383Sgblack@eecs.umich.edu 4066383Sgblack@eecs.umich.edu format System { 4076383Sgblack@eecs.umich.edu 0x2: cfc1({{ 4086384Sgblack@eecs.umich.edu uint32_t fcsr_reg = xc->readMiscReg(FCSR); 4092686Sksewell@umich.edu 4104661Sksewell@umich.edu switch (FS) 4114661Sksewell@umich.edu { 4124661Sksewell@umich.edu case 0: 4136384Sgblack@eecs.umich.edu Rt = xc->readMiscReg(FIR); 4144661Sksewell@umich.edu break; 4154661Sksewell@umich.edu case 25: 4166384Sgblack@eecs.umich.edu Rt = 0 | (fcsr_reg & 0xFE000000) >> 24 | (fcsr_reg & 0x00800000) >> 23; 4176384Sgblack@eecs.umich.edu break; 4186384Sgblack@eecs.umich.edu case 26: 4196384Sgblack@eecs.umich.edu Rt = 0 | (fcsr_reg & 0x0003F07C); 4204661Sksewell@umich.edu break; 4216384Sgblack@eecs.umich.edu case 28: 4226384Sgblack@eecs.umich.edu Rt = 0 | (fcsr_reg); 4236384Sgblack@eecs.umich.edu break; 4246384Sgblack@eecs.umich.edu case 31: 4256384Sgblack@eecs.umich.edu Rt = fcsr_reg; 4266384Sgblack@eecs.umich.edu break; 4276384Sgblack@eecs.umich.edu default: 4286384Sgblack@eecs.umich.edu panic("FP Control Value (%d) Not Available. Ignoring Access to" 4296384Sgblack@eecs.umich.edu "Floating Control Status Register",fcsr_reg); 4306384Sgblack@eecs.umich.edu } 4316384Sgblack@eecs.umich.edu }}); 4326384Sgblack@eecs.umich.edu 4336384Sgblack@eecs.umich.edu 0x6: ctc1({{ 4346384Sgblack@eecs.umich.edu uint32_t fcsr_reg = xc->readMiscReg(FCSR); 4356384Sgblack@eecs.umich.edu uint32_t temp; 4366384Sgblack@eecs.umich.edu 4376384Sgblack@eecs.umich.edu switch (FS) 4386384Sgblack@eecs.umich.edu { 4396384Sgblack@eecs.umich.edu case 25: 4406384Sgblack@eecs.umich.edu temp = 0 | (Rt.uw<7:1> << 25) // move 31...25 4416384Sgblack@eecs.umich.edu | (fcsr_reg & 0x01000000) // bit 24 4426384Sgblack@eecs.umich.edu | (fcsr_reg & 0x004FFFFF);// bit 22...0 4436384Sgblack@eecs.umich.edu break; 4446384Sgblack@eecs.umich.edu 4456384Sgblack@eecs.umich.edu case 26: 4462101SN/A temp = 0 | (fcsr_reg & 0xFFFC0000) // move 31...18 4476384Sgblack@eecs.umich.edu | Rt.uw<17:12> << 12 // bit 17...12 4482686Sksewell@umich.edu | (fcsr_reg & 0x00000F80) << 7// bit 11...7 4492027SN/A | Rt.uw<6:2> << 2 // bit 6...2 4506384Sgblack@eecs.umich.edu | (fcsr_reg & 0x00000002); // bit 1...0 4516384Sgblack@eecs.umich.edu break; 4524661Sksewell@umich.edu 4534661Sksewell@umich.edu case 28: 4544661Sksewell@umich.edu temp = 0 | (fcsr_reg & 0xFE000000) // move 31...25 4554661Sksewell@umich.edu | Rt.uw<2:2> << 24 // bit 24 4564661Sksewell@umich.edu | (fcsr_reg & 0x00FFF000) << 23// bit 23...12 4574661Sksewell@umich.edu | Rt.uw<11:7> << 7 // bit 24 4584661Sksewell@umich.edu | (fcsr_reg & 0x000007E) 4596383Sgblack@eecs.umich.edu | Rt.uw<1:0>;// bit 22...0 4604661Sksewell@umich.edu break; 4616383Sgblack@eecs.umich.edu 4624661Sksewell@umich.edu case 31: 4634661Sksewell@umich.edu temp = Rt.uw; 4646383Sgblack@eecs.umich.edu break; 4654661Sksewell@umich.edu 4664661Sksewell@umich.edu default: 4676383Sgblack@eecs.umich.edu panic("FP Control Value (%d) Not Available. Ignoring Access to" 4684661Sksewell@umich.edu "Floating Control Status Register",fcsr_reg); 4694661Sksewell@umich.edu } 4706383Sgblack@eecs.umich.edu 4714661Sksewell@umich.edu xc->setMiscReg(FCSR,temp); 4724661Sksewell@umich.edu }}); 4736383Sgblack@eecs.umich.edu } 4744661Sksewell@umich.edu } 4754661Sksewell@umich.edu 4766383Sgblack@eecs.umich.edu 0x1: decode ND { 4774661Sksewell@umich.edu 0x0: decode TF { 4784661Sksewell@umich.edu format Branch { 4796383Sgblack@eecs.umich.edu 0x0: bc1f({{ cond = (xc->readMiscReg(FPCR) == 0); }}); 4804661Sksewell@umich.edu 0x1: bc1t({{ cond = (xc->readMiscReg(FPCR) == 1); }}); 4814661Sksewell@umich.edu } 4826383Sgblack@eecs.umich.edu } 4834661Sksewell@umich.edu 4844661Sksewell@umich.edu 0x1: decode TF { 4856383Sgblack@eecs.umich.edu format BranchLikely { 4864661Sksewell@umich.edu 0x0: bc1fl({{ cond = (xc->readMiscReg(FPCR) == 0); }}); 4874661Sksewell@umich.edu 0x1: bc1tl({{ cond = (xc->readMiscReg(FPCR) == 1); }}); 4886383Sgblack@eecs.umich.edu } 4894661Sksewell@umich.edu } 4904661Sksewell@umich.edu } 4916383Sgblack@eecs.umich.edu } 4924661Sksewell@umich.edu 4936383Sgblack@eecs.umich.edu 0x1: decode RS_HI { 4946384Sgblack@eecs.umich.edu 0x2: decode RS_LO { 4955222Sksewell@umich.edu 4964661Sksewell@umich.edu //Table A-14 MIPS32 COP1 Encoding of Function Field When rs=S 4976384Sgblack@eecs.umich.edu //(( single-word )) 4986384Sgblack@eecs.umich.edu 0x0: decode FUNCTION_HI { 4996384Sgblack@eecs.umich.edu 0x0: decode FUNCTION_LO { 5006384Sgblack@eecs.umich.edu format FloatOp { 5016384Sgblack@eecs.umich.edu 0x0: add_s({{ Fd.sf = Fs.sf + Ft.sf;}}); 5026384Sgblack@eecs.umich.edu 0x1: sub_s({{ Fd.sf = Fs.sf - Ft.sf;}}); 5036384Sgblack@eecs.umich.edu 0x2: mul_s({{ Fd.sf = Fs.sf * Ft.sf;}}); 5046384Sgblack@eecs.umich.edu 0x3: div_s({{ Fd.sf = Fs.sf / Ft.sf;}}); 5056384Sgblack@eecs.umich.edu 0x4: sqrt_s({{ Fd.sf = sqrt(Fs.sf);}}); 5066384Sgblack@eecs.umich.edu 0x5: abs_s({{ Fd.sf = fabs(Fs.sf);}}); 5076384Sgblack@eecs.umich.edu 0x6: mov_s({{ Fd.sf = Fs.sf;}}); 5086384Sgblack@eecs.umich.edu 0x7: neg_s({{ Fd.sf = -1 * Fs.sf;}}); 5098588Sgblack@eecs.umich.edu } 5106384Sgblack@eecs.umich.edu } 5116384Sgblack@eecs.umich.edu 5126384Sgblack@eecs.umich.edu 0x1: decode FUNCTION_LO { 5136384Sgblack@eecs.umich.edu format Float64Op { 5146384Sgblack@eecs.umich.edu 0x0: round_l_s({{ 5158588Sgblack@eecs.umich.edu Fd.ud = fpConvert(roundFP(Fs.sf), SINGLE_TO_LONG); 5166384Sgblack@eecs.umich.edu }}); 5178588Sgblack@eecs.umich.edu 5186384Sgblack@eecs.umich.edu 0x1: trunc_l_s({{ 5196384Sgblack@eecs.umich.edu Fd.ud = fpConvert(truncFP(Fs.sf), SINGLE_TO_LONG); 5206384Sgblack@eecs.umich.edu }}); 5216384Sgblack@eecs.umich.edu 5228588Sgblack@eecs.umich.edu 0x2: ceil_l_s({{ 5236384Sgblack@eecs.umich.edu Fd.ud = fpConvert(ceil(Fs.sf), SINGLE_TO_LONG); 5248588Sgblack@eecs.umich.edu }}); 5256384Sgblack@eecs.umich.edu 5268588Sgblack@eecs.umich.edu 0x3: floor_l_s({{ 5276384Sgblack@eecs.umich.edu Fd.ud = fpConvert(floor(Fs.sf), SINGLE_TO_LONG); 5286384Sgblack@eecs.umich.edu }}); 5298588Sgblack@eecs.umich.edu } 5306384Sgblack@eecs.umich.edu 5316384Sgblack@eecs.umich.edu format FloatOp { 5326384Sgblack@eecs.umich.edu 0x4: round_w_s({{ 5336384Sgblack@eecs.umich.edu Fd.uw = fpConvert(roundFP(Fs.sf), SINGLE_TO_WORD); 5346384Sgblack@eecs.umich.edu }}); 5356384Sgblack@eecs.umich.edu 5366384Sgblack@eecs.umich.edu 0x5: trunc_w_s({{ 5376384Sgblack@eecs.umich.edu Fd.uw = fpConvert(truncFP(Fs.sf), SINGLE_TO_WORD); 5386384Sgblack@eecs.umich.edu }}); 5396384Sgblack@eecs.umich.edu 5404661Sksewell@umich.edu 0x6: ceil_w_s({{ 5414661Sksewell@umich.edu Fd.uw = fpConvert(ceil(Fs.sf), SINGLE_TO_WORD); 5422101SN/A }}); 5434661Sksewell@umich.edu 5444661Sksewell@umich.edu 0x7: floor_w_s({{ 5454661Sksewell@umich.edu Fd.uw = fpConvert(floor(Fs.sf), SINGLE_TO_WORD); 5464661Sksewell@umich.edu }}); 5474661Sksewell@umich.edu } 5486376Sgblack@eecs.umich.edu } 5496376Sgblack@eecs.umich.edu 5506376Sgblack@eecs.umich.edu 0x2: decode FUNCTION_LO { 5516376Sgblack@eecs.umich.edu 0x1: decode MOVCF { 5526376Sgblack@eecs.umich.edu format FloatOp { 5536376Sgblack@eecs.umich.edu 0x0: movf_s({{if (getFPConditionCode(CC) == 0) Fd = Fs;}}); 5546376Sgblack@eecs.umich.edu 0x1: movt_s({{if (getFPConditionCode(CC) == 1) Fd = Fs;}}); 5556376Sgblack@eecs.umich.edu } 5566376Sgblack@eecs.umich.edu } 5576376Sgblack@eecs.umich.edu 5586376Sgblack@eecs.umich.edu format FloatOp { 5596376Sgblack@eecs.umich.edu 0x2: movz_s({{ if (Rt == 0) Fd = Fs; }}); 5606376Sgblack@eecs.umich.edu 0x3: movn_s({{ if (Rt != 0) Fd = Fs; }}); 5616376Sgblack@eecs.umich.edu 0x5: recip_s({{ Fd = 1 / Fs; }}); 5626376Sgblack@eecs.umich.edu 0x6: rsqrt_s({{ Fd = 1 / sqrt(Fs);}}); 5636376Sgblack@eecs.umich.edu } 5645222Sksewell@umich.edu } 5654661Sksewell@umich.edu 5666384Sgblack@eecs.umich.edu 0x4: decode FUNCTION_LO { 5674661Sksewell@umich.edu 5686384Sgblack@eecs.umich.edu format FloatConvertOp { 5696384Sgblack@eecs.umich.edu 0x1: cvt_d_s({{ 5704661Sksewell@umich.edu Fd.ud = fpConvert(Fs.sf, SINGLE_TO_DOUBLE); 5714661Sksewell@umich.edu }}); 5724661Sksewell@umich.edu 5736376Sgblack@eecs.umich.edu 0x4: cvt_w_s({{ 5746376Sgblack@eecs.umich.edu Fd.uw = fpConvert(Fs.sf, SINGLE_TO_WORD); 5756376Sgblack@eecs.umich.edu }}); 5766376Sgblack@eecs.umich.edu } 5776376Sgblack@eecs.umich.edu 5786376Sgblack@eecs.umich.edu format FloatConvertOp { 5796376Sgblack@eecs.umich.edu 0x5: cvt_l_s({{ 5806376Sgblack@eecs.umich.edu Fd.ud = fpConvert(Fs.sf, SINGLE_TO_LONG); 5816376Sgblack@eecs.umich.edu }}); 5826376Sgblack@eecs.umich.edu 5836376Sgblack@eecs.umich.edu 0x6: cvt_ps_st({{ 5846376Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs.uw << 32 | (uint64_t)Ft.uw; 5855222Sksewell@umich.edu }}); 5864661Sksewell@umich.edu } 5876384Sgblack@eecs.umich.edu } 5884661Sksewell@umich.edu 5895222Sksewell@umich.edu 0x6: decode FUNCTION_LO { 5904661Sksewell@umich.edu format FloatCompareOp { 5914661Sksewell@umich.edu 0x0: c_f_s({{ cond = 0; }}); 5924661Sksewell@umich.edu 5936384Sgblack@eecs.umich.edu 0x1: c_un_s({{ 5946384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 5956384Sgblack@eecs.umich.edu cond = 1; 5966384Sgblack@eecs.umich.edu else 5976384Sgblack@eecs.umich.edu cond = 0; 5986384Sgblack@eecs.umich.edu }}); 5996384Sgblack@eecs.umich.edu 6006384Sgblack@eecs.umich.edu 0x2: c_eq_s({{ 6016384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6026384Sgblack@eecs.umich.edu cond = 0; 6036384Sgblack@eecs.umich.edu else 6046384Sgblack@eecs.umich.edu cond = (Fs.sf == Ft.sf); 6056384Sgblack@eecs.umich.edu }}); 6066384Sgblack@eecs.umich.edu 6076384Sgblack@eecs.umich.edu 0x3: c_ueq_s({{ 6086384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6096384Sgblack@eecs.umich.edu cond = 1; 6106384Sgblack@eecs.umich.edu else 6116384Sgblack@eecs.umich.edu cond = (Fs.sf == Ft.sf); 6126384Sgblack@eecs.umich.edu }}); 6136384Sgblack@eecs.umich.edu 6146384Sgblack@eecs.umich.edu 0x4: c_olt_s({{ 6156384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6166384Sgblack@eecs.umich.edu cond = 0; 6176384Sgblack@eecs.umich.edu else 6186384Sgblack@eecs.umich.edu cond = (Fs.sf < Ft.sf); 6196384Sgblack@eecs.umich.edu }}); 6204661Sksewell@umich.edu 6216384Sgblack@eecs.umich.edu 0x5: c_ult_s({{ 6224661Sksewell@umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6234661Sksewell@umich.edu cond = 1; 6244661Sksewell@umich.edu else 6256376Sgblack@eecs.umich.edu cond = (Fs.sf < Ft.sf); 6266376Sgblack@eecs.umich.edu }}); 6276376Sgblack@eecs.umich.edu 6286376Sgblack@eecs.umich.edu 0x6: c_ole_s({{ 6296376Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6304661Sksewell@umich.edu cond = 0; 6314661Sksewell@umich.edu else 6326376Sgblack@eecs.umich.edu cond = (Fs.sf <= Ft.sf); 6334661Sksewell@umich.edu }}); 6346376Sgblack@eecs.umich.edu 6356376Sgblack@eecs.umich.edu 0x7: c_ule_s({{ 6366376Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6376376Sgblack@eecs.umich.edu cond = 1; 6386376Sgblack@eecs.umich.edu else 6396376Sgblack@eecs.umich.edu cond = (Fs.sf <= Ft.sf); 6404661Sksewell@umich.edu }}); 6416376Sgblack@eecs.umich.edu } 6424661Sksewell@umich.edu } 6436384Sgblack@eecs.umich.edu 6442101SN/A 0x7: decode FUNCTION_LO { 6452101SN/A format FloatCompareWithXcptOp { 6462101SN/A 0x0: c_sf_s({{ cond = 0; }}); 6476384Sgblack@eecs.umich.edu 6486384Sgblack@eecs.umich.edu 0x1: c_ngle_s({{ 6496384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6506384Sgblack@eecs.umich.edu cond = 1; 6516384Sgblack@eecs.umich.edu else 6526384Sgblack@eecs.umich.edu cond = 0; 6536384Sgblack@eecs.umich.edu }}); 6546384Sgblack@eecs.umich.edu 6557792Sgblack@eecs.umich.edu 0x2: c_seq_s({{ 6566384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6577792Sgblack@eecs.umich.edu cond = 0; 6586384Sgblack@eecs.umich.edu else 6597792Sgblack@eecs.umich.edu cond = (Fs.sf == Ft.sf); 6606384Sgblack@eecs.umich.edu }}); 6617792Sgblack@eecs.umich.edu 6626384Sgblack@eecs.umich.edu 0x3: c_ngl_s({{ 6636384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6646384Sgblack@eecs.umich.edu cond = 1; 6656384Sgblack@eecs.umich.edu else 6666384Sgblack@eecs.umich.edu cond = (Fs.sf == Ft.sf); 6676384Sgblack@eecs.umich.edu }}); 6686384Sgblack@eecs.umich.edu 6696376Sgblack@eecs.umich.edu 0x4: c_lt_s({{ 6706384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6716384Sgblack@eecs.umich.edu cond = 0; 6726384Sgblack@eecs.umich.edu else 6736384Sgblack@eecs.umich.edu cond = (Fs.sf < Ft.sf); 6745222Sksewell@umich.edu }}); 6756384Sgblack@eecs.umich.edu 6766384Sgblack@eecs.umich.edu 0x5: c_nge_s({{ 6776384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6786384Sgblack@eecs.umich.edu cond = 1; 6796384Sgblack@eecs.umich.edu else 6807792Sgblack@eecs.umich.edu cond = (Fs.sf < Ft.sf); 6816384Sgblack@eecs.umich.edu }}); 6827792Sgblack@eecs.umich.edu 6836384Sgblack@eecs.umich.edu 0x6: c_le_s({{ 6846384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6856384Sgblack@eecs.umich.edu cond = 0; 6866384Sgblack@eecs.umich.edu else 6876384Sgblack@eecs.umich.edu cond = (Fs.sf <= Ft.sf); 6886384Sgblack@eecs.umich.edu }}); 6896384Sgblack@eecs.umich.edu 6906384Sgblack@eecs.umich.edu 0x7: c_ngt_s({{ 6916384Sgblack@eecs.umich.edu if (unorderedFP(Fs.uw) || unorderedFP(Ft.uw)) 6926384Sgblack@eecs.umich.edu cond = 1; 6936384Sgblack@eecs.umich.edu else 6946384Sgblack@eecs.umich.edu cond = (Fs.sf <= Ft.sf); 6956384Sgblack@eecs.umich.edu }}); 6966384Sgblack@eecs.umich.edu } 6976384Sgblack@eecs.umich.edu } 6986384Sgblack@eecs.umich.edu } 6996384Sgblack@eecs.umich.edu 7006384Sgblack@eecs.umich.edu //Table A-15 MIPS32 COP1 Encoding of Function Field When rs=D 7016384Sgblack@eecs.umich.edu 0x1: decode FUNCTION_HI { 7026384Sgblack@eecs.umich.edu 0x0: decode FUNCTION_LO { 7036384Sgblack@eecs.umich.edu format FloatOp { 7046384Sgblack@eecs.umich.edu 0x0: addd({{ Fd.df = Fs.df + Ft.df;}}); 7056384Sgblack@eecs.umich.edu 0x1: subd({{ Fd.df = Fs.df - Ft.df;}}); 7066384Sgblack@eecs.umich.edu 0x2: muld({{ Fd.df = Fs.df * Ft.df;}}); 7076384Sgblack@eecs.umich.edu 0x3: divd({{ Fd.df = Fs.df / Ft.df;}}); 7086384Sgblack@eecs.umich.edu 0x4: sqrtd({{ Fd.df = sqrt(Fs.df);}}); 7096384Sgblack@eecs.umich.edu 0x5: absd({{ Fd.df = fabs(Fs.df);}}); 7106384Sgblack@eecs.umich.edu 0x6: movd({{ Fd.ud = Fs.ud;}}); 7116384Sgblack@eecs.umich.edu 0x7: negd({{ Fd.df = -1 * Fs.df;}}); 7126384Sgblack@eecs.umich.edu } 7136384Sgblack@eecs.umich.edu } 7146384Sgblack@eecs.umich.edu 7156384Sgblack@eecs.umich.edu 0x1: decode FUNCTION_LO { 7165222Sksewell@umich.edu format Float64Op { 7176384Sgblack@eecs.umich.edu 0x0: round_l_d({{ 7186384Sgblack@eecs.umich.edu Fd.ud = convert_and_round(Fs.ud, DOUBLE_TO_LONG, RND_NEAREST); 7196384Sgblack@eecs.umich.edu }}); 7206384Sgblack@eecs.umich.edu 7216384Sgblack@eecs.umich.edu 0x1: trunc_l_d({{ 7226384Sgblack@eecs.umich.edu Fd.ud = convert_and_round(Fs.ud, DOUBLE_TO_LONG, RND_ZERO); 7236384Sgblack@eecs.umich.edu }}); 7246384Sgblack@eecs.umich.edu 7256384Sgblack@eecs.umich.edu 0x2: ceil_l_d({{ 7266384Sgblack@eecs.umich.edu Fd.ud = convert_and_round(Fs.ud, DOUBLE_TO_LONG, RND_UP); 7276384Sgblack@eecs.umich.edu }}); 7286384Sgblack@eecs.umich.edu 7296384Sgblack@eecs.umich.edu 0x3: floor_l_d({{ 7306384Sgblack@eecs.umich.edu Fd.ud = convert_and_round(Fs.ud, DOUBLE_TO_LONG, RND_DOWN); 7316384Sgblack@eecs.umich.edu }}); 7325222Sksewell@umich.edu } 7336384Sgblack@eecs.umich.edu 7346384Sgblack@eecs.umich.edu format FloatOp { 7356384Sgblack@eecs.umich.edu 0x4: round_w_d({{ 7366384Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, DOUBLE_TO_WORD, RND_NEAREST); 7376384Sgblack@eecs.umich.edu }}); 7386384Sgblack@eecs.umich.edu 7396384Sgblack@eecs.umich.edu 0x5: trunc_w_d({{ 7406384Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, DOUBLE_TO_WORD, RND_ZERO); 7416384Sgblack@eecs.umich.edu }}); 7426384Sgblack@eecs.umich.edu 7436384Sgblack@eecs.umich.edu 0x6: ceil_w_d({{ 7446384Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, DOUBLE_TO_WORD, RND_UP); 7456384Sgblack@eecs.umich.edu }}); 7466384Sgblack@eecs.umich.edu 7476384Sgblack@eecs.umich.edu 0x7: floor_w_d({{ 7486384Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, DOUBLE_TO_WORD, RND_DOWN); 7496384Sgblack@eecs.umich.edu }}); 7506384Sgblack@eecs.umich.edu } 7516384Sgblack@eecs.umich.edu } 7526384Sgblack@eecs.umich.edu 7536384Sgblack@eecs.umich.edu 0x2: decode FUNCTION_LO { 7546384Sgblack@eecs.umich.edu 0x1: decode MOVCF { 7556384Sgblack@eecs.umich.edu format FloatOp { 7566384Sgblack@eecs.umich.edu 0x0: movfd({{if (xc->readMiscReg(FPCR) != CC) Fd.df = Fs.df; }}); 7576384Sgblack@eecs.umich.edu 0x1: movtd({{if (xc->readMiscReg(FPCR) == CC) Fd.df = Fs.df; }}); 7586384Sgblack@eecs.umich.edu } 7596384Sgblack@eecs.umich.edu } 7606384Sgblack@eecs.umich.edu 7616384Sgblack@eecs.umich.edu format BasicOp { 7626384Sgblack@eecs.umich.edu 0x2: movzd({{ if (Rt == 0) Fd.df = Fs.df; }}); 7636384Sgblack@eecs.umich.edu 0x3: movnd({{ if (Rt != 0) Fd.df = Fs.df; }}); 7646384Sgblack@eecs.umich.edu } 7656384Sgblack@eecs.umich.edu 7666384Sgblack@eecs.umich.edu format Float64Op { 7676384Sgblack@eecs.umich.edu 0x5: recipd({{ Fd.df = 1 / Fs.df}}); 7686384Sgblack@eecs.umich.edu 0x6: rsqrtd({{ Fd.df = 1 / sqrt(Fs.df) }}); 7696384Sgblack@eecs.umich.edu } 7705222Sksewell@umich.edu } 7716384Sgblack@eecs.umich.edu 7726384Sgblack@eecs.umich.edu 0x4: decode FUNCTION_LO { 7736384Sgblack@eecs.umich.edu format FloatOp { 7746384Sgblack@eecs.umich.edu 0x0: cvt_s_d({{ 7756384Sgblack@eecs.umich.edu int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 7766384Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, DOUBLE_TO_SINGLE, rnd_mode); 7776384Sgblack@eecs.umich.edu }}); 7786384Sgblack@eecs.umich.edu 7796384Sgblack@eecs.umich.edu 0x4: cvt_w_d({{ 7806384Sgblack@eecs.umich.edu int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 7816384Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, DOUBLE_TO_WORD, rnd_mode); 7826384Sgblack@eecs.umich.edu }}); 7836384Sgblack@eecs.umich.edu } 7846384Sgblack@eecs.umich.edu 7856384Sgblack@eecs.umich.edu //only legal for 64 bit 7866384Sgblack@eecs.umich.edu format Float64Op { 7876384Sgblack@eecs.umich.edu 0x5: cvt_l_d({{ 7886384Sgblack@eecs.umich.edu int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 7896384Sgblack@eecs.umich.edu Fd.ud = convert_and_round(Fs.ud, DOUBLE_TO_LONG, rnd_mode); 7906384Sgblack@eecs.umich.edu }}); 7916384Sgblack@eecs.umich.edu } 7926384Sgblack@eecs.umich.edu } 7936384Sgblack@eecs.umich.edu 7946384Sgblack@eecs.umich.edu 0x6: decode FUNCTION_LO { 7956384Sgblack@eecs.umich.edu format FloatCompareOp { 7966384Sgblack@eecs.umich.edu 0x0: c_f_d({{ cond = 0; }}); 7976384Sgblack@eecs.umich.edu 7985222Sksewell@umich.edu 0x1: c_un_d({{ 7996384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8006384Sgblack@eecs.umich.edu cond = 1; 8016384Sgblack@eecs.umich.edu else 8026384Sgblack@eecs.umich.edu cond = 0; 8036384Sgblack@eecs.umich.edu }}); 8046384Sgblack@eecs.umich.edu 8056384Sgblack@eecs.umich.edu 0x2: c_eq_d({{ 8066384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8076384Sgblack@eecs.umich.edu cond = 0; 8086384Sgblack@eecs.umich.edu else 8096384Sgblack@eecs.umich.edu cond = (Fs.df == Ft.df); 8106384Sgblack@eecs.umich.edu }}); 8116384Sgblack@eecs.umich.edu 8126384Sgblack@eecs.umich.edu 0x3: c_ueq_d({{ 8136384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8146384Sgblack@eecs.umich.edu cond = 1; 8156384Sgblack@eecs.umich.edu else 8166384Sgblack@eecs.umich.edu cond = (Fs.df == Ft.df); 8176384Sgblack@eecs.umich.edu }}); 8186384Sgblack@eecs.umich.edu 8196384Sgblack@eecs.umich.edu 0x4: c_olt_d({{ 8206384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8216384Sgblack@eecs.umich.edu cond = 0; 8226384Sgblack@eecs.umich.edu else 8236384Sgblack@eecs.umich.edu cond = (Fs.df < Ft.df); 8246384Sgblack@eecs.umich.edu }}); 8256384Sgblack@eecs.umich.edu 8266384Sgblack@eecs.umich.edu 0x5: c_ult_d({{ 8276384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8286384Sgblack@eecs.umich.edu cond = 1; 8296384Sgblack@eecs.umich.edu else 8306384Sgblack@eecs.umich.edu cond = (Fs.df < Ft.df); 8316384Sgblack@eecs.umich.edu }}); 8326384Sgblack@eecs.umich.edu 8336384Sgblack@eecs.umich.edu 0x6: c_ole_d({{ 8346384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8356384Sgblack@eecs.umich.edu cond = 0; 8365222Sksewell@umich.edu else 8376384Sgblack@eecs.umich.edu cond = (Fs.df <= Ft.df); 8386384Sgblack@eecs.umich.edu }}); 8396384Sgblack@eecs.umich.edu 8406384Sgblack@eecs.umich.edu 0x7: c_ule_d({{ 8416384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8426384Sgblack@eecs.umich.edu cond = 1; 8436384Sgblack@eecs.umich.edu else 8446384Sgblack@eecs.umich.edu cond = (Fs.df <= Ft.df); 8456384Sgblack@eecs.umich.edu }}); 8466384Sgblack@eecs.umich.edu } 8476384Sgblack@eecs.umich.edu } 8482101SN/A 8496384Sgblack@eecs.umich.edu 0x7: decode FUNCTION_LO { 8506384Sgblack@eecs.umich.edu format FloatCompareWithXcptOp { 8516384Sgblack@eecs.umich.edu 0x0: c_sf_d({{ cond = 0; }}); 8526384Sgblack@eecs.umich.edu 8536384Sgblack@eecs.umich.edu 0x1: c_ngle_d({{ 8546384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8556384Sgblack@eecs.umich.edu cond = 1; 8566384Sgblack@eecs.umich.edu else 8576384Sgblack@eecs.umich.edu cond = 0; 8586384Sgblack@eecs.umich.edu }}); 8596384Sgblack@eecs.umich.edu 8606384Sgblack@eecs.umich.edu 0x2: c_seq_d({{ 8616384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8626385Sgblack@eecs.umich.edu cond = 0; 8636384Sgblack@eecs.umich.edu else 8646384Sgblack@eecs.umich.edu cond = (Fs.df == Ft.df); 8656384Sgblack@eecs.umich.edu }}); 8666384Sgblack@eecs.umich.edu 8676384Sgblack@eecs.umich.edu 0x3: c_ngl_d({{ 8686384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8696384Sgblack@eecs.umich.edu cond = 1; 8706384Sgblack@eecs.umich.edu else 8716384Sgblack@eecs.umich.edu cond = (Fs.df == Ft.df); 8726384Sgblack@eecs.umich.edu }}); 8736384Sgblack@eecs.umich.edu 8746384Sgblack@eecs.umich.edu 0x4: c_lt_d({{ 8756384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8762101SN/A cond = 0; 8772043SN/A else 8782027SN/A cond = (Fs.df < Ft.df); 8792101SN/A }}); 8802101SN/A 8812101SN/A 0x5: c_nge_d({{ 8822101SN/A if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8832686Sksewell@umich.edu cond = 1; 8848588Sgblack@eecs.umich.edu else 8852495SN/A cond = (Fs.df < Ft.df); 8862495SN/A }}); 8876384Sgblack@eecs.umich.edu 8882573SN/A 0x6: c_le_d({{ 8892616SN/A if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8902573SN/A cond = 0; 8912573SN/A else 8926384Sgblack@eecs.umich.edu cond = (Fs.df <= Ft.df); 8936384Sgblack@eecs.umich.edu }}); 8942573SN/A 8952573SN/A 0x7: c_ngt_d({{ 8966384Sgblack@eecs.umich.edu if (unorderedFP(Fs.ud) || unorderedFP(Ft.ud)) 8972573SN/A cond = 1; 8982573SN/A else 8996384Sgblack@eecs.umich.edu cond = (Fs.df <= Ft.df); 9006384Sgblack@eecs.umich.edu }}); 9016384Sgblack@eecs.umich.edu } 9022573SN/A } 9032573SN/A } 9042616SN/A 9052573SN/A //Table A-16 MIPS32 COP1 Encoding of Function Field When rs=W 9062573SN/A 0x4: decode FUNCTION { 9075222Sksewell@umich.edu format FloatOp { 9082573SN/A 0x20: cvt_s_w({{ 9092573SN/A int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 9102573SN/A Fd.uw = convert_and_round(Fs.sf, WORD_TO_SINGLE, rnd_mode); 9118588Sgblack@eecs.umich.edu }}); 9122686Sksewell@umich.edu 9138588Sgblack@eecs.umich.edu 0x21: cvt_d_w({{ 9142686Sksewell@umich.edu int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 9152573SN/A Fd.ud = convert_and_round(Fs.sf, WORD_TO_DOUBLE, rnd_mode); 9166384Sgblack@eecs.umich.edu }}); 9172573SN/A } 9188588Sgblack@eecs.umich.edu } 9196384Sgblack@eecs.umich.edu 9206384Sgblack@eecs.umich.edu //Table A-16 MIPS32 COP1 Encoding of Function Field When rs=L1 9212573SN/A //Note: "1. Format type L is legal only if 64-bit floating point operations 9222573SN/A //are enabled." 9236384Sgblack@eecs.umich.edu 0x5: decode FUNCTION_HI { 9248588Sgblack@eecs.umich.edu format Float64Op { 9256384Sgblack@eecs.umich.edu 0x10: cvt_s_l({{ 9268588Sgblack@eecs.umich.edu int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 9276384Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, LONG_TO_SINGLE, rnd_mode); 9282573SN/A }}); 9292573SN/A 9306384Sgblack@eecs.umich.edu 0x11: cvt_d_l({{ 9318588Sgblack@eecs.umich.edu int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 9326384Sgblack@eecs.umich.edu Fd.ud = convert_and_round(Fs.ud, LONG_TO_DOUBLE, rnd_mode); 9338588Sgblack@eecs.umich.edu }}); 9346384Sgblack@eecs.umich.edu } 9358588Sgblack@eecs.umich.edu } 9362573SN/A 9372573SN/A //Table A-17 MIPS64 COP1 Encoding of Function Field When rs=PS1 9388588Sgblack@eecs.umich.edu //Note: "1. Format type PS is legal only if 64-bit floating point operations 9392573SN/A //are enabled. " 9402573SN/A 0x6: decode FUNCTION_HI { 9412573SN/A 0x0: decode FUNCTION_LO { 9426384Sgblack@eecs.umich.edu format Float64Op { 9436384Sgblack@eecs.umich.edu 0x0: addps({{ //Must Check for Exception Here... Supposed to Operate on Upper and 9446384Sgblack@eecs.umich.edu //Lower Halves Independently but we take simulator shortcut 9456384Sgblack@eecs.umich.edu Fd.df = Fs.df + Ft.df; 9462495SN/A }}); 9472495SN/A 9482686Sksewell@umich.edu 0x1: subps({{ //Must Check for Exception Here... Supposed to Operate on Upper and 9492686Sksewell@umich.edu //Lower Halves Independently but we take simulator shortcut 9508588Sgblack@eecs.umich.edu Fd.df = Fs.df - Ft.df; 9518588Sgblack@eecs.umich.edu }}); 9528588Sgblack@eecs.umich.edu 9532686Sksewell@umich.edu 0x2: mulps({{ //Must Check for Exception Here... Supposed to Operate on Upper and 9542686Sksewell@umich.edu //Lower Halves Independently but we take simulator shortcut 9552101SN/A Fd.df = Fs.df * Ft.df; 9565222Sksewell@umich.edu }}); 9575222Sksewell@umich.edu 9585222Sksewell@umich.edu 0x5: absps({{ //Must Check for Exception Here... Supposed to Operate on Upper and 9595222Sksewell@umich.edu //Lower Halves Independently but we take simulator shortcut 9606384Sgblack@eecs.umich.edu Fd.df = fabs(Fs.df); 9612025SN/A }}); 9626384Sgblack@eecs.umich.edu 9636384Sgblack@eecs.umich.edu 0x6: movps({{ //Must Check for Exception Here... Supposed to Operate on Upper and 9646384Sgblack@eecs.umich.edu //Lower Halves Independently but we take simulator shortcut 9656384Sgblack@eecs.umich.edu //Fd.df = Fs<31:0> | Ft<31:0>; 9666384Sgblack@eecs.umich.edu }}); 9676384Sgblack@eecs.umich.edu 9686384Sgblack@eecs.umich.edu 0x7: negps({{ //Must Check for Exception Here... Supposed to Operate on Upper and 9696384Sgblack@eecs.umich.edu //Lower Halves Independently but we take simulator shortcut 9706384Sgblack@eecs.umich.edu Fd.df = -1 * Fs.df; 9716384Sgblack@eecs.umich.edu }}); 9726384Sgblack@eecs.umich.edu } 9736384Sgblack@eecs.umich.edu } 9746384Sgblack@eecs.umich.edu 9756384Sgblack@eecs.umich.edu 0x2: decode FUNCTION_LO { 9766384Sgblack@eecs.umich.edu 0x1: decode MOVCF { 9776384Sgblack@eecs.umich.edu format Float64Op { 9786384Sgblack@eecs.umich.edu 0x0: movfps({{if (xc->readMiscReg(FPCR) != CC) Fd = Fs;}}); 9796384Sgblack@eecs.umich.edu 0x1: movtps({{if (xc->readMiscReg(FPCR) == CC) Fd = Fs;}}); 9806384Sgblack@eecs.umich.edu } 9816384Sgblack@eecs.umich.edu } 9826384Sgblack@eecs.umich.edu 9836384Sgblack@eecs.umich.edu format BasicOp { 9846384Sgblack@eecs.umich.edu 0x2: movzps({{if (xc->readMiscReg(FPCR) != CC) Fd = Fs; }}); 9856384Sgblack@eecs.umich.edu 0x3: movnps({{if (xc->readMiscReg(FPCR) == CC) Fd = Fs; }}); 9866384Sgblack@eecs.umich.edu } 9876384Sgblack@eecs.umich.edu 9886384Sgblack@eecs.umich.edu } 9892043SN/A 9902027SN/A 0x4: decode FUNCTION_LO { 9912101SN/A 0x0: Float64Op::cvt_s_pu({{ 9922101SN/A int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 9936384Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, PUPPER_TO_SINGLE, rnd_mode); 9946384Sgblack@eecs.umich.edu }}); 9952572SN/A } 9962572SN/A 9972101SN/A 0x5: decode FUNCTION_LO { 9988588Sgblack@eecs.umich.edu format Float64Op { 9998588Sgblack@eecs.umich.edu 0x0: cvt_s_pl({{ 10008588Sgblack@eecs.umich.edu int rnd_mode = xc->readMiscReg(FCSR) & 0x03; 10018588Sgblack@eecs.umich.edu Fd.uw = convert_and_round(Fs.ud, PLOWER_TO_SINGLE, 10028588Sgblack@eecs.umich.edu rnd_mode); 10038588Sgblack@eecs.umich.edu }}); 10048588Sgblack@eecs.umich.edu 10052101SN/A 0x4: pll({{ Fd.ud = Fs.ud<31:0> << 32 | Ft.ud<31:0>; }}); 10068588Sgblack@eecs.umich.edu 0x5: plu({{ Fd.ud = Fs.ud<31:0> << 32 | Ft.ud<63:32>;}}); 10072101SN/A 0x6: pul({{ Fd.ud = Fs.ud<63:32> << 32 | Ft.ud<31:0>; }}); 10082572SN/A 0x7: puu({{ Fd.ud = Fs.ud<63:32> << 32 | Ft.ud<63:32>;}}); 10092686Sksewell@umich.edu } 10108588Sgblack@eecs.umich.edu } 10116384Sgblack@eecs.umich.edu 10128588Sgblack@eecs.umich.edu 0x6: decode FUNCTION_LO { 10136384Sgblack@eecs.umich.edu format FloatOp { 10148588Sgblack@eecs.umich.edu 0x0: c_f_ps({{ ; }}); 10156384Sgblack@eecs.umich.edu 0x1: c_un_ps({{ ; }}); 10168588Sgblack@eecs.umich.edu 0x2: c_eq_ps({{ ; }}); 10176384Sgblack@eecs.umich.edu 0x3: c_ueq_ps({{ ; }}); 10188588Sgblack@eecs.umich.edu 0x4: c_olt_ps({{ ; }}); 10196384Sgblack@eecs.umich.edu 0x5: c_ult_ps({{ ; }}); 10208588Sgblack@eecs.umich.edu 0x6: c_ole_ps({{ ; }}); 10216384Sgblack@eecs.umich.edu 0x7: c_ule_ps({{ ; }}); 10228588Sgblack@eecs.umich.edu } 10236384Sgblack@eecs.umich.edu } 10248588Sgblack@eecs.umich.edu 10256384Sgblack@eecs.umich.edu 0x7: decode FUNCTION_LO { 10262101SN/A format FloatOp { 10272101SN/A 0x0: c_sf_ps({{ ; }}); 10282027SN/A 0x1: c_ngle_ps({{ ; }}); 10292572SN/A 0x2: c_seq_ps({{ ; }}); 10302101SN/A 0x3: c_ngl_ps({{ ; }}); 10312686Sksewell@umich.edu 0x4: c_lt_ps({{ ; }}); 10326384Sgblack@eecs.umich.edu 0x5: c_nge_ps({{ ; }}); 10336384Sgblack@eecs.umich.edu 0x6: c_le_ps({{ ; }}); 10346384Sgblack@eecs.umich.edu 0x7: c_ngt_ps({{ ; }}); 10356384Sgblack@eecs.umich.edu } 10366384Sgblack@eecs.umich.edu } 10376384Sgblack@eecs.umich.edu 10386384Sgblack@eecs.umich.edu } 10396384Sgblack@eecs.umich.edu } 10402101SN/A } 10412101SN/A } 10422027SN/A 10432686Sksewell@umich.edu //Table A-19 MIPS32 COP2 Encoding of rs Field 10442686Sksewell@umich.edu 0x2: decode RS_MSB { 10452686Sksewell@umich.edu 0x0: decode RS_HI { 10462686Sksewell@umich.edu 0x0: decode RS_LO { 10472686Sksewell@umich.edu format WarnUnimpl { 10482602SN/A 0x0: mfc2(); 10492602SN/A 0x2: cfc2(); 10506384Sgblack@eecs.umich.edu 0x3: mfhc2(); 10512101SN/A 0x4: mtc2(); 10525222Sksewell@umich.edu 0x6: ctc2(); 10536384Sgblack@eecs.umich.edu 0x7: mftc2(); 10545222Sksewell@umich.edu } 10552101SN/A } 10565222Sksewell@umich.edu 10572027SN/A 0x1: decode ND { 10582572SN/A 0x0: decode TF { 10592603SN/A format WarnUnimpl { 10608588Sgblack@eecs.umich.edu 0x0: bc2f(); 10618588Sgblack@eecs.umich.edu 0x1: bc2t(); 10628588Sgblack@eecs.umich.edu } 10632101SN/A } 10642055SN/A 10652686Sksewell@umich.edu 0x1: decode TF { 10668588Sgblack@eecs.umich.edu format WarnUnimpl { 10678588Sgblack@eecs.umich.edu 0x0: bc2fl(); 10686384Sgblack@eecs.umich.edu 0x1: bc2tl(); 10695222Sksewell@umich.edu } 10706384Sgblack@eecs.umich.edu } 10715222Sksewell@umich.edu } 10722101SN/A } 10735222Sksewell@umich.edu } 10742602SN/A 10752602SN/A //Table A-20 MIPS64 COP1X Encoding of Function Field 1 10762603SN/A //Note: "COP1X instructions are legal only if 64-bit floating point 10776384Sgblack@eecs.umich.edu //operations are enabled." 10786384Sgblack@eecs.umich.edu 0x3: decode FUNCTION_HI { 10796384Sgblack@eecs.umich.edu 0x0: decode FUNCTION_LO { 10806384Sgblack@eecs.umich.edu format LoadFloatMemory { 10818588Sgblack@eecs.umich.edu 0x0: lwxc1({{ Ft.uw = Mem.uw;}}, {{ EA = Rs + Rt; }}); 10822686Sksewell@umich.edu 0x1: ldxc1({{ Ft.ud = Mem.ud;}}, {{ EA = Rs + Rt; }}); 10838588Sgblack@eecs.umich.edu 0x5: luxc1({{ Ft.uw = Mem.ud;}}, {{ EA = Rs + Rt; }}); 10842686Sksewell@umich.edu } 10858588Sgblack@eecs.umich.edu } 10862686Sksewell@umich.edu 10878588Sgblack@eecs.umich.edu 0x1: decode FUNCTION_LO { 10882686Sksewell@umich.edu format StoreFloatMemory { 10898588Sgblack@eecs.umich.edu 0x0: swxc1({{ Mem.uw = Ft.uw;}}, {{ EA = Rs + Rt; }}); 10902686Sksewell@umich.edu 0x1: sdxc1({{ Mem.ud = Ft.ud;}}, {{ EA = Rs + Rt; }}); 10918588Sgblack@eecs.umich.edu 0x5: suxc1({{ Mem.ud = Ft.ud;}}, {{ EA = Rs + Rt; }}); 10922686Sksewell@umich.edu } 10932602SN/A 10942602SN/A 0x7: WarnUnimpl::prefx(); 10952602SN/A } 10962602SN/A 10972686Sksewell@umich.edu format FloatOp { 10982686Sksewell@umich.edu 0x3: WarnUnimpl::alnv_ps(); 10992686Sksewell@umich.edu 11002686Sksewell@umich.edu format BasicOp { 11012686Sksewell@umich.edu 0x4: decode FUNCTION_LO { 11028588Sgblack@eecs.umich.edu 0x0: madd_s({{ Fd.sf = (Fs.sf * Fs.sf) + Fr.sf; }}); 11032686Sksewell@umich.edu 0x1: madd_d({{ Fd.df = (Fs.df * Fs.df) + Fr.df; }}); 11048588Sgblack@eecs.umich.edu 0x6: madd_ps({{ 11052686Sksewell@umich.edu //Must Check for Exception Here... Supposed to Operate on Upper and 11068588Sgblack@eecs.umich.edu //Lower Halves Independently but we take simulator shortcut 11072686Sksewell@umich.edu Fd.df = (Fs.df * Fs.df) + Fr.df; 11088588Sgblack@eecs.umich.edu }}); 11092686Sksewell@umich.edu } 11108588Sgblack@eecs.umich.edu 11112686Sksewell@umich.edu 0x5: decode FUNCTION_LO { 11128588Sgblack@eecs.umich.edu 0x0: msub_s({{ Fd.sf = (Fs.sf * Fs.sf) - Fr.sf; }}); 11132686Sksewell@umich.edu 0x1: msub_d({{ Fd.df = (Fs.df * Fs.df) - Fr.df; }}); 11142602SN/A 0x6: msub_ps({{ 11152602SN/A //Must Check for Exception Here... Supposed to Operate on Upper and 11162101SN/A //Lower Halves Independently but we take simulator shortcut 11172055SN/A Fd.df = (Fs.df * Fs.df) - Fr.df; 11186384Sgblack@eecs.umich.edu }}); 11196384Sgblack@eecs.umich.edu } 11202572SN/A 11212572SN/A 0x6: decode FUNCTION_LO { 11222101SN/A 0x0: nmadd_s({{ Fd.sf = (-1 * Fs.sf * Fs.sf) - Fr.sf; }}); 11238588Sgblack@eecs.umich.edu 0x1: nmadd_d({{ Fd.df = (-1 * Fs.df * Fs.df) + Fr.df; }}); 11248588Sgblack@eecs.umich.edu 0x6: nmadd_ps({{ 11258588Sgblack@eecs.umich.edu //Must Check for Exception Here... Supposed to Operate on Upper and 11268588Sgblack@eecs.umich.edu //Lower Halves Independently but we take simulator shortcut 11278588Sgblack@eecs.umich.edu Fd.df = (-1 * Fs.df * Fs.df) + Fr.df; 11288588Sgblack@eecs.umich.edu }}); 11298588Sgblack@eecs.umich.edu } 11302101SN/A 11318588Sgblack@eecs.umich.edu 0x7: decode FUNCTION_LO { 11322101SN/A 0x0: nmsub_s({{ Fd.sf = (-1 * Fs.sf * Fs.sf) - Fr.sf; }}); 11332027SN/A 0x1: nmsub_d({{ Fd.df = (-1 * Fs.df * Fs.df) - Fr.df; }}); 11342572SN/A 0x6: nmsub_ps({{ 11352686Sksewell@umich.edu //Must Check for Exception Here... Supposed to Operate on Upper and 11368588Sgblack@eecs.umich.edu //Lower Halves Independently but we take simulator shortcut 11376384Sgblack@eecs.umich.edu Fd.df = (-1 * Fs.df * Fs.df) + Fr.df; 11388588Sgblack@eecs.umich.edu }}); 11396384Sgblack@eecs.umich.edu } 11408588Sgblack@eecs.umich.edu } 11416384Sgblack@eecs.umich.edu } 11428588Sgblack@eecs.umich.edu } 11436384Sgblack@eecs.umich.edu 11448588Sgblack@eecs.umich.edu //MIPS obsolete instructions 11456384Sgblack@eecs.umich.edu format BranchLikely { 11468588Sgblack@eecs.umich.edu 0x4: beql({{ cond = (Rs.sw == 0); }}); 11476384Sgblack@eecs.umich.edu 0x5: bnel({{ cond = (Rs.sw != 0); }}); 11488588Sgblack@eecs.umich.edu 0x6: blezl({{ cond = (Rs.sw <= 0); }}); 11496384Sgblack@eecs.umich.edu 0x7: bgtzl({{ cond = (Rs.sw > 0); }}); 11508588Sgblack@eecs.umich.edu } 11516384Sgblack@eecs.umich.edu } 11522101SN/A 11532101SN/A 0x3: decode OPCODE_LO default FailUnimpl::reserved() { 11542027SN/A 11552572SN/A //Table A-5 MIPS32 SPECIAL2 Encoding of Function Field 11562101SN/A 0x4: decode FUNCTION_HI { 11572686Sksewell@umich.edu 11586384Sgblack@eecs.umich.edu 0x0: decode FUNCTION_LO { 11598588Sgblack@eecs.umich.edu format IntOp { 11608588Sgblack@eecs.umich.edu 0x0: madd({{ 11616384Sgblack@eecs.umich.edu int64_t temp1 = xc->readMiscReg(Hi) << 32 | xc->readMiscReg(Lo) >> 32; 11626384Sgblack@eecs.umich.edu temp1 = temp1 + (Rs.sw * Rt.sw); 11638588Sgblack@eecs.umich.edu xc->setMiscReg(Hi,temp1<63:32>); 11648588Sgblack@eecs.umich.edu xc->setMiscReg(Lo,temp1<31:0>); 11656384Sgblack@eecs.umich.edu }}); 11662101SN/A 11672101SN/A 0x1: maddu({{ 11682027SN/A int64_t temp1 = xc->readMiscReg(Hi) << 32 | xc->readMiscReg(Lo) >> 32; 11692101SN/A temp1 = temp1 + (Rs.uw * Rt.uw); 11706384Sgblack@eecs.umich.edu xc->setMiscReg(Hi,temp1<63:32>); 11718588Sgblack@eecs.umich.edu xc->setMiscReg(Lo,temp1<31:0>); 11726384Sgblack@eecs.umich.edu }}); 11736384Sgblack@eecs.umich.edu 11748588Sgblack@eecs.umich.edu 0x2: mul({{ Rd.sw = Rs.sw * Rt.sw; }}); 11756384Sgblack@eecs.umich.edu 11762101SN/A 0x4: msub({{ 11772027SN/A int64_t temp1 = xc->readMiscReg(Hi) << 32 | xc->readMiscReg(Lo) >> 32; 11782605SN/A temp1 = temp1 - (Rs.sw * Rt.sw); 11798588Sgblack@eecs.umich.edu xc->setMiscReg(Hi,temp1<63:32>); 11808588Sgblack@eecs.umich.edu xc->setMiscReg(Lo,temp1<31:0>); 11812101SN/A }}); 11825222Sksewell@umich.edu 11836384Sgblack@eecs.umich.edu 0x5: msubu({{ 11845222Sksewell@umich.edu int64_t temp1 = xc->readMiscReg(Hi) << 32 | xc->readMiscReg(Lo) >> 32; 11855222Sksewell@umich.edu temp1 = temp1 - (Rs.uw * Rt.uw); 11862101SN/A xc->setMiscReg(Hi,temp1<63:32>); 11872572SN/A xc->setMiscReg(Lo,temp1<31:0>); 11882686Sksewell@umich.edu }}); 11898588Sgblack@eecs.umich.edu } 11908588Sgblack@eecs.umich.edu } 11918588Sgblack@eecs.umich.edu 11922101SN/A 0x4: decode FUNCTION_LO { 11936384Sgblack@eecs.umich.edu format BasicOp { 11942101SN/A 0x0: clz({{ 11952602SN/A int cnt = 0; 11962602SN/A uint32_t mask = 0x80000000; 11972604SN/A for (int i=0; i < 32; i++) 11986384Sgblack@eecs.umich.edu if( (Rs & mask) == 0) { 11996384Sgblack@eecs.umich.edu cnt++; 12006384Sgblack@eecs.umich.edu } else { 12016384Sgblack@eecs.umich.edu break; 12028588Sgblack@eecs.umich.edu } 12032686Sksewell@umich.edu } 12048588Sgblack@eecs.umich.edu Rd.uw = cnt; 12052686Sksewell@umich.edu }}); 12068588Sgblack@eecs.umich.edu 12072686Sksewell@umich.edu 0x1: clo({{ 12088588Sgblack@eecs.umich.edu int cnt = 0; 12092686Sksewell@umich.edu uint32_t mask = 0x80000000; 12108588Sgblack@eecs.umich.edu for (int i=0; i < 32; i++) 12112686Sksewell@umich.edu if( (Rs & mask) != 0) { 12128588Sgblack@eecs.umich.edu cnt++; 12132686Sksewell@umich.edu } else { 12142602SN/A break; 12152602SN/A } 12162602SN/A } 12172602SN/A Rd.uw = cnt; 12182686Sksewell@umich.edu }}); 12192686Sksewell@umich.edu } 12202686Sksewell@umich.edu } 12212686Sksewell@umich.edu 12222686Sksewell@umich.edu 0x7: decode FUNCTION_LO { 12238588Sgblack@eecs.umich.edu 0x7: WarnUnimpl::sdbbp(); 12242686Sksewell@umich.edu } 12258588Sgblack@eecs.umich.edu } 12262686Sksewell@umich.edu 12278588Sgblack@eecs.umich.edu //Table A-6 MIPS32 SPECIAL3 Encoding of Function Field for Release 2 of the Architecture 12282686Sksewell@umich.edu 0x7: decode FUNCTION_HI { 12298588Sgblack@eecs.umich.edu 12302686Sksewell@umich.edu 0x0: decode FUNCTION_LO { 12318588Sgblack@eecs.umich.edu format FailUnimpl { 12322686Sksewell@umich.edu 0x1: ext(); 12338588Sgblack@eecs.umich.edu 0x4: ins(); 12342686Sksewell@umich.edu } 12352602SN/A } 12362602SN/A 12376384Sgblack@eecs.umich.edu 0x1: decode FUNCTION_LO { 12382101SN/A format FailUnimpl { 12395222Sksewell@umich.edu 0x0: fork(); 12405222Sksewell@umich.edu 0x1: yield(); 12415222Sksewell@umich.edu } 12422027SN/A } 12436384Sgblack@eecs.umich.edu 12446384Sgblack@eecs.umich.edu 12452101SN/A //Table A-10 MIPS32 BSHFL Encoding of sa Field 12462605SN/A 0x4: decode SA { 12478588Sgblack@eecs.umich.edu 12488588Sgblack@eecs.umich.edu 0x02: FailUnimpl::wsbh(); 12495222Sksewell@umich.edu 12502101SN/A format BasicOp { 12516384Sgblack@eecs.umich.edu 0x10: seb({{ Rd.sw = Rt<7:0>}}); 12522101SN/A 0x18: seh({{ Rd.sw = Rt<15:0>}}); 12532027SN/A } 12546384Sgblack@eecs.umich.edu } 12556384Sgblack@eecs.umich.edu 12566384Sgblack@eecs.umich.edu 0x6: decode FUNCTION_LO { 12576384Sgblack@eecs.umich.edu 0x7: FailUnimpl::rdhwr();//{{ /*Rt = xc->hwRegs[RD];*/ }} 12582101SN/A } 12592686Sksewell@umich.edu } 12608588Sgblack@eecs.umich.edu } 12618588Sgblack@eecs.umich.edu 12625222Sksewell@umich.edu 0x4: decode OPCODE_LO default FailUnimpl::reserved() { 12632101SN/A format LoadMemory { 12646384Sgblack@eecs.umich.edu 0x0: lb({{ Rt.sw = Mem.sb; }}); 12652101SN/A 0x1: lh({{ Rt.sw = Mem.sh; }}); 12662101SN/A 12676384Sgblack@eecs.umich.edu 0x2: lwl({{ 12686384Sgblack@eecs.umich.edu uint32_t mem_word = Mem.uw; 12696384Sgblack@eecs.umich.edu uint32_t unalign_addr = Rs + disp; 12706384Sgblack@eecs.umich.edu uint32_t offset = unalign_addr & 0x00000003; 12712572SN/A#if BYTE_ORDER == BIG_ENDIAN 12722572SN/A switch(offset) 12732101SN/A { 12742605SN/A case 0: 12758588Sgblack@eecs.umich.edu Rt = mem_word; 12768588Sgblack@eecs.umich.edu break; 12772101SN/A 12782605SN/A case 1: 12798588Sgblack@eecs.umich.edu Rt &= 0x000F; 12808588Sgblack@eecs.umich.edu Rt |= (mem_word << 4); 12812101SN/A break; 12822605SN/A 12838588Sgblack@eecs.umich.edu case 2: 12848588Sgblack@eecs.umich.edu Rt &= 0x00FF; 12852101SN/A Rt |= (mem_word << 8); 12862605SN/A break; 12878588Sgblack@eecs.umich.edu 12888588Sgblack@eecs.umich.edu case 3: 12892101SN/A Rt &= 0x0FFF; 12902605SN/A Rt |= (mem_word << 12); 12918588Sgblack@eecs.umich.edu break; 12928588Sgblack@eecs.umich.edu 12932101SN/A default: 12942605SN/A panic("lwl: bad offset"); 12958588Sgblack@eecs.umich.edu } 12968588Sgblack@eecs.umich.edu#elif BYTE_ORDER == LITTLE_ENDIAN 12972101SN/A switch(offset) 12986384Sgblack@eecs.umich.edu { 12992101SN/A case 0: 13002101SN/A Rt &= 0x0FFF; 13015222Sksewell@umich.edu Rt |= (mem_word << 12); 13022572SN/A break; 13032101SN/A 13042101SN/A case 1: 13052607SN/A Rt &= 0x00FF; 13062686Sksewell@umich.edu Rt |= (mem_word << 8); 13072686Sksewell@umich.edu break; 13082686Sksewell@umich.edu 13092686Sksewell@umich.edu case 2: 13102607SN/A Rt &= 0x000F; 13112607SN/A Rt |= (mem_word << 4); 13122686Sksewell@umich.edu break; 13132686Sksewell@umich.edu 13142686Sksewell@umich.edu case 3: 13152686Sksewell@umich.edu Rt = mem_word; 13162607SN/A break; 13172101SN/A 13182101SN/A default: 13192101SN/A panic("lwl: bad offset"); 13202605SN/A } 13212607SN/A#endif 13222686Sksewell@umich.edu }}, {{ EA = (Rs + disp) & ~3; }}); 13232686Sksewell@umich.edu 13242686Sksewell@umich.edu 0x3: lw({{ Rt.sw = Mem.sw; }}); 13252686Sksewell@umich.edu 0x4: lbu({{ Rt.uw = Mem.ub; }}); 13262607SN/A 0x5: lhu({{ Rt.uw = Mem.uh; }}); 13272607SN/A 0x6: lwr({{ 13282686Sksewell@umich.edu uint32_t mem_word = Mem.uw; 13292686Sksewell@umich.edu uint32_t unalign_addr = Rs + disp; 13302686Sksewell@umich.edu uint32_t offset = unalign_addr & 0x00000003; 13312686Sksewell@umich.edu 13322607SN/A#if BYTE_ORDER == BIG_ENDIAN 13332135SN/A switch(offset) 13346384Sgblack@eecs.umich.edu { 13352101SN/A case 0: Rt &= 0xFFF0; Rt |= (mem_word >> 12); break; 13365222Sksewell@umich.edu case 1: Rt &= 0xFF00; Rt |= (mem_word >> 8); break; 13372572SN/A case 2: Rt &= 0xF000; Rt |= (mem_word >> 4); break; 13388588Sgblack@eecs.umich.edu case 3: Rt = mem_word; break; 13395222Sksewell@umich.edu default: panic("lwr: bad offset"); 13402101SN/A } 13412101SN/A#elif BYTE_ORDER == LITTLE_ENDIAN 13422572SN/A switch(offset) 13438588Sgblack@eecs.umich.edu { 13442101SN/A case 0: Rt = mem_word; break; 13456384Sgblack@eecs.umich.edu case 1: Rt &= 0xF000; Rt |= (mem_word >> 4); break; 13468588Sgblack@eecs.umich.edu case 2: Rt &= 0xFF00; Rt |= (mem_word >> 8); break; 13476384Sgblack@eecs.umich.edu case 3: Rt &= 0xFFF0; Rt |= (mem_word >> 12); break; 13486384Sgblack@eecs.umich.edu default: panic("lwr: bad offset"); 13498588Sgblack@eecs.umich.edu } 13506384Sgblack@eecs.umich.edu#endif 13516384Sgblack@eecs.umich.edu }}, 13528588Sgblack@eecs.umich.edu {{ EA = (Rs + disp) & ~3; }}); 13536384Sgblack@eecs.umich.edu } 13546384Sgblack@eecs.umich.edu 13558588Sgblack@eecs.umich.edu 0x7: FailUnimpl::reserved(); 13566384Sgblack@eecs.umich.edu } 13572101SN/A 13585222Sksewell@umich.edu 0x5: decode OPCODE_LO default FailUnimpl::reserved() { 13592101SN/A format StoreMemory { 13602602SN/A 0x0: sb({{ Mem.ub = Rt<7:0>; }}); 13612602SN/A 0x1: sh({{ Mem.uh = Rt<15:0>; }}); 13622608SN/A 0x2: swl({{ 13632686Sksewell@umich.edu uint32_t mem_word = 0; 13642686Sksewell@umich.edu uint32_t aligned_addr = (Rs + disp) & ~3; 13652686Sksewell@umich.edu uint32_t unalign_addr = Rs + disp; 13662686Sksewell@umich.edu uint32_t offset = unalign_addr & 0x00000003; 13678588Sgblack@eecs.umich.edu 13688588Sgblack@eecs.umich.edu DPRINTF(IEW,"Execute: aligned=0x%x unaligned=0x%x\n offset=0x%x", 13692686Sksewell@umich.edu aligned_addr,unalign_addr,offset); 13708588Sgblack@eecs.umich.edu 13718588Sgblack@eecs.umich.edu fault = xc->read(aligned_addr, (uint32_t&)mem_word, memAccessFlags); 13722686Sksewell@umich.edu 13738588Sgblack@eecs.umich.edu#if BYTE_ORDER == BIG_ENDIAN 13748588Sgblack@eecs.umich.edu switch(offset) 13752686Sksewell@umich.edu { 13768588Sgblack@eecs.umich.edu case 0: 13778588Sgblack@eecs.umich.edu Mem = Rt; 13782686Sksewell@umich.edu break; 13798588Sgblack@eecs.umich.edu 13808588Sgblack@eecs.umich.edu case 1: 13812686Sksewell@umich.edu mem_word &= 0xF000; 13828588Sgblack@eecs.umich.edu mem_word |= (Rt >> 4); 13838588Sgblack@eecs.umich.edu Mem = mem_word; 13842686Sksewell@umich.edu break; 13852602SN/A 13862602SN/A case 2: 13872602SN/A mem_word &= 0xFF00; 13882602SN/A mem_word |= (Rt >> 8); 13892686Sksewell@umich.edu Mem = mem_word; 13902686Sksewell@umich.edu break; 13912686Sksewell@umich.edu 13922686Sksewell@umich.edu case 3: 13932686Sksewell@umich.edu mem_word &= 0xFFF0; 13942686Sksewell@umich.edu mem_word |= (Rt >> 12); 13958588Sgblack@eecs.umich.edu Mem = mem_word; 13968588Sgblack@eecs.umich.edu break; 13972686Sksewell@umich.edu 13988588Sgblack@eecs.umich.edu default: 13998588Sgblack@eecs.umich.edu panic("swl: bad offset"); 14002686Sksewell@umich.edu } 14018588Sgblack@eecs.umich.edu#elif BYTE_ORDER == LITTLE_ENDIAN 14028588Sgblack@eecs.umich.edu switch(offset) 14032686Sksewell@umich.edu { 14048588Sgblack@eecs.umich.edu case 0: 14058588Sgblack@eecs.umich.edu mem_word &= 0xFFF0; 14062686Sksewell@umich.edu mem_word |= (Rt >> 12); 14078588Sgblack@eecs.umich.edu Mem = mem_word; 14088588Sgblack@eecs.umich.edu break; 14092686Sksewell@umich.edu 14108588Sgblack@eecs.umich.edu case 1: 14118588Sgblack@eecs.umich.edu mem_word &= 0xFF00; 14122686Sksewell@umich.edu mem_word |= (Rt >> 8); 14132602SN/A Mem = mem_word; 14142602SN/A break; 14152101SN/A 14162101SN/A case 2: 14176384Sgblack@eecs.umich.edu mem_word &= 0xF000; 14182101SN/A mem_word |= (Rt >> 4); 14192101SN/A Mem = mem_word; 14202101SN/A break; 14212101SN/A 14222101SN/A case 3: 14235222Sksewell@umich.edu Mem = Rt; 14242686Sksewell@umich.edu break; 14252686Sksewell@umich.edu 14262101SN/A default: 14272101SN/A panic("swl: bad offset"); 14282101SN/A } 14292101SN/A#endif 14302101SN/A }},{{ EA = (Rs + disp) & ~3; }},mem_flags = NO_ALIGN_FAULT); 14312101SN/A 14326384Sgblack@eecs.umich.edu 0x3: sw({{ Mem.uw = Rt<31:0>; }}); 14332101SN/A 14342101SN/A 0x6: swr({{ 14352686Sksewell@umich.edu uint32_t mem_word = 0; 14362686Sksewell@umich.edu uint32_t aligned_addr = (Rs + disp) & ~3; 14372101SN/A uint32_t unalign_addr = Rs + disp; 14382101SN/A uint32_t offset = unalign_addr & 0x00000003; 14396384Sgblack@eecs.umich.edu 14402101SN/A fault = xc->read(aligned_addr, (uint32_t&)mem_word, memAccessFlags); 14412101SN/A 14422686Sksewell@umich.edu#if BYTE_ORDER == BIG_ENDIAN 14432101SN/A switch(offset) 14442101SN/A { 14456384Sgblack@eecs.umich.edu case 0: 14462101SN/A mem_word &= 0x0FFF; 14476384Sgblack@eecs.umich.edu mem_word |= (Rt << 12); 14485222Sksewell@umich.edu Mem = mem_word; 14496384Sgblack@eecs.umich.edu break; 14506384Sgblack@eecs.umich.edu 14516384Sgblack@eecs.umich.edu case 1: 14526384Sgblack@eecs.umich.edu mem_word &= 0x00FF; 14532101SN/A mem_word |= (Rt << 8); 14542101SN/A Mem = mem_word; 14552101SN/A break; 14562101SN/A 14572101SN/A case 2: 14582101SN/A mem_word &= 0x000F; 14592101SN/A mem_word |= (Rt << 4); 14602101SN/A Mem = mem_word; 14612686Sksewell@umich.edu break; 14628588Sgblack@eecs.umich.edu 14638588Sgblack@eecs.umich.edu case 3: 14648588Sgblack@eecs.umich.edu Mem = Rt; 14652742Sksewell@umich.edu break; 14662101SN/A 14672043SN/A default: 14682027SN/A panic("swr: bad offset"); 14692101SN/A } 14702686Sksewell@umich.edu#elif BYTE_ORDER == LITTLE_ENDIAN 14718588Sgblack@eecs.umich.edu switch(offset) 14728588Sgblack@eecs.umich.edu { 14738588Sgblack@eecs.umich.edu case 0: 14742742Sksewell@umich.edu Mem = Rt; 14752046SN/A break; 14762686Sksewell@umich.edu 14772101SN/A case 1: 14782027SN/A mem_word &= 0x000F; 14792686Sksewell@umich.edu mem_word |= (Rt << 4); 14806384Sgblack@eecs.umich.edu Mem = mem_word; 14816384Sgblack@eecs.umich.edu break; 14828588Sgblack@eecs.umich.edu 14836384Sgblack@eecs.umich.edu case 2: 14848564Sgblack@eecs.umich.edu mem_word &= 0x00FF; 14858588Sgblack@eecs.umich.edu mem_word |= (Rt << 8); 14868564Sgblack@eecs.umich.edu Mem = mem_word; 14878588Sgblack@eecs.umich.edu break; 14886384Sgblack@eecs.umich.edu 14898588Sgblack@eecs.umich.edu case 3: 14906384Sgblack@eecs.umich.edu mem_word &= 0x0FFF; 14916384Sgblack@eecs.umich.edu mem_word |= (Rt << 12); 14922686Sksewell@umich.edu Mem = mem_word; 14932027SN/A break; 14942686Sksewell@umich.edu 14952686Sksewell@umich.edu default: 14968588Sgblack@eecs.umich.edu panic("swr: bad offset"); 14978588Sgblack@eecs.umich.edu } 14982686Sksewell@umich.edu#endif 14998588Sgblack@eecs.umich.edu }},{{ EA = (Rs + disp) & ~3;}},mem_flags = NO_ALIGN_FAULT); 15008588Sgblack@eecs.umich.edu } 15012686Sksewell@umich.edu 15022686Sksewell@umich.edu format WarnUnimpl { 15032027SN/A 0x7: cache(); 15042686Sksewell@umich.edu } 15058588Sgblack@eecs.umich.edu 15068588Sgblack@eecs.umich.edu } 15072686Sksewell@umich.edu 15088588Sgblack@eecs.umich.edu 0x6: decode OPCODE_LO default FailUnimpl::reserved() { 15098588Sgblack@eecs.umich.edu 0x0: LoadMemory::ll({{Rt.uw = Mem.uw}},mem_flags=LOCKED); 15102686Sksewell@umich.edu 15112686Sksewell@umich.edu format LoadFloatMemory { 15122027SN/A 0x1: lwc1({{ Ft.uw = Mem.uw; }}); 15132686Sksewell@umich.edu 0x5: ldc1({{ Ft.ud = Mem.ud; }}); 15148588Sgblack@eecs.umich.edu } 15158588Sgblack@eecs.umich.edu } 15162686Sksewell@umich.edu 15178588Sgblack@eecs.umich.edu 15188588Sgblack@eecs.umich.edu 0x7: decode OPCODE_LO default FailUnimpl::reserved() { 15192686Sksewell@umich.edu 0x0: StoreMemory::sc({{ Mem.uw = Rt.uw; Rt.uw = 1; }}); 15202686Sksewell@umich.edu 15212027SN/A format StoreFloatMemory { 15222686Sksewell@umich.edu 0x1: swc1({{ Mem.uw = Ft.uw; }}); 15238588Sgblack@eecs.umich.edu 0x5: sdc1({{ Mem.ud = Ft.ud; }}); 15248588Sgblack@eecs.umich.edu } 15252686Sksewell@umich.edu } 15268588Sgblack@eecs.umich.edu} 15278588Sgblack@eecs.umich.edu 15282686Sksewell@umich.edu 15292046SN/A