utility.hh revision 6216
12381SN/A/* 212344Snikos.nikoleris@arm.com * Copyright (c) 2003-2005 The Regents of The University of Michigan 38949Sandreas.hansson@arm.com * Copyright (c) 2007-2008 The Florida State University 48949Sandreas.hansson@arm.com * All rights reserved. 58949Sandreas.hansson@arm.com * 68949Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 78949Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 88949Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 98949Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 108949Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 118949Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 128949Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 138949Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 142592SN/A * contributors may be used to endorse or promote products derived from 1510975Sdavid.hashe@amd.com * this software without specific prior written permission. 162381SN/A * 172381SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182381SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192381SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202381SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212381SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222381SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232381SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242381SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252381SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262381SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272381SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282381SN/A * 292381SN/A * Authors: Korey Sewell 302381SN/A * Stephen Hines 312381SN/A */ 322381SN/A 332381SN/A#ifndef __ARCH_ARM_UTILITY_HH__ 342381SN/A#define __ARCH_ARM_UTILITY_HH__ 352381SN/A 362381SN/A#include "arch/arm/types.hh" 372381SN/A#include "base/misc.hh" 382381SN/A#include "base/types.hh" 392381SN/A#include "config/full_system.hh" 402665Ssaidi@eecs.umich.edu#include "cpu/thread_context.hh" 412665Ssaidi@eecs.umich.edu 422665Ssaidi@eecs.umich.educlass ThreadContext; 432665Ssaidi@eecs.umich.edu 449031Sandreas.hansson@arm.comnamespace ArmISA { 452381SN/A 462381SN/A //Floating Point Utility Functions 472381SN/A uint64_t fpConvert(ConvertType cvt_type, double fp_val); 482381SN/A double roundFP(double val, int digits); 492662Sstever@eecs.umich.edu double truncFP(double val); 502381SN/A 512381SN/A bool getCondCode(uint32_t fcsr, int cc); 522381SN/A uint32_t genCCVector(uint32_t fcsr, int num, uint32_t cc_val); 532381SN/A uint32_t genInvalidVector(uint32_t fcsr); 542381SN/A 558229Snate@binkert.org bool isNan(void *val_ptr, int size); 563348Sbinkertn@umich.edu bool isQnan(void *val_ptr, int size); 573348Sbinkertn@umich.edu bool isSnan(void *val_ptr, int size); 583348Sbinkertn@umich.edu 595735Snate@binkert.org /** 604024Sbinkertn@umich.edu * Function to insure ISA semantics about 0 registers. 615735Snate@binkert.org * @param tc The thread context. 6212334Sgabeblack@google.com */ 635314Sstever@gmail.com template <class TC> 646216Snate@binkert.org void zeroRegisters(TC *tc); 652392SN/A 664167Sbinkertn@umich.edu // Instruction address compression hooks 672394SN/A static inline Addr realPCToFetchPC(const Addr &addr) { 688737Skoansin.tan@gmail.com return addr; 693349Sbinkertn@umich.edu } 702394SN/A 712812Srdreslin@umich.edu static inline Addr fetchPCToRealPC(const Addr &addr) { 722812Srdreslin@umich.edu return addr; 734022Sstever@eecs.umich.edu } 744022Sstever@eecs.umich.edu 755735Snate@binkert.org // the size of "fetched" instructions 765735Snate@binkert.org static inline size_t fetchInstSize() { 774022Sstever@eecs.umich.edu return sizeof(MachInst); 785735Snate@binkert.org } 795735Snate@binkert.org 805735Snate@binkert.org static inline MachInst makeRegisterCopy(int dest, int src) { 814022Sstever@eecs.umich.edu panic("makeRegisterCopy not implemented"); 824022Sstever@eecs.umich.edu return 0; 834022Sstever@eecs.umich.edu } 844022Sstever@eecs.umich.edu 854473Sstever@eecs.umich.edu inline void startupCPU(ThreadContext *tc, int cpuId) 865319Sstever@gmail.com { 874022Sstever@eecs.umich.edu tc->activate(0); 884022Sstever@eecs.umich.edu } 8911199Sandreas.hansson@arm.com}; 9011199Sandreas.hansson@arm.com 9112344Snikos.nikoleris@arm.com 9210883Sali.jafri@arm.com#endif 934022Sstever@eecs.umich.edu