system.cc revision 8299
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2002-2006 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Ali Saidi 41 */ 42 43#include <iostream> 44 45#include "arch/arm/system.hh" 46#include "base/loader/object_file.hh" 47#include "base/loader/symtab.hh" 48#include "cpu/thread_context.hh" 49#include "mem/physical.hh" 50 51using namespace std; 52using namespace Linux; 53 54ArmSystem::ArmSystem(Params *p) 55 : System(p), bootldr(NULL) 56{ 57 debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk"); 58 59 if ((p->boot_loader == "") != (p->boot_loader_mem == NULL)) 60 fatal("If boot_loader is specifed, memory to load it must be also.\n"); 61 62 if (p->boot_loader != "") { 63 bootldr = createObjectFile(p->boot_loader); 64 65 if (!bootldr) 66 fatal("Could not read bootloader: %s\n", p->boot_loader); 67 68 Port *mem_port; 69 FunctionalPort fp(name() + "-fport"); 70 mem_port = p->boot_loader_mem->getPort("functional"); 71 fp.setPeer(mem_port); 72 mem_port->setPeer(&fp); 73 74 bootldr->loadSections(&fp); 75 bootldr->loadGlobalSymbols(debugSymbolTable); 76 77 uint8_t jump_to_bl[] = 78 { 79 0x07, 0xf0, 0xa0, 0xe1 // branch to r7 80 }; 81 functionalPort->writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl)); 82 83 inform("Using bootloader at address %#x\n", bootldr->entryPoint()); 84 } 85} 86 87void 88ArmSystem::initState() 89{ 90 System::initState(); 91 if (bootldr) { 92 // Put the address of the boot loader into r7 so we know 93 // where to branch to after the reset fault 94 // All other values needed by the boot loader to know what to do 95 for (int i = 0; i < threadContexts.size(); i++) { 96 threadContexts[i]->setIntReg(3, kernelEntry & loadAddrMask); 97 threadContexts[i]->setIntReg(4, params()->gic_cpu_addr); 98 threadContexts[i]->setIntReg(5, params()->flags_addr); 99 threadContexts[i]->setIntReg(7, bootldr->entryPoint()); 100 } 101 if (!params()->gic_cpu_addr || !params()->flags_addr) 102 fatal("gic_cpu_addr && flags_addr must be set with bootloader\n"); 103 } else { 104 // Set the initial PC to be at start of the kernel code 105 threadContexts[0]->pcState(kernelEntry & loadAddrMask); 106 } 107 for (int i = 0; i < threadContexts.size(); i++) { 108 if (params()->midr_regval) { 109 threadContexts[i]->setMiscReg(ArmISA::MISCREG_MIDR, 110 params()->midr_regval); 111 } 112 } 113 114} 115 116ArmSystem::~ArmSystem() 117{ 118 if (debugPrintkEvent) 119 delete debugPrintkEvent; 120} 121 122 123ArmSystem * 124ArmSystemParams::create() 125{ 126 return new ArmSystem(this); 127} 128