system.cc revision 13397:9fd4c9dedfda
1/* 2 * Copyright (c) 2010, 2012-2013, 2015,2017-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2002-2006 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Ali Saidi 41 */ 42 43#include "arch/arm/system.hh" 44 45#include <iostream> 46 47#include "arch/arm/semihosting.hh" 48#include "base/loader/object_file.hh" 49#include "base/loader/symtab.hh" 50#include "cpu/thread_context.hh" 51#include "mem/fs_translating_port_proxy.hh" 52#include "mem/physical.hh" 53#include "sim/full_system.hh" 54 55using namespace std; 56using namespace Linux; 57 58ArmSystem::ArmSystem(Params *p) 59 : System(p), 60 bootLoaders(), bootldr(nullptr), 61 _haveSecurity(p->have_security), 62 _haveLPAE(p->have_lpae), 63 _haveVirtualization(p->have_virtualization), 64 _haveCrypto(p->have_crypto), 65 _genericTimer(nullptr), 66 _resetAddr(p->auto_reset_addr ? 67 (kernelEntry & loadAddrMask) + loadAddrOffset : 68 p->reset_addr), 69 _highestELIs64(p->highest_el_is_64), 70 _physAddrRange64(p->phys_addr_range_64), 71 _haveLargeAsid64(p->have_large_asid_64), 72 _m5opRange(p->m5ops_base ? 73 RangeSize(p->m5ops_base, 0x10000) : 74 AddrRange(1, 0)), // Create an empty range if disabled 75 semihosting(p->semihosting), 76 multiProc(p->multi_proc) 77{ 78 // Check if the physical address range is valid 79 if (_highestELIs64 && ( 80 _physAddrRange64 < 32 || 81 _physAddrRange64 > 48 || 82 (_physAddrRange64 % 4 != 0 && _physAddrRange64 != 42))) { 83 fatal("Invalid physical address range (%d)\n", _physAddrRange64); 84 } 85 86 bootLoaders.reserve(p->boot_loader.size()); 87 for (const auto &bl : p->boot_loader) { 88 std::unique_ptr<ObjectFile> obj; 89 obj.reset(createObjectFile(bl)); 90 91 fatal_if(!obj, "Could not read bootloader: %s\n", bl); 92 bootLoaders.emplace_back(std::move(obj)); 93 } 94 95 if (kernel) { 96 bootldr = getBootLoader(kernel); 97 } else if (!bootLoaders.empty()) { 98 // No kernel specified, default to the first boot loader 99 bootldr = bootLoaders[0].get(); 100 } 101 102 if (!bootLoaders.empty() && !bootldr) 103 fatal("Can't find a matching boot loader / kernel combination!"); 104 105 if (bootldr) { 106 bootldr->loadGlobalSymbols(debugSymbolTable); 107 108 warn_if(bootldr->entryPoint() != _resetAddr, 109 "Bootloader entry point %#x overriding reset address %#x", 110 bootldr->entryPoint(), _resetAddr); 111 const_cast<Addr&>(_resetAddr) = bootldr->entryPoint(); 112 113 if ((bootldr->getArch() == ObjectFile::Arm64) && !_highestELIs64) { 114 warn("Highest ARM exception-level set to AArch32 but bootloader " 115 "is for AArch64. Assuming you wanted these to match.\n"); 116 _highestELIs64 = true; 117 } else if ((bootldr->getArch() == ObjectFile::Arm) && _highestELIs64) { 118 warn("Highest ARM exception-level set to AArch64 but bootloader " 119 "is for AArch32. Assuming you wanted these to match.\n"); 120 _highestELIs64 = false; 121 } 122 } 123 124 debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk"); 125} 126 127void 128ArmSystem::initState() 129{ 130 // Moved from the constructor to here since it relies on the 131 // address map being resolved in the interconnect 132 133 // Call the initialisation of the super class 134 System::initState(); 135 136 const Params* p = params(); 137 138 if (bootldr) { 139 bootldr->loadSections(physProxy); 140 141 inform("Using bootloader at address %#x\n", bootldr->entryPoint()); 142 143 // Put the address of the boot loader into r7 so we know 144 // where to branch to after the reset fault 145 // All other values needed by the boot loader to know what to do 146 if (!p->gic_cpu_addr || !p->flags_addr) 147 fatal("gic_cpu_addr && flags_addr must be set with bootloader\n"); 148 149 for (int i = 0; i < threadContexts.size(); i++) { 150 if (!_highestELIs64) 151 threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) + 152 loadAddrOffset); 153 154 threadContexts[i]->setIntReg(4, params()->gic_cpu_addr); 155 threadContexts[i]->setIntReg(5, params()->flags_addr); 156 } 157 inform("Using kernel entry physical address at %#x\n", 158 (kernelEntry & loadAddrMask) + loadAddrOffset); 159 } else { 160 // Set the initial PC to be at start of the kernel code 161 if (!_highestELIs64) 162 threadContexts[0]->pcState((kernelEntry & loadAddrMask) + 163 loadAddrOffset); 164 } 165} 166 167ArmSystem* 168ArmSystem::getArmSystem(ThreadContext *tc) 169{ 170 ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr()); 171 assert(a_sys); 172 return a_sys; 173} 174 175bool 176ArmSystem::haveSecurity(ThreadContext *tc) 177{ 178 return FullSystem? getArmSystem(tc)->haveSecurity() : false; 179} 180 181 182ArmSystem::~ArmSystem() 183{ 184 if (debugPrintkEvent) 185 delete debugPrintkEvent; 186} 187 188ObjectFile * 189ArmSystem::getBootLoader(ObjectFile *const obj) 190{ 191 for (auto &bl : bootLoaders) { 192 if (bl->getArch() == obj->getArch()) 193 return bl.get(); 194 } 195 196 return nullptr; 197} 198 199bool 200ArmSystem::haveLPAE(ThreadContext *tc) 201{ 202 return FullSystem? getArmSystem(tc)->haveLPAE() : false; 203} 204 205bool 206ArmSystem::haveVirtualization(ThreadContext *tc) 207{ 208 return FullSystem? getArmSystem(tc)->haveVirtualization() : false; 209} 210 211bool 212ArmSystem::highestELIs64(ThreadContext *tc) 213{ 214 return FullSystem? getArmSystem(tc)->highestELIs64() : true; 215} 216 217ExceptionLevel 218ArmSystem::highestEL(ThreadContext *tc) 219{ 220 return FullSystem? getArmSystem(tc)->highestEL() : EL1; 221} 222 223bool 224ArmSystem::haveEL(ThreadContext *tc, ExceptionLevel el) 225{ 226 switch (el) { 227 case EL0: 228 case EL1: 229 return true; 230 case EL2: 231 return haveVirtualization(tc); 232 case EL3: 233 return haveSecurity(tc); 234 default: 235 warn("Unimplemented Exception Level\n"); 236 return false; 237 } 238} 239 240Addr 241ArmSystem::resetAddr(ThreadContext *tc) 242{ 243 return getArmSystem(tc)->resetAddr(); 244} 245 246uint8_t 247ArmSystem::physAddrRange(ThreadContext *tc) 248{ 249 return getArmSystem(tc)->physAddrRange(); 250} 251 252Addr 253ArmSystem::physAddrMask(ThreadContext *tc) 254{ 255 return getArmSystem(tc)->physAddrMask(); 256} 257 258bool 259ArmSystem::haveLargeAsid64(ThreadContext *tc) 260{ 261 return getArmSystem(tc)->haveLargeAsid64(); 262} 263 264bool 265ArmSystem::haveSemihosting(ThreadContext *tc) 266{ 267 return FullSystem && getArmSystem(tc)->haveSemihosting(); 268} 269 270uint64_t 271ArmSystem::callSemihosting64(ThreadContext *tc, 272 uint32_t op, uint64_t param) 273{ 274 ArmSystem *sys = getArmSystem(tc); 275 return sys->semihosting->call64(tc, op, param); 276} 277 278uint32_t 279ArmSystem::callSemihosting32(ThreadContext *tc, 280 uint32_t op, uint32_t param) 281{ 282 ArmSystem *sys = getArmSystem(tc); 283 return sys->semihosting->call32(tc, op, param); 284} 285 286ArmSystem * 287ArmSystemParams::create() 288{ 289 return new ArmSystem(this); 290} 291 292void 293GenericArmSystem::initState() 294{ 295 // Moved from the constructor to here since it relies on the 296 // address map being resolved in the interconnect 297 298 // Call the initialisation of the super class 299 ArmSystem::initState(); 300} 301 302GenericArmSystem * 303GenericArmSystemParams::create() 304{ 305 306 return new GenericArmSystem(this); 307} 308