system.cc revision 10810 
1/*
2 * Copyright (c) 2010, 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43#include <iostream>
44
45#include "arch/arm/system.hh"
46#include "base/loader/object_file.hh"
47#include "base/loader/symtab.hh"
48#include "cpu/thread_context.hh"
49#include "mem/physical.hh"
50#include "mem/fs_translating_port_proxy.hh"
51#include "sim/full_system.hh"
52
53using namespace std;
54using namespace Linux;
55
56ArmSystem::ArmSystem(Params *p)
57    : System(p), bootldr(NULL), _haveSecurity(p->have_security),
58      _haveLPAE(p->have_lpae),
59      _haveVirtualization(p->have_virtualization),
60      _haveGenericTimer(p->have_generic_timer),
61      _genericTimer(nullptr),
62      _highestELIs64(p->highest_el_is_64),
63      _resetAddr64(p->reset_addr_64),
64      _physAddrRange64(p->phys_addr_range_64),
65      _haveLargeAsid64(p->have_large_asid_64),
66      multiProc(p->multi_proc)
67{
68    // Check if the physical address range is valid
69    if (_highestELIs64 && (
70            _physAddrRange64 < 32 ||
71            _physAddrRange64 > 48 ||
72            (_physAddrRange64 % 4 != 0 && _physAddrRange64 != 42))) {
73        fatal("Invalid physical address range (%d)\n", _physAddrRange64);
74    }
75
76    if (p->boot_loader != "") {
77        bootldr = createObjectFile(p->boot_loader);
78
79        if (!bootldr)
80            fatal("Could not read bootloader: %s\n", p->boot_loader);
81
82        if ((bootldr->getArch() == ObjectFile::Arm64) && !_highestELIs64) {
83            warn("Highest ARM exception-level set to AArch32 but bootloader "
84                  "is for AArch64. Assuming you wanted these to match.\n");
85            _highestELIs64 = true;
86        } else if ((bootldr->getArch() == ObjectFile::Arm) && _highestELIs64) {
87            warn("Highest ARM exception-level set to AArch64 but bootloader "
88                  "is for AArch32. Assuming you wanted these to match.\n");
89            _highestELIs64 = false;
90        }
91
92        bootldr->loadGlobalSymbols(debugSymbolTable);
93
94    }
95    debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
96}
97
98void
99ArmSystem::initState()
100{
101    // Moved from the constructor to here since it relies on the
102    // address map being resolved in the interconnect
103
104    // Call the initialisation of the super class
105    System::initState();
106
107    const Params* p = params();
108
109    if (bootldr) {
110        bootldr->loadSections(physProxy);
111
112        uint8_t jump_to_bl_32[] =
113        {
114            0x07, 0xf0, 0xa0, 0xe1  // branch to r7 in aarch32
115        };
116
117        uint8_t jump_to_bl_64[] =
118        {
119            0xe0, 0x00, 0x1f, 0xd6  // instruction "br x7" in aarch64
120        };
121
122        // write the jump to branch table into address 0
123        if (!_highestELIs64)
124            physProxy.writeBlob(0x0, jump_to_bl_32, sizeof(jump_to_bl_32));
125        else
126            physProxy.writeBlob(0x0, jump_to_bl_64, sizeof(jump_to_bl_64));
127
128        inform("Using bootloader at address %#x\n", bootldr->entryPoint());
129
130        // Put the address of the boot loader into r7 so we know
131        // where to branch to after the reset fault
132        // All other values needed by the boot loader to know what to do
133        if (!p->gic_cpu_addr || !p->flags_addr)
134            fatal("gic_cpu_addr && flags_addr must be set with bootloader\n");
135
136        for (int i = 0; i < threadContexts.size(); i++) {
137            if (!_highestELIs64)
138                threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) +
139                        loadAddrOffset);
140            threadContexts[i]->setIntReg(4, params()->gic_cpu_addr);
141            threadContexts[i]->setIntReg(5, params()->flags_addr);
142            threadContexts[i]->setIntReg(7, bootldr->entryPoint());
143        }
144        inform("Using kernel entry physical address at %#x\n",
145               (kernelEntry & loadAddrMask) + loadAddrOffset);
146    } else {
147        // Set the initial PC to be at start of the kernel code
148        if (!_highestELIs64)
149            threadContexts[0]->pcState((kernelEntry & loadAddrMask) +
150                    loadAddrOffset);
151    }
152}
153
154GenericTimer::ArchTimer *
155ArmSystem::getArchTimer(int cpu_id) const
156{
157    if (_genericTimer) {
158        return _genericTimer->getArchTimer(cpu_id);
159    }
160    return NULL;
161}
162
163GenericTimer::SystemCounter *
164ArmSystem::getSystemCounter() const
165{
166    if (_genericTimer) {
167        return _genericTimer->getSystemCounter();
168    }
169    return NULL;
170}
171
172bool
173ArmSystem::haveSecurity(ThreadContext *tc)
174{
175    if (!FullSystem)
176        return false;
177
178    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
179    assert(a_sys);
180    return a_sys->haveSecurity();
181}
182
183
184ArmSystem::~ArmSystem()
185{
186    if (debugPrintkEvent)
187        delete debugPrintkEvent;
188}
189
190bool
191ArmSystem::haveLPAE(ThreadContext *tc)
192{
193    if (!FullSystem)
194        return false;
195
196    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
197    assert(a_sys);
198    return a_sys->haveLPAE();
199}
200
201bool
202ArmSystem::haveVirtualization(ThreadContext *tc)
203{
204    if (!FullSystem)
205        return false;
206
207    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
208    assert(a_sys);
209    return a_sys->haveVirtualization();
210}
211
212bool
213ArmSystem::highestELIs64(ThreadContext *tc)
214{
215    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->highestELIs64();
216}
217
218ExceptionLevel
219ArmSystem::highestEL(ThreadContext *tc)
220{
221    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->highestEL();
222}
223
224Addr
225ArmSystem::resetAddr64(ThreadContext *tc)
226{
227    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->resetAddr64();
228}
229
230uint8_t
231ArmSystem::physAddrRange(ThreadContext *tc)
232{
233    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->physAddrRange();
234}
235
236Addr
237ArmSystem::physAddrMask(ThreadContext *tc)
238{
239    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->physAddrMask();
240}
241
242bool
243ArmSystem::haveLargeAsid64(ThreadContext *tc)
244{
245    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->haveLargeAsid64();
246}
247
248ArmSystem *
249ArmSystemParams::create()
250{
251    return new ArmSystem(this);
252}
253
254void
255GenericArmSystem::initState()
256{
257    // Moved from the constructor to here since it relies on the
258    // address map being resolved in the interconnect
259
260    // Call the initialisation of the super class
261    ArmSystem::initState();
262}
263
264GenericArmSystem *
265GenericArmSystemParams::create()
266{
267
268    return new GenericArmSystem(this);
269}
270