1/* 2 * Copyright 2015 LabWare 3 * Copyright 2014 Google, Inc. 4 * Copyright (c) 2013, 2016, 2018-2019 ARM Limited 5 * All rights reserved 6 * 7 * The license below extends only to copyright in the software and shall 8 * not be construed as granting a license to any other intellectual 9 * property including but not limited to intellectual property relating 10 * to a hardware implementation of the functionality of the software 11 * licensed hereunder. You may use the software subject to the license 12 * terms below provided that you ensure that this notice is replicated 13 * unmodified and in its entirety in all distributions of the software, 14 * modified or unmodified, in source code or in binary form. 15 * 16 * Copyright (c) 2002-2005 The Regents of The University of Michigan 17 * Copyright (c) 2007-2008 The Florida State University 18 * All rights reserved. 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions are 22 * met: redistributions of source code must retain the above copyright 23 * notice, this list of conditions and the following disclaimer; 24 * redistributions in binary form must reproduce the above copyright 25 * notice, this list of conditions and the following disclaimer in the 26 * documentation and/or other materials provided with the distribution; 27 * neither the name of the copyright holders nor the names of its 28 * contributors may be used to endorse or promote products derived from 29 * this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 36 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 37 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 38 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 39 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 41 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 * 43 * Authors: Nathan Binkert 44 * Stephen Hines 45 * Boris Shingarov 46 */ 47 48#ifndef __ARCH_ARM_REMOTE_GDB_HH__ 49#define __ARCH_ARM_REMOTE_GDB_HH__ 50 51#include <algorithm> 52 53#include "arch/arm/registers.hh" 54#include "arch/arm/utility.hh" 55#include "base/compiler.hh" 56#include "base/remote_gdb.hh" 57 58class System; 59class ThreadContext; 60 61namespace ArmISA 62{ 63 64class RemoteGDB : public BaseRemoteGDB 65{ 66 protected: 67 bool acc(Addr addr, size_t len); 68 69 class AArch32GdbRegCache : public BaseGdbRegCache 70 { 71 using BaseGdbRegCache::BaseGdbRegCache; 72 private: 73 struct { 74 uint32_t gpr[16]; 75 uint32_t cpsr; 76 uint64_t fpr[32]; 77 uint32_t fpscr; 78 } M5_ATTR_PACKED r; 79 public: 80 char *data() const { return (char *)&r; } 81 size_t size() const { return sizeof(r); } 82 void getRegs(ThreadContext*); 83 void setRegs(ThreadContext*) const; 84 const std::string 85 name() const 86 { 87 return gdb->name() + ".AArch32GdbRegCache"; 88 } 89 }; 90 91 class AArch64GdbRegCache : public BaseGdbRegCache 92 { 93 using BaseGdbRegCache::BaseGdbRegCache; 94 private: 95 struct { 96 uint64_t x[31]; 97 uint64_t spx; 98 uint64_t pc; 99 uint32_t cpsr; 100 VecElem v[NumVecV8ArchRegs * NumVecElemPerNeonVecReg]; 101 uint32_t fpsr; 102 uint32_t fpcr; 103 } M5_ATTR_PACKED r; 104 public: 105 char *data() const { return (char *)&r; } 106 size_t size() const { return sizeof(r); } 107 void getRegs(ThreadContext*); 108 void setRegs(ThreadContext*) const; 109 const std::string 110 name() const 111 { 112 return gdb->name() + ".AArch64GdbRegCache"; 113 } 114 }; 115 116 AArch32GdbRegCache regCache32; 117 AArch64GdbRegCache regCache64; 118 119 public: 120 RemoteGDB(System *_system, ThreadContext *tc, int _port); 121 BaseGdbRegCache *gdbRegs(); 122 std::vector<std::string> 123 availableFeatures() const 124 { 125 return {"qXfer:features:read+"}; 126 }; 127 bool getXferFeaturesRead(const std::string &annex, std::string &output); 128}; 129} // namespace ArmISA 130 131#endif /* __ARCH_ARM_REMOTE_GDB_H__ */ 132