pred.isa revision 6741
1// -*- mode:c++ -*- 2 3// Copyright (c) 2007-2008 The Florida State University 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright 9// notice, this list of conditions and the following disclaimer; 10// redistributions in binary form must reproduce the above copyright 11// notice, this list of conditions and the following disclaimer in the 12// documentation and/or other materials provided with the distribution; 13// neither the name of the copyright holders nor the names of its 14// contributors may be used to endorse or promote products derived from 15// this software without specific prior written permission. 16// 17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28// 29// Authors: Stephen Hines 30 31//////////////////////////////////////////////////////////////////// 32// 33// Predicated Instruction Execution 34// 35 36let {{ 37 predicateTest = 'testPredicate(CondCodes, condCode)' 38}}; 39 40def template PredOpExecute {{ 41 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 42 { 43 Fault fault = NoFault; 44 uint64_t resTemp = 0; 45 resTemp = resTemp; 46 %(op_decl)s; 47 %(op_rd)s; 48 49 if (%(predicate_test)s) 50 { 51 %(code)s; 52 if (fault == NoFault) 53 { 54 %(op_wb)s; 55 } 56 } 57 58 return fault; 59 } 60}}; 61 62def template DataDecode {{ 63 if (machInst.opcode4 == 0) { 64 if (machInst.sField == 0) 65 return new %(class_name)sImm(machInst); 66 else 67 return new %(class_name)sImmCc(machInst); 68 } else { 69 if (machInst.sField == 0) 70 return new %(class_name)s(machInst); 71 else 72 return new %(class_name)sCc(machInst); 73 } 74}}; 75 76def template DataImmDecode {{ 77 if (machInst.sField == 0) 78 return new %(class_name)s(machInst); 79 else 80 return new %(class_name)sCc(machInst); 81}}; 82 83let {{ 84 85 calcCcCode = ''' 86 if (%(canOverflow)s){ 87 cprintf("canOverflow: %%d\\n", Rd < resTemp); 88 replaceBits(CondCodes, 27, Rd < resTemp); 89 } else { 90 uint16_t _ic, _iv, _iz, _in; 91 _in = (resTemp >> %(negBit)d) & 1; 92 _iz = (resTemp == 0); 93 _iv = %(ivValue)s & 1; 94 _ic = %(icValue)s & 1; 95 96 CondCodes = _in << 31 | _iz << 30 | _ic << 29 | _iv << 28 | 97 (CondCodes & 0x0FFFFFFF); 98 99 DPRINTF(Arm, "in = %%d\\n", _in); 100 DPRINTF(Arm, "iz = %%d\\n", _iz); 101 DPRINTF(Arm, "ic = %%d\\n", _ic); 102 DPRINTF(Arm, "iv = %%d\\n", _iv); 103 } 104 ''' 105}}; 106 107let {{ 108 def getCcCode(flagtype): 109 icReg = icImm = iv = '' 110 negBit = 31 111 canOverflow = 'false' 112 113 if flagtype == "none": 114 icReg = icImm = 'CondCodes<29:>' 115 iv = 'CondCodes<28:>' 116 elif flagtype == "llbit": 117 icReg = icImm = 'CondCodes<29:>' 118 iv = 'CondCodes<28:>' 119 negBit = 63 120 elif flagtype == "overflow": 121 canOverflow = "true" 122 icReg = icImm = iv = '0' 123 elif flagtype == "add": 124 icReg = icImm = 'findCarry(32, resTemp, Rn, op2)' 125 iv = 'findOverflow(32, resTemp, Rn, op2)' 126 elif flagtype == "sub": 127 icReg = icImm ='findCarry(32, resTemp, Rn, ~op2)' 128 iv = 'findOverflow(32, resTemp, Rn, ~op2)' 129 elif flagtype == "rsb": 130 icReg = icImm = 'findCarry(32, resTemp, op2, ~Rn)' 131 iv = 'findOverflow(32, resTemp, op2, ~Rn)' 132 else: 133 icReg = 'shift_carry_rs(Rm, Rs<7:0>, shift, CondCodes<29:>)' 134 icImm = 'shift_carry_imm(Rm, shift_size, shift, CondCodes<29:>)' 135 iv = 'CondCodes<28:>' 136 return (calcCcCode % {"icValue" : icReg, 137 "ivValue" : iv, 138 "negBit" : negBit, 139 "canOverflow" : canOverflow }, 140 calcCcCode % {"icValue" : icImm, 141 "ivValue" : iv, 142 "negBit" : negBit, 143 "canOverflow" : canOverflow }) 144 145 def getImmCcCode(flagtype): 146 ivValue = icValue = '' 147 negBit = 31 148 canOverflow = 'false' 149 if flagtype == "none": 150 icValue = 'CondCodes<29:>' 151 ivValue = 'CondCodes<28:>' 152 elif flagtype == "llbit": 153 icValue = 'CondCodes<29:>' 154 ivValue = 'CondCodes<28:>' 155 negBit = 63 156 elif flagtype == "overflow": 157 icVaule = ivValue = '0' 158 canOverflow = "true" 159 elif flagtype == "add": 160 icValue = 'findCarry(32, resTemp, Rn, rotated_imm)' 161 ivValue = 'findOverflow(32, resTemp, Rn, rotated_imm)' 162 elif flagtype == "sub": 163 icValue = 'findCarry(32, resTemp, Rn, ~rotated_imm)' 164 ivValue = 'findOverflow(32, resTemp, Rn, ~rotated_imm)' 165 elif flagtype == "rsb": 166 icValue = 'findCarry(32, resTemp, rotated_imm, ~Rn)' 167 ivValue = 'findOverflow(32, resTemp, rotated_imm, ~Rn)' 168 else: 169 icValue = '(rotate ? rotated_carry:CondCodes<29:>)' 170 ivValue = 'CondCodes<28:>' 171 return calcCcCode % vars() 172}}; 173 174def format DataOp(code, flagtype = logic) {{ 175 (regCcCode, immCcCode) = getCcCode(flagtype) 176 regCode = '''uint32_t op2 = shift_rm_rs(Rm, Rs<7:0>, 177 shift, CondCodes<29:>); 178 op2 = op2;''' + code 179 immCode = '''uint32_t op2 = shift_rm_imm(Rm, shift_size, 180 shift, CondCodes<29:>); 181 op2 = op2;''' + code 182 regIop = InstObjParams(name, Name, 'PredIntOp', 183 {"code": regCode, 184 "predicate_test": predicateTest}) 185 immIop = InstObjParams(name, Name + "Imm", 'PredIntOp', 186 {"code": immCode, 187 "predicate_test": predicateTest}) 188 regCcIop = InstObjParams(name, Name + "Cc", 'PredIntOp', 189 {"code": regCode + regCcCode, 190 "predicate_test": predicateTest}) 191 immCcIop = InstObjParams(name, Name + "ImmCc", 'PredIntOp', 192 {"code": immCode + immCcCode, 193 "predicate_test": predicateTest}) 194 header_output = BasicDeclare.subst(regIop) + \ 195 BasicDeclare.subst(immIop) + \ 196 BasicDeclare.subst(regCcIop) + \ 197 BasicDeclare.subst(immCcIop) 198 decoder_output = BasicConstructor.subst(regIop) + \ 199 BasicConstructor.subst(immIop) + \ 200 BasicConstructor.subst(regCcIop) + \ 201 BasicConstructor.subst(immCcIop) 202 exec_output = PredOpExecute.subst(regIop) + \ 203 PredOpExecute.subst(immIop) + \ 204 PredOpExecute.subst(regCcIop) + \ 205 PredOpExecute.subst(immCcIop) 206 decode_block = DataDecode.subst(regIop) 207}}; 208 209def format DataImmOp(code, flagtype = logic) {{ 210 code += "resTemp = resTemp;" 211 iop = InstObjParams(name, Name, 'PredImmOp', 212 {"code": code, 213 "predicate_test": predicateTest}) 214 ccIop = InstObjParams(name, Name + "Cc", 'PredImmOp', 215 {"code": code + getImmCcCode(flagtype), 216 "predicate_test": predicateTest}) 217 header_output = BasicDeclare.subst(iop) + \ 218 BasicDeclare.subst(ccIop) 219 decoder_output = BasicConstructor.subst(iop) + \ 220 BasicConstructor.subst(ccIop) 221 exec_output = PredOpExecute.subst(iop) + \ 222 PredOpExecute.subst(ccIop) 223 decode_block = DataImmDecode.subst(iop) 224}}; 225 226def format PredOp(code, *opt_flags) {{ 227 iop = InstObjParams(name, Name, 'PredOp', 228 {"code": code, 229 "predicate_test": predicateTest}, 230 opt_flags) 231 header_output = BasicDeclare.subst(iop) 232 decoder_output = BasicConstructor.subst(iop) 233 decode_block = BasicDecode.subst(iop) 234 exec_output = PredOpExecute.subst(iop) 235}}; 236 237def format PredImmOp(code, *opt_flags) {{ 238 iop = InstObjParams(name, Name, 'PredImmOp', 239 {"code": code, 240 "predicate_test": predicateTest}, 241 opt_flags) 242 header_output = BasicDeclare.subst(iop) 243 decoder_output = BasicConstructor.subst(iop) 244 decode_block = BasicDecode.subst(iop) 245 exec_output = PredOpExecute.subst(iop) 246}}; 247 248def format PredImmOpCc(code, icValue, ivValue, *opt_flags) {{ 249 ccCode = calcCcCode % vars() 250 code += ccCode; 251 iop = InstObjParams(name, Name, 'PredImmOp', 252 {"code": code, 253 "cc_code": ccCode, 254 "predicate_test": predicateTest}, 255 opt_flags) 256 header_output = BasicDeclare.subst(iop) 257 decoder_output = BasicConstructor.subst(iop) 258 decode_block = BasicDecode.subst(iop) 259 exec_output = PredOpExecute.subst(iop) 260}}; 261 262def format PredIntOp(code, *opt_flags) {{ 263 new_code = ArmGenericCodeSubs(code) 264 iop = InstObjParams(name, Name, 'PredIntOp', 265 {"code": new_code, 266 "predicate_test": predicateTest}, 267 opt_flags) 268 header_output = BasicDeclare.subst(iop) 269 decoder_output = BasicConstructor.subst(iop) 270 decode_block = BasicDecode.subst(iop) 271 exec_output = PredOpExecute.subst(iop) 272}}; 273 274def format PredIntOpCc(code, icValue, ivValue, *opt_flags) {{ 275 ccCode = calcCcCode % vars() 276 code += ccCode; 277 new_code = ArmGenericCodeSubs(code) 278 iop = InstObjParams(name, Name, 'PredIntOp', 279 {"code": new_code, 280 "cc_code": ccCode, 281 "predicate_test": predicateTest}, 282 opt_flags) 283 header_output = BasicDeclare.subst(iop) 284 decoder_output = BasicConstructor.subst(iop) 285 decode_block = BasicDecode.subst(iop) 286 exec_output = PredOpExecute.subst(iop) 287}}; 288 289