mem64.cc revision 10037:5cac77888310 
1/*
2 * Copyright (c) 2011-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#include "arch/arm/insts/mem64.hh"
41#include "arch/arm/tlb.hh"
42#include "base/loader/symtab.hh"
43#include "mem/request.hh"
44
45using namespace std;
46
47namespace ArmISA
48{
49
50std::string
51SysDC64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
52{
53    std::stringstream ss;
54    printMnemonic(ss, "", false);
55    ccprintf(ss, ", [");
56    printReg(ss, base);
57    ccprintf(ss, "]");
58    return ss.str();
59}
60
61
62
63void
64Memory64::startDisassembly(std::ostream &os) const
65{
66    printMnemonic(os, "", false);
67    printReg(os, dest);
68    ccprintf(os, ", [");
69    printReg(os, base);
70}
71
72void
73Memory64::setExcAcRel(bool exclusive, bool acrel)
74{
75    if (exclusive)
76        memAccessFlags |= Request::LLSC;
77    else
78        memAccessFlags |= ArmISA::TLB::AllowUnaligned;
79    if (acrel) {
80        flags[IsMemBarrier] = true;
81        flags[IsWriteBarrier] = true;
82        flags[IsReadBarrier] = true;
83    }
84}
85
86std::string
87MemoryImm64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
88{
89    std::stringstream ss;
90    startDisassembly(ss);
91    if (imm)
92        ccprintf(ss, ", #%d", imm);
93    ccprintf(ss, "]");
94    return ss.str();
95}
96
97std::string
98MemoryDImm64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
99{
100    std::stringstream ss;
101    printMnemonic(ss, "", false);
102    printReg(ss, dest);
103    ccprintf(ss, ", ");
104    printReg(ss, dest2);
105    ccprintf(ss, ", [");
106    printReg(ss, base);
107    if (imm)
108        ccprintf(ss, ", #%d", imm);
109    ccprintf(ss, "]");
110    return ss.str();
111}
112
113std::string
114MemoryDImmEx64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
115{
116    std::stringstream ss;
117    printMnemonic(ss, "", false);
118    printReg(ss, result);
119    ccprintf(ss, ", ");
120    printReg(ss, dest);
121    ccprintf(ss, ", ");
122    printReg(ss, dest2);
123    ccprintf(ss, ", [");
124    printReg(ss, base);
125    if (imm)
126        ccprintf(ss, ", #%d", imm);
127    ccprintf(ss, "]");
128    return ss.str();
129}
130
131std::string
132MemoryPreIndex64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
133{
134    std::stringstream ss;
135    startDisassembly(ss);
136    ccprintf(ss, ", #%d]!", imm);
137    return ss.str();
138}
139
140std::string
141MemoryPostIndex64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
142{
143    std::stringstream ss;
144    startDisassembly(ss);
145    if (imm)
146        ccprintf(ss, "], #%d", imm);
147    ccprintf(ss, "]");
148    return ss.str();
149}
150
151std::string
152MemoryReg64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
153{
154    std::stringstream ss;
155    startDisassembly(ss);
156    printExtendOperand(false, ss, offset, type, shiftAmt);
157    ccprintf(ss, "]");
158    return ss.str();
159}
160
161std::string
162MemoryRaw64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
163{
164    std::stringstream ss;
165    startDisassembly(ss);
166    ccprintf(ss, "]");
167    return ss.str();
168}
169
170std::string
171MemoryEx64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
172{
173    std::stringstream ss;
174    printMnemonic(ss, "", false);
175    printReg(ss, dest);
176    ccprintf(ss, ", ");
177    printReg(ss, result);
178    ccprintf(ss, ", [");
179    printReg(ss, base);
180    ccprintf(ss, "]");
181    return ss.str();
182}
183
184std::string
185MemoryLiteral64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
186{
187    std::stringstream ss;
188    printMnemonic(ss, "", false);
189    printReg(ss, dest);
190    ccprintf(ss, ", #%d", pc + imm);
191    return ss.str();
192}
193}
194