vtophys.cc revision 1147
12SN/A/*
21762SN/A * Copyright (c) 2002-2004 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu */
282665Ssaidi@eecs.umich.edu
292665Ssaidi@eecs.umich.edu#include <string>
302SN/A
312SN/A#include "arch/alpha/vtophys.hh"
323918Ssaidi@eecs.umich.edu#include "base/trace.hh"
333918Ssaidi@eecs.umich.edu#include "cpu/exec_context.hh"
343918Ssaidi@eecs.umich.edu#include "mem/functional_mem/physical_memory.hh"
353918Ssaidi@eecs.umich.edu
363918Ssaidi@eecs.umich.eduusing namespace std;
372SN/A
382SN/AAlphaISA::PageTableEntry
392SN/Akernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, AlphaISA::VAddr vaddr)
4056SN/A{
412SN/A    Addr level1_pte = ptbr + vaddr.level1();
422SN/A    AlphaISA::PageTableEntry level1 = pmem->phys_read_qword(level1_pte);
432SN/A    if (!level1.valid()) {
444045Sbinkertn@umich.edu        DPRINTF(VtoPhys, "level 1 PTE not valid, va = %#\n", vaddr);
454045Sbinkertn@umich.edu        return 0;
462SN/A    }
474045Sbinkertn@umich.edu
482SN/A    Addr level2_pte = level1.paddr() + vaddr.level2();
492SN/A    AlphaISA::PageTableEntry level2 = pmem->phys_read_qword(level2_pte);
504045Sbinkertn@umich.edu    if (!level2.valid()) {
514045Sbinkertn@umich.edu        DPRINTF(VtoPhys, "level 2 PTE not valid, va = %#x\n", vaddr);
522SN/A        return 0;
534045Sbinkertn@umich.edu    }
542SN/A
552SN/A    Addr level3_pte = level2.paddr() + vaddr.level3();
563483Ssaidi@eecs.umich.edu    AlphaISA::PageTableEntry level3 = pmem->phys_read_qword(level3_pte);
573483Ssaidi@eecs.umich.edu    if (!level3.valid()) {
583483Ssaidi@eecs.umich.edu        DPRINTF(VtoPhys, "level 3 PTE not valid, va = %#x\n", vaddr);
593918Ssaidi@eecs.umich.edu        return 0;
603483Ssaidi@eecs.umich.edu    }
614394Ssaidi@eecs.umich.edu    return level3;
624394Ssaidi@eecs.umich.edu}
633483Ssaidi@eecs.umich.edu
644394Ssaidi@eecs.umich.eduAddr
653483Ssaidi@eecs.umich.eduvtophys(PhysicalMemory *xc, Addr vaddr)
663483Ssaidi@eecs.umich.edu{
673483Ssaidi@eecs.umich.edu    Addr paddr = 0;
683483Ssaidi@eecs.umich.edu    if (AlphaISA::IsUSeg(vaddr))
693483Ssaidi@eecs.umich.edu        DPRINTF(VtoPhys, "vtophys: invalid vaddr %#x", vaddr);
703483Ssaidi@eecs.umich.edu    else if (AlphaISA::IsK0Seg(vaddr))
711954SN/A        paddr = AlphaISA::K0Seg2Phys(vaddr);
721971SN/A    else
731954SN/A        panic("vtophys: ptbr is not set on virtual lookup");
741954SN/A
751971SN/A    DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
763483Ssaidi@eecs.umich.edu
773483Ssaidi@eecs.umich.edu    return paddr;
781954SN/A}
791954SN/A
801954SN/AAddr
811971SN/Avtophys(ExecContext *xc, Addr addr)
821954SN/A{
831954SN/A    AlphaISA::VAddr vaddr = addr;
841971SN/A    Addr ptbr = xc->regs.ipr[AlphaISA::IPR_PALtemp20];
853483Ssaidi@eecs.umich.edu    Addr paddr = 0;
863483Ssaidi@eecs.umich.edu    //@todo Andrew couldn't remember why he commented some of this code
871954SN/A    //so I put it back in. Perhaps something to do with gdb debugging?
88    if (AlphaISA::PcPAL(vaddr) && (vaddr < EV5::PalMax)) {
89        paddr = vaddr & ~ULL(1);
90    } else {
91        if (AlphaISA::IsK0Seg(vaddr)) {
92            paddr = AlphaISA::K0Seg2Phys(vaddr);
93        } else if (!ptbr) {
94            paddr = vaddr;
95        } else {
96            AlphaISA::PageTableEntry pte =
97                kernel_pte_lookup(xc->physmem, ptbr, vaddr);
98            if (pte.valid())
99                paddr = pte.paddr() | vaddr.offset();
100        }
101    }
102
103
104    DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
105
106    return paddr;
107}
108
109uint8_t *
110ptomem(ExecContext *xc, Addr paddr, size_t len)
111{
112    return xc->physmem->dma_addr(paddr, len);
113}
114
115uint8_t *
116vtomem(ExecContext *xc, Addr vaddr, size_t len)
117{
118    Addr paddr = vtophys(xc, vaddr);
119    return xc->physmem->dma_addr(paddr, len);
120}
121
122void
123CopyOut(ExecContext *xc, void *dest, Addr src, size_t cplen)
124{
125    Addr paddr;
126    char *dmaaddr;
127    char *dst = (char *)dest;
128    int len;
129
130    paddr = vtophys(xc, src);
131    len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)),
132              (int)cplen);
133    dmaaddr = (char *)xc->physmem->dma_addr(paddr, len);
134    assert(dmaaddr);
135
136    memcpy(dst, dmaaddr, len);
137    if (len == cplen)
138        return;
139
140    cplen -= len;
141    dst += len;
142    src += len;
143
144    while (cplen > AlphaISA::PageBytes) {
145        paddr = vtophys(xc, src);
146        dmaaddr = (char *)xc->physmem->dma_addr(paddr, AlphaISA::PageBytes);
147        assert(dmaaddr);
148
149        memcpy(dst, dmaaddr, AlphaISA::PageBytes);
150        cplen -= AlphaISA::PageBytes;
151        dst += AlphaISA::PageBytes;
152        src += AlphaISA::PageBytes;
153    }
154
155    if (cplen > 0) {
156        paddr = vtophys(xc, src);
157        dmaaddr = (char *)xc->physmem->dma_addr(paddr, cplen);
158        assert(dmaaddr);
159
160        memcpy(dst, dmaaddr, cplen);
161    }
162}
163
164void
165CopyIn(ExecContext *xc, Addr dest, void *source, size_t cplen)
166{
167    Addr paddr;
168    char *dmaaddr;
169    char *src = (char *)source;
170    int len;
171
172    paddr = vtophys(xc, dest);
173    len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)),
174              (int)cplen);
175    dmaaddr = (char *)xc->physmem->dma_addr(paddr, len);
176    assert(dmaaddr);
177
178    memcpy(dmaaddr, src, len);
179    if (len == cplen)
180        return;
181
182    cplen -= len;
183    src += len;
184    dest += len;
185
186    while (cplen > AlphaISA::PageBytes) {
187        paddr = vtophys(xc, dest);
188        dmaaddr = (char *)xc->physmem->dma_addr(paddr, AlphaISA::PageBytes);
189        assert(dmaaddr);
190
191        memcpy(dmaaddr, src, AlphaISA::PageBytes);
192        cplen -= AlphaISA::PageBytes;
193        src += AlphaISA::PageBytes;
194        dest += AlphaISA::PageBytes;
195    }
196
197    if (cplen > 0) {
198        paddr = vtophys(xc, dest);
199        dmaaddr = (char *)xc->physmem->dma_addr(paddr, cplen);
200        assert(dmaaddr);
201
202        memcpy(dmaaddr, src, cplen);
203    }
204}
205
206void
207CopyString(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen)
208{
209    Addr paddr;
210    char *dmaaddr;
211    int len;
212
213    paddr = vtophys(xc, vaddr);
214    len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)),
215              (int)maxlen);
216    dmaaddr = (char *)xc->physmem->dma_addr(paddr, len);
217    assert(dmaaddr);
218
219    char *term = (char *)memchr(dmaaddr, 0, len);
220    if (term)
221        len = term - dmaaddr + 1;
222
223    memcpy(dst, dmaaddr, len);
224
225    if (term || len == maxlen)
226        return;
227
228    maxlen -= len;
229    dst += len;
230    vaddr += len;
231
232    while (maxlen > AlphaISA::PageBytes) {
233        paddr = vtophys(xc, vaddr);
234        dmaaddr = (char *)xc->physmem->dma_addr(paddr, AlphaISA::PageBytes);
235        assert(dmaaddr);
236
237        char *term = (char *)memchr(dmaaddr, 0, AlphaISA::PageBytes);
238        len = term ? (term - dmaaddr + 1) : AlphaISA::PageBytes;
239
240        memcpy(dst, dmaaddr, len);
241        if (term)
242            return;
243
244        maxlen -= AlphaISA::PageBytes;
245        dst += AlphaISA::PageBytes;
246        vaddr += AlphaISA::PageBytes;
247    }
248
249    if (maxlen > 0) {
250        paddr = vtophys(xc, vaddr);
251        dmaaddr = (char *)xc->physmem->dma_addr(paddr, maxlen);
252        assert(dmaaddr);
253
254        char *term = (char *)memchr(dmaaddr, 0, maxlen);
255        len = term ? (term - dmaaddr + 1) : maxlen;
256
257        memcpy(dst, dmaaddr, len);
258
259        maxlen -= len;
260    }
261
262    if (maxlen == 0)
263        dst[maxlen] = '\0';
264}
265