1/*****************************************************************************
2
3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4  more contributor license agreements.  See the NOTICE file distributed
5  with this work for additional information regarding copyright ownership.
6  Accellera licenses this file to you under the Apache License, Version 2.0
7  (the "License"); you may not use this file except in compliance with the
8  License.  You may obtain a copy of the License at
9
10    http://www.apache.org/licenses/LICENSE-2.0
11
12  Unless required by applicable law or agreed to in writing, software
13  distributed under the License is distributed on an "AS IS" BASIS,
14  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15  implied.  See the License for the specific language governing
16  permissions and limitations under the License.
17
18 *****************************************************************************/
19
20/*****************************************************************************
21
22  sc_module_registry.cpp -- Registry for all modules.
23                            FOR INTERNAL USE ONLY.
24
25  Original Author: Martin Janssen, Synopsys, Inc., 2001-05-21
26
27  CHANGE LOG AT THE END OF THE FILE
28 *****************************************************************************/
29
30
31#include "sysc/kernel/sc_kernel_ids.h"
32#include "sysc/kernel/sc_module.h"
33#include "sysc/kernel/sc_module_registry.h"
34#include "sysc/kernel/sc_simcontext.h"
35
36namespace sc_core {
37
38// ----------------------------------------------------------------------------
39//  CLASS : sc_module_registry
40//
41//  Registry for all modules.
42//  FOR INTERNAL USE ONLY!
43// ----------------------------------------------------------------------------
44
45void
46sc_module_registry::insert( sc_module& module_ )
47{
48    if( sc_is_running() ) {
49	SC_REPORT_ERROR( SC_ID_INSERT_MODULE_, "simulation running" );
50    }
51
52    if( m_simc->elaboration_done() ) {
53       SC_REPORT_ERROR( SC_ID_INSERT_MODULE_, "elaboration done" );
54    }
55
56#ifdef DEBUG_SYSTEMC
57    // check if module_ is already inserted
58    for( int i = size() - 1; i >= 0; -- i ) {
59	if( &module_ == m_module_vec[i] ) {
60	    SC_REPORT_ERROR( SC_ID_INSERT_MODULE_, "already inserted" );
61	}
62    }
63#endif
64
65    // insert
66    m_module_vec.push_back( &module_ );
67}
68
69void
70sc_module_registry::remove( sc_module& module_ )
71{
72    int i;
73    for( i = 0; i < size(); ++ i ) {
74	if( &module_ == m_module_vec[i] ) {
75	    break;
76	}
77    }
78    if( i == size() ) {
79	SC_REPORT_ERROR( SC_ID_REMOVE_MODULE_, 0 );
80    }
81
82    // remove
83    m_module_vec[i] = m_module_vec[size() - 1];
84    m_module_vec.resize(m_module_vec.size()-1);
85}
86
87
88// constructor
89
90sc_module_registry::sc_module_registry( sc_simcontext& simc_ )
91 : m_construction_done(0), m_module_vec(), m_simc( &simc_ )
92{}
93
94
95// destructor
96
97sc_module_registry::~sc_module_registry()
98{}
99
100// called when construction is done
101
102bool
103sc_module_registry::construction_done()
104{
105    if( size() == m_construction_done )
106        // nothing has been updated
107        return true;
108
109    for( ; m_construction_done < size(); ++m_construction_done ) {
110        m_module_vec[m_construction_done]->construction_done();
111    }
112    return false;
113}
114
115// called when elaboration is done
116
117void
118sc_module_registry::elaboration_done()
119{
120    bool error = false;
121    for( int i = 0; i < size(); ++ i ) {
122	m_module_vec[i]->elaboration_done( error );
123    }
124}
125
126// called before simulation begins
127
128void
129sc_module_registry::start_simulation()
130{
131    for( int i = 0; i < size(); ++ i ) {
132	m_module_vec[i]->start_simulation();
133    }
134}
135
136// called after simulation ends
137
138void
139sc_module_registry::simulation_done()
140{
141    for( int i = 0; i < size(); ++ i ) {
142	m_module_vec[i]->simulation_done();
143    }
144}
145
146} // namespace sc_core
147
148// $Log: sc_module_registry.cpp,v $
149// Revision 1.8  2011/08/26 20:46:10  acg
150//  Andy Goodrich: moved the modification log to the end of the file to
151//  eliminate source line number skew when check-ins are done.
152//
153// Revision 1.7  2011/08/24 22:05:51  acg
154//  Torsten Maehne: initialization changes to remove warnings.
155//
156// Revision 1.6  2011/05/09 04:07:49  acg
157//  Philipp A. Hartmann:
158//    (1) Restore hierarchy in all phase callbacks.
159//    (2) Ensure calls to before_end_of_elaboration.
160//
161// Revision 1.5  2011/02/18 20:27:14  acg
162//  Andy Goodrich: Updated Copyrights.
163//
164// Revision 1.4  2011/02/14 17:51:40  acg
165//  Andy Goodrich: proper pushing an poppping of the module hierarchy for
166//  start_of_simulation() and end_of_simulation.
167//
168// Revision 1.3  2011/02/13 21:47:37  acg
169//  Andy Goodrich: update copyright notice.
170//
171// Revision 1.2  2008/05/22 17:06:26  acg
172//  Andy Goodrich: updated copyright notice to include 2008.
173//
174// Revision 1.1.1.1  2006/12/15 20:20:05  acg
175// SystemC 2.3
176//
177// Revision 1.4  2006/01/26 21:04:54  acg
178//  Andy Goodrich: deprecation message changes and additional messages.
179//
180// Revision 1.3  2006/01/13 18:44:30  acg
181// Added $Log to record CVS changes into the source.
182//
183
184// Taf!
185