1/*
2 * Copyright (c) 2014-2015 ARM Limited
3 * All rights reserved
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 *     http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 * Authors: Andreas Sandberg
18 */
19
20#ifndef _LIBNOMALIMODEL_GPU_HH
21#define _LIBNOMALIMODEL_GPU_HH
22
23#include <vector>
24
25#include "types.hh"
26
27namespace NoMali {
28
29class GPUBlock;
30class GPUControl;
31class JobControl;
32class MMU;
33
34/**
35 * Top-level GPU component (abstract).
36 */
37class GPU
38{
39  public:
40    /**
41     * Instantiate a GPU from a set of functional blocks.
42     *
43     * @param gpuControl GPU control implementation.
44     * @param jobControl Job control implementation.
45     * @param mmu MMU implementation.
46     */
47    GPU(GPUControl &gpuControl, JobControl &jobControl, MMU &mmu);
48    virtual ~GPU() = 0;
49
50    /**
51     * Reset the whole GPU
52     *
53     * The default implementation of this method calls the reset() on
54     * all the function blocks. Function blocks in turn typically sets
55     * all registers to zero.
56     */
57    virtual void reset();
58
59
60    /**
61     * @{
62     * @name Register Interface
63     */
64
65    /**
66     * Read a register value from the GPU.
67     *
68     * This method decodes the address to find the function block an
69     * access is intended for and forward the register access to that
70     * block. The access that reaches the block does not include the
71     * block base address.
72     *
73     * @param addr Register address to read.
74     * @return Value of the register.
75     */
76    virtual uint32_t readReg(RegAddr addr);
77
78    /**
79     * Write a register value to the GPU.
80     *
81     * This method decodes the address to find the function block an
82     * access is intended for and forward the register access to that
83     * block. The access that reaches the block does not include the
84     * block base address.
85     *
86     * @param addr Target address for the write operation.
87     * @param value Value to write.
88     */
89    virtual void writeReg(RegAddr addr, uint32_t value);
90
91    /**
92     * Read a register value from the GPU without side effects.
93     *
94     * This method decodes the address to find the function block an
95     * access is intended for and forward the register access to that
96     * block. The access that reaches the block does not include the
97     * block base address.
98     *
99     * Unlike a normal read (readReg()), this method does not include
100     * any side effects and reads straight from the register file. It
101     * is primarily intended for things checkpointing.
102     *
103     * @param addr Register address to read.
104     * @return Value of the register.
105     */
106    virtual uint32_t readRegRaw(RegAddr addr);
107
108    /**
109     * Write a register value to the GPU without side effects.
110     *
111     * This method decodes the address to find the function block an
112     * access is intended for and forward the register access to that
113     * block. The access that reaches the block does not include the
114     * block base address.
115     *
116     * Unlike a normal write (writeReg()), this method does not
117     * include any side effects and writes straight into the register
118     * file. It is primarily intended for things checkpointing.
119     *
120     * @param addr Target address for the write operation.
121     * @param value Value to write.
122     */
123    virtual void writeRegRaw(RegAddr addr, uint32_t value);
124
125    /** @} */
126
127    /**
128     * @{
129     * @name Callbacks
130     */
131
132    /**
133     * Job interrupt state change
134     *
135     * @param set Non-zero if raising interrupt, zero if clearing.
136     */
137    virtual void intJob(int set) {};
138    /**
139     * MMU interrupt state change
140     *
141     * @param set Non-zero if raising interrupt, zero if clearing.
142     */
143    virtual void intMMU(int set) {};
144    /**
145     * GPU interrupt state change
146     *
147     * @param set Non-zero if raising interrupt, zero if clearing.
148     */
149    virtual void intGPU(int set) {};
150
151    /** @} */
152
153
154    /**
155     * Check if the GPU interrupt has been asserted.
156     *
157     * @see GPUControl::intAsserted()
158     *
159     * @return true if the GPU control block reports that an interrupt
160     * has been asserted.
161     */
162    bool intGPUAsserted() const;
163    /**
164     * Check if the job interrupt has been asserted.
165     *
166     * @see JobControl::intAsserted()
167     *
168     * @return true if the job control block reports that an interrupt
169     * has been asserted.
170     */
171    bool intJobAsserted() const;
172    /**
173     * Check if the MMU interrupt has been asserted.
174     *
175     * @see JobControl::intAsserted()
176     *
177     * @return true if the GPU control block reports that an interrupt
178     * has been asserted.
179     */
180    bool intMMUAsserted() const;
181
182  private:
183    /**
184     * Resolve an address into a functional block within the GPU.
185     *
186     * @return Valid pointer or NULL if address is out of range.
187     */
188    GPUBlock *getGPUBlock(RegAddr addr);
189
190    GPUControl &gpuControl;
191    JobControl &jobControl;
192    MMU &mmu;
193
194    /**
195     * Vector of control blocks.
196     *
197     * @note The order <i>MUST</i> have the same correspond to the
198     * values in the RegBlock enum.
199     */
200    const std::vector<GPUBlock *> blocks;
201};
202
203}
204
205#endif // _LIBNOMALIMODEL_GPU_HH
206