decoder.h revision 10234
110152Satgutier@umich.edu/***************************************************************************** 210152Satgutier@umich.edu * McPAT/CACTI 310152Satgutier@umich.edu * SOFTWARE LICENSE AGREEMENT 410152Satgutier@umich.edu * Copyright 2012 Hewlett-Packard Development Company, L.P. 510234Syasuko.eckert@amd.com * Copyright (c) 2010-2013 Advanced Micro Devices, Inc. 610152Satgutier@umich.edu * All Rights Reserved 710152Satgutier@umich.edu * 810152Satgutier@umich.edu * Redistribution and use in source and binary forms, with or without 910152Satgutier@umich.edu * modification, are permitted provided that the following conditions are 1010152Satgutier@umich.edu * met: redistributions of source code must retain the above copyright 1110152Satgutier@umich.edu * notice, this list of conditions and the following disclaimer; 1210152Satgutier@umich.edu * redistributions in binary form must reproduce the above copyright 1310152Satgutier@umich.edu * notice, this list of conditions and the following disclaimer in the 1410152Satgutier@umich.edu * documentation and/or other materials provided with the distribution; 1510152Satgutier@umich.edu * neither the name of the copyright holders nor the names of its 1610152Satgutier@umich.edu * contributors may be used to endorse or promote products derived from 1710152Satgutier@umich.edu * this software without specific prior written permission. 1810152Satgutier@umich.edu 1910152Satgutier@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2010152Satgutier@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2110152Satgutier@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2210152Satgutier@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2310152Satgutier@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2410152Satgutier@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2510152Satgutier@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2610152Satgutier@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2710152Satgutier@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2810152Satgutier@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2910234Syasuko.eckert@amd.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3010152Satgutier@umich.edu * 3110152Satgutier@umich.edu ***************************************************************************/ 3210152Satgutier@umich.edu 3310152Satgutier@umich.edu 3410152Satgutier@umich.edu#ifndef __DECODER_H__ 3510152Satgutier@umich.edu#define __DECODER_H__ 3610152Satgutier@umich.edu 3710152Satgutier@umich.edu#include <vector> 3810152Satgutier@umich.edu 3910152Satgutier@umich.edu#include "area.h" 4010152Satgutier@umich.edu#include "component.h" 4110152Satgutier@umich.edu#include "parameter.h" 4210152Satgutier@umich.edu 4310152Satgutier@umich.eduusing namespace std; 4410152Satgutier@umich.edu 4510152Satgutier@umich.edu 4610234Syasuko.eckert@amd.comclass Decoder : public Component { 4710234Syasuko.eckert@amd.compublic: 4810152Satgutier@umich.edu Decoder( 4910152Satgutier@umich.edu int _num_dec_signals, 5010152Satgutier@umich.edu bool flag_way_select, 5110152Satgutier@umich.edu double _C_ld_dec_out, 5210152Satgutier@umich.edu double _R_wire_dec_out, 5310152Satgutier@umich.edu bool fully_assoc_, 5410152Satgutier@umich.edu bool is_dram_, 5510152Satgutier@umich.edu bool is_wl_tr_, 5610152Satgutier@umich.edu const Area & cell_); 5710152Satgutier@umich.edu 5810152Satgutier@umich.edu bool exist; 5910152Satgutier@umich.edu int num_in_signals; 6010152Satgutier@umich.edu double C_ld_dec_out; 6110152Satgutier@umich.edu double R_wire_dec_out; 6210152Satgutier@umich.edu int num_gates; 6310152Satgutier@umich.edu int num_gates_min; 6410152Satgutier@umich.edu double w_dec_n[MAX_NUMBER_GATES_STAGE]; 6510152Satgutier@umich.edu double w_dec_p[MAX_NUMBER_GATES_STAGE]; 6610152Satgutier@umich.edu double delay; 6710152Satgutier@umich.edu //powerDef power; 6810152Satgutier@umich.edu bool fully_assoc; 6910152Satgutier@umich.edu bool is_dram; 7010152Satgutier@umich.edu bool is_wl_tr; 7110152Satgutier@umich.edu const Area & cell; 7210152Satgutier@umich.edu 7310152Satgutier@umich.edu 7410152Satgutier@umich.edu void compute_widths(); 7510152Satgutier@umich.edu void compute_area(); 7610152Satgutier@umich.edu double compute_delays(double inrisetime); // return outrisetime 7710152Satgutier@umich.edu 7810152Satgutier@umich.edu void leakage_feedback(double temperature); 7910152Satgutier@umich.edu}; 8010152Satgutier@umich.edu 8110152Satgutier@umich.edu 8210152Satgutier@umich.edu 8310234Syasuko.eckert@amd.comclass PredecBlk : public Component { 8410234Syasuko.eckert@amd.compublic: 8510234Syasuko.eckert@amd.com PredecBlk( 8610234Syasuko.eckert@amd.com int num_dec_signals, 8710234Syasuko.eckert@amd.com Decoder * dec, 8810234Syasuko.eckert@amd.com double C_wire_predec_blk_out, 8910234Syasuko.eckert@amd.com double R_wire_predec_blk_out, 9010234Syasuko.eckert@amd.com int num_dec_per_predec, 9110234Syasuko.eckert@amd.com bool is_dram_, 9210234Syasuko.eckert@amd.com bool is_blk1); 9310152Satgutier@umich.edu 9410234Syasuko.eckert@amd.com Decoder * dec; 9510234Syasuko.eckert@amd.com bool exist; 9610234Syasuko.eckert@amd.com int number_input_addr_bits; 9710234Syasuko.eckert@amd.com double C_ld_predec_blk_out; 9810234Syasuko.eckert@amd.com double R_wire_predec_blk_out; 9910234Syasuko.eckert@amd.com int branch_effort_nand2_gate_output; 10010234Syasuko.eckert@amd.com int branch_effort_nand3_gate_output; 10110234Syasuko.eckert@amd.com bool flag_two_unique_paths; 10210234Syasuko.eckert@amd.com int flag_L2_gate; 10310234Syasuko.eckert@amd.com int number_inputs_L1_gate; 10410234Syasuko.eckert@amd.com int number_gates_L1_nand2_path; 10510234Syasuko.eckert@amd.com int number_gates_L1_nand3_path; 10610234Syasuko.eckert@amd.com int number_gates_L2; 10710234Syasuko.eckert@amd.com int min_number_gates_L1; 10810234Syasuko.eckert@amd.com int min_number_gates_L2; 10910234Syasuko.eckert@amd.com int num_L1_active_nand2_path; 11010234Syasuko.eckert@amd.com int num_L1_active_nand3_path; 11110234Syasuko.eckert@amd.com double w_L1_nand2_n[MAX_NUMBER_GATES_STAGE]; 11210234Syasuko.eckert@amd.com double w_L1_nand2_p[MAX_NUMBER_GATES_STAGE]; 11310234Syasuko.eckert@amd.com double w_L1_nand3_n[MAX_NUMBER_GATES_STAGE]; 11410234Syasuko.eckert@amd.com double w_L1_nand3_p[MAX_NUMBER_GATES_STAGE]; 11510234Syasuko.eckert@amd.com double w_L2_n[MAX_NUMBER_GATES_STAGE]; 11610234Syasuko.eckert@amd.com double w_L2_p[MAX_NUMBER_GATES_STAGE]; 11710234Syasuko.eckert@amd.com double delay_nand2_path; 11810234Syasuko.eckert@amd.com double delay_nand3_path; 11910234Syasuko.eckert@amd.com powerDef power_nand2_path; 12010234Syasuko.eckert@amd.com powerDef power_nand3_path; 12110234Syasuko.eckert@amd.com powerDef power_L2; 12210152Satgutier@umich.edu 12310234Syasuko.eckert@amd.com bool is_dram_; 12410152Satgutier@umich.edu 12510234Syasuko.eckert@amd.com void compute_widths(); 12610234Syasuko.eckert@amd.com void compute_area(); 12710152Satgutier@umich.edu 12810234Syasuko.eckert@amd.com void leakage_feedback(double temperature); 12910152Satgutier@umich.edu 13010234Syasuko.eckert@amd.com pair<double, double> compute_delays(pair<double, double> inrisetime); // <nand2, nand3> 13110234Syasuko.eckert@amd.com // return <outrise_nand2, outrise_nand3> 13210152Satgutier@umich.edu}; 13310152Satgutier@umich.edu 13410152Satgutier@umich.edu 13510234Syasuko.eckert@amd.comclass PredecBlkDrv : public Component { 13610234Syasuko.eckert@amd.compublic: 13710234Syasuko.eckert@amd.com PredecBlkDrv( 13810234Syasuko.eckert@amd.com int way_select, 13910234Syasuko.eckert@amd.com PredecBlk * blk_, 14010234Syasuko.eckert@amd.com bool is_dram); 14110152Satgutier@umich.edu 14210234Syasuko.eckert@amd.com int flag_driver_exists; 14310234Syasuko.eckert@amd.com int number_input_addr_bits; 14410234Syasuko.eckert@amd.com int number_gates_nand2_path; 14510234Syasuko.eckert@amd.com int number_gates_nand3_path; 14610234Syasuko.eckert@amd.com int min_number_gates; 14710234Syasuko.eckert@amd.com int num_buffers_driving_1_nand2_load; 14810234Syasuko.eckert@amd.com int num_buffers_driving_2_nand2_load; 14910234Syasuko.eckert@amd.com int num_buffers_driving_4_nand2_load; 15010234Syasuko.eckert@amd.com int num_buffers_driving_2_nand3_load; 15110234Syasuko.eckert@amd.com int num_buffers_driving_8_nand3_load; 15210234Syasuko.eckert@amd.com int num_buffers_nand3_path; 15310234Syasuko.eckert@amd.com double c_load_nand2_path_out; 15410234Syasuko.eckert@amd.com double c_load_nand3_path_out; 15510234Syasuko.eckert@amd.com double r_load_nand2_path_out; 15610234Syasuko.eckert@amd.com double r_load_nand3_path_out; 15710234Syasuko.eckert@amd.com double width_nand2_path_n[MAX_NUMBER_GATES_STAGE]; 15810234Syasuko.eckert@amd.com double width_nand2_path_p[MAX_NUMBER_GATES_STAGE]; 15910234Syasuko.eckert@amd.com double width_nand3_path_n[MAX_NUMBER_GATES_STAGE]; 16010234Syasuko.eckert@amd.com double width_nand3_path_p[MAX_NUMBER_GATES_STAGE]; 16110234Syasuko.eckert@amd.com double delay_nand2_path; 16210234Syasuko.eckert@amd.com double delay_nand3_path; 16310234Syasuko.eckert@amd.com powerDef power_nand2_path; 16410234Syasuko.eckert@amd.com powerDef power_nand3_path; 16510152Satgutier@umich.edu 16610234Syasuko.eckert@amd.com PredecBlk * blk; 16710234Syasuko.eckert@amd.com Decoder * dec; 16810234Syasuko.eckert@amd.com bool is_dram_; 16910234Syasuko.eckert@amd.com int way_select; 17010152Satgutier@umich.edu 17110234Syasuko.eckert@amd.com void compute_widths(); 17210234Syasuko.eckert@amd.com void compute_area(); 17310152Satgutier@umich.edu 17410234Syasuko.eckert@amd.com void leakage_feedback(double temperature); 17510152Satgutier@umich.edu 17610152Satgutier@umich.edu 17710234Syasuko.eckert@amd.com pair<double, double> compute_delays( 17810234Syasuko.eckert@amd.com double inrisetime_nand2_path, 17910234Syasuko.eckert@amd.com double inrisetime_nand3_path); // return <outrise_nand2, outrise_nand3> 18010152Satgutier@umich.edu 18110234Syasuko.eckert@amd.com inline int num_addr_bits_nand2_path() { 18210234Syasuko.eckert@amd.com return num_buffers_driving_1_nand2_load + 18310234Syasuko.eckert@amd.com num_buffers_driving_2_nand2_load + 18410234Syasuko.eckert@amd.com num_buffers_driving_4_nand2_load; 18510234Syasuko.eckert@amd.com } 18610234Syasuko.eckert@amd.com inline int num_addr_bits_nand3_path() { 18710234Syasuko.eckert@amd.com return num_buffers_driving_2_nand3_load + 18810234Syasuko.eckert@amd.com num_buffers_driving_8_nand3_load; 18910234Syasuko.eckert@amd.com } 19010234Syasuko.eckert@amd.com double get_rdOp_dynamic_E(int num_act_mats_hor_dir); 19110152Satgutier@umich.edu}; 19210152Satgutier@umich.edu 19310152Satgutier@umich.edu 19410152Satgutier@umich.edu 19510234Syasuko.eckert@amd.comclass Predec : public Component { 19610234Syasuko.eckert@amd.compublic: 19710152Satgutier@umich.edu Predec( 19810152Satgutier@umich.edu PredecBlkDrv * drv1, 19910152Satgutier@umich.edu PredecBlkDrv * drv2); 20010152Satgutier@umich.edu 20110152Satgutier@umich.edu double compute_delays(double inrisetime); // return outrisetime 20210152Satgutier@umich.edu 20310152Satgutier@umich.edu void leakage_feedback(double temperature); 20410152Satgutier@umich.edu PredecBlk * blk1; 20510152Satgutier@umich.edu PredecBlk * blk2; 20610152Satgutier@umich.edu PredecBlkDrv * drv1; 20710152Satgutier@umich.edu PredecBlkDrv * drv2; 20810152Satgutier@umich.edu 20910152Satgutier@umich.edu powerDef block_power; 21010152Satgutier@umich.edu powerDef driver_power; 21110152Satgutier@umich.edu 21210234Syasuko.eckert@amd.comprivate: 21310152Satgutier@umich.edu // returns <delay, risetime> 21410152Satgutier@umich.edu pair<double, double> get_max_delay_before_decoder( 21510152Satgutier@umich.edu pair<double, double> input_pair1, 21610152Satgutier@umich.edu pair<double, double> input_pair2); 21710152Satgutier@umich.edu}; 21810152Satgutier@umich.edu 21910152Satgutier@umich.edu 22010152Satgutier@umich.edu 22110234Syasuko.eckert@amd.comclass Driver : public Component { 22210234Syasuko.eckert@amd.compublic: 22310234Syasuko.eckert@amd.com Driver(double c_gate_load_, double c_wire_load_, double r_wire_load_, bool is_dram); 22410152Satgutier@umich.edu 22510234Syasuko.eckert@amd.com int number_gates; 22610234Syasuko.eckert@amd.com int min_number_gates; 22710234Syasuko.eckert@amd.com double width_n[MAX_NUMBER_GATES_STAGE]; 22810234Syasuko.eckert@amd.com double width_p[MAX_NUMBER_GATES_STAGE]; 22910234Syasuko.eckert@amd.com double c_gate_load; 23010234Syasuko.eckert@amd.com double c_wire_load; 23110234Syasuko.eckert@amd.com double r_wire_load; 23210234Syasuko.eckert@amd.com double delay; 23310234Syasuko.eckert@amd.com powerDef power; 23410234Syasuko.eckert@amd.com bool is_dram_; 23510152Satgutier@umich.edu 23610234Syasuko.eckert@amd.com void compute_widths(); 23710234Syasuko.eckert@amd.com double compute_delay(double inrisetime); 23810152Satgutier@umich.edu}; 23910152Satgutier@umich.edu 24010152Satgutier@umich.edu 24110152Satgutier@umich.edu#endif 242