cacti_interface.cc revision 10234
110152Satgutier@umich.edu/***************************************************************************** 210152Satgutier@umich.edu * McPAT/CACTI 310152Satgutier@umich.edu * SOFTWARE LICENSE AGREEMENT 410152Satgutier@umich.edu * Copyright 2012 Hewlett-Packard Development Company, L.P. 510234Syasuko.eckert@amd.com * Copyright (c) 2010-2013 Advanced Micro Devices, Inc. 610152Satgutier@umich.edu * All Rights Reserved 710152Satgutier@umich.edu * 810152Satgutier@umich.edu * Redistribution and use in source and binary forms, with or without 910152Satgutier@umich.edu * modification, are permitted provided that the following conditions are 1010152Satgutier@umich.edu * met: redistributions of source code must retain the above copyright 1110152Satgutier@umich.edu * notice, this list of conditions and the following disclaimer; 1210152Satgutier@umich.edu * redistributions in binary form must reproduce the above copyright 1310152Satgutier@umich.edu * notice, this list of conditions and the following disclaimer in the 1410152Satgutier@umich.edu * documentation and/or other materials provided with the distribution; 1510152Satgutier@umich.edu * neither the name of the copyright holders nor the names of its 1610152Satgutier@umich.edu * contributors may be used to endorse or promote products derived from 1710152Satgutier@umich.edu * this software without specific prior written permission. 1810152Satgutier@umich.edu 1910152Satgutier@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2010152Satgutier@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2110152Satgutier@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2210152Satgutier@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2310152Satgutier@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2410152Satgutier@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2510152Satgutier@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2610152Satgutier@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2710152Satgutier@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2810152Satgutier@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2910234Syasuko.eckert@amd.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3010152Satgutier@umich.edu * 3110152Satgutier@umich.edu ***************************************************************************/ 3210152Satgutier@umich.edu 3310152Satgutier@umich.edu#include <pthread.h> 3410152Satgutier@umich.edu 3510152Satgutier@umich.edu#include <algorithm> 3610152Satgutier@umich.edu#include <cmath> 3710152Satgutier@umich.edu#include <ctime> 3810152Satgutier@umich.edu#include <iostream> 3910152Satgutier@umich.edu 4010152Satgutier@umich.edu#include "Ucache.h" 4110152Satgutier@umich.edu#include "area.h" 4210152Satgutier@umich.edu#include "basic_circuit.h" 4310152Satgutier@umich.edu#include "cacti_interface.h" 4410152Satgutier@umich.edu#include "component.h" 4510152Satgutier@umich.edu#include "const.h" 4610152Satgutier@umich.edu#include "parameter.h" 4710152Satgutier@umich.edu 4810152Satgutier@umich.eduusing namespace std; 4910152Satgutier@umich.edu 5010152Satgutier@umich.edu 5110234Syasuko.eckert@amd.combool mem_array::lt(const mem_array * m1, const mem_array * m2) { 5210234Syasuko.eckert@amd.com if (m1->Nspd < m2->Nspd) return true; 5310234Syasuko.eckert@amd.com else if (m1->Nspd > m2->Nspd) return false; 5410234Syasuko.eckert@amd.com else if (m1->Ndwl < m2->Ndwl) return true; 5510234Syasuko.eckert@amd.com else if (m1->Ndwl > m2->Ndwl) return false; 5610234Syasuko.eckert@amd.com else if (m1->Ndbl < m2->Ndbl) return true; 5710234Syasuko.eckert@amd.com else if (m1->Ndbl > m2->Ndbl) return false; 5810234Syasuko.eckert@amd.com else if (m1->deg_bl_muxing < m2->deg_bl_muxing) return true; 5910234Syasuko.eckert@amd.com else if (m1->deg_bl_muxing > m2->deg_bl_muxing) return false; 6010234Syasuko.eckert@amd.com else if (m1->Ndsam_lev_1 < m2->Ndsam_lev_1) return true; 6110234Syasuko.eckert@amd.com else if (m1->Ndsam_lev_1 > m2->Ndsam_lev_1) return false; 6210234Syasuko.eckert@amd.com else if (m1->Ndsam_lev_2 < m2->Ndsam_lev_2) return true; 6310234Syasuko.eckert@amd.com else return false; 6410152Satgutier@umich.edu} 6510152Satgutier@umich.edu 6610152Satgutier@umich.edu 6710152Satgutier@umich.edu 6810234Syasuko.eckert@amd.comvoid uca_org_t::find_delay() { 6910234Syasuko.eckert@amd.com mem_array * data_arr = data_array2; 7010234Syasuko.eckert@amd.com mem_array * tag_arr = tag_array2; 7110152Satgutier@umich.edu 7210234Syasuko.eckert@amd.com // check whether it is a regular cache or scratch ram 7310234Syasuko.eckert@amd.com if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) { 7410234Syasuko.eckert@amd.com access_time = data_arr->access_time; 7510234Syasuko.eckert@amd.com } 7610234Syasuko.eckert@amd.com // Both tag and data lookup happen in parallel 7710234Syasuko.eckert@amd.com // and the entire set is sent over the data array h-tree without 7810234Syasuko.eckert@amd.com // waiting for the way-select signal --TODO add the corresponding 7910234Syasuko.eckert@amd.com // power overhead Nav 8010234Syasuko.eckert@amd.com else if (g_ip->fast_access == true) { 8110234Syasuko.eckert@amd.com access_time = MAX(tag_arr->access_time, data_arr->access_time); 8210234Syasuko.eckert@amd.com } 8310234Syasuko.eckert@amd.com // Tag is accessed first. On a hit, way-select signal along with the 8410234Syasuko.eckert@amd.com // address is sent to read/write the appropriate block in the data 8510234Syasuko.eckert@amd.com // array 8610234Syasuko.eckert@amd.com else if (g_ip->is_seq_acc == true) { 8710234Syasuko.eckert@amd.com access_time = tag_arr->access_time + data_arr->access_time; 8810234Syasuko.eckert@amd.com } 8910234Syasuko.eckert@amd.com // Normal access: tag array access and data array access happen in parallel. 9010234Syasuko.eckert@amd.com // But, the data array will wait for the way-select and transfer only the 9110234Syasuko.eckert@amd.com // appropriate block over the h-tree. 9210234Syasuko.eckert@amd.com else { 9310234Syasuko.eckert@amd.com access_time = MAX(tag_arr->access_time + data_arr->delay_senseamp_mux_decoder, 9410234Syasuko.eckert@amd.com data_arr->delay_before_subarray_output_driver) + 9510234Syasuko.eckert@amd.com data_arr->delay_from_subarray_output_driver_to_output; 9610234Syasuko.eckert@amd.com } 9710152Satgutier@umich.edu} 9810152Satgutier@umich.edu 9910152Satgutier@umich.edu 10010152Satgutier@umich.edu 10110234Syasuko.eckert@amd.comvoid uca_org_t::find_energy() { 10210234Syasuko.eckert@amd.com if (!(g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc)) 10310234Syasuko.eckert@amd.com power = data_array2->power + tag_array2->power; 10410234Syasuko.eckert@amd.com else 10510234Syasuko.eckert@amd.com power = data_array2->power; 10610152Satgutier@umich.edu} 10710152Satgutier@umich.edu 10810152Satgutier@umich.edu 10910152Satgutier@umich.edu 11010234Syasuko.eckert@amd.comvoid uca_org_t::find_area() { 11110234Syasuko.eckert@amd.com if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) { 11210234Syasuko.eckert@amd.com cache_ht = data_array2->height; 11310234Syasuko.eckert@amd.com cache_len = data_array2->width; 11410234Syasuko.eckert@amd.com } else { 11510234Syasuko.eckert@amd.com cache_ht = MAX(tag_array2->height, data_array2->height); 11610234Syasuko.eckert@amd.com cache_len = tag_array2->width + data_array2->width; 11710234Syasuko.eckert@amd.com } 11810234Syasuko.eckert@amd.com area = cache_ht * cache_len; 11910152Satgutier@umich.edu} 12010152Satgutier@umich.edu 12110234Syasuko.eckert@amd.comvoid uca_org_t::adjust_area() { 12210234Syasuko.eckert@amd.com double area_adjust; 12310234Syasuko.eckert@amd.com if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) { 12410234Syasuko.eckert@amd.com if (data_array2->area_efficiency / 100.0 < 0.2) { 12510234Syasuko.eckert@amd.com //area_adjust = sqrt(area/(area*(data_array2->area_efficiency/100.0)/0.2)); 12610234Syasuko.eckert@amd.com area_adjust = sqrt(0.2 / (data_array2->area_efficiency / 100.0)); 12710234Syasuko.eckert@amd.com cache_ht = cache_ht / area_adjust; 12810234Syasuko.eckert@amd.com cache_len = cache_len / area_adjust; 12910234Syasuko.eckert@amd.com } 13010152Satgutier@umich.edu } 13110234Syasuko.eckert@amd.com area = cache_ht * cache_len; 13210152Satgutier@umich.edu} 13310152Satgutier@umich.edu 13410234Syasuko.eckert@amd.comvoid uca_org_t::find_cyc() { 13510234Syasuko.eckert@amd.com if ((g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc)) { 13610234Syasuko.eckert@amd.com cycle_time = data_array2->cycle_time; 13710234Syasuko.eckert@amd.com } else { 13810234Syasuko.eckert@amd.com cycle_time = MAX(tag_array2->cycle_time, 13910234Syasuko.eckert@amd.com data_array2->cycle_time); 14010234Syasuko.eckert@amd.com } 14110152Satgutier@umich.edu} 14210152Satgutier@umich.edu 14310152Satgutier@umich.eduuca_org_t :: uca_org_t() 14410234Syasuko.eckert@amd.com : tag_array2(0), 14510234Syasuko.eckert@amd.com data_array2(0) { 14610152Satgutier@umich.edu 14710152Satgutier@umich.edu} 14810152Satgutier@umich.edu 14910234Syasuko.eckert@amd.comvoid uca_org_t :: cleanup() { 15010234Syasuko.eckert@amd.com if (data_array2 != 0) 15110234Syasuko.eckert@amd.com delete data_array2; 15210234Syasuko.eckert@amd.com if (tag_array2 != 0) 15310234Syasuko.eckert@amd.com delete tag_array2; 15410152Satgutier@umich.edu} 155