cacti_interface.cc revision 10234 
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2 *                                McPAT/CACTI
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32
33#include <pthread.h>
34
35#include <algorithm>
36#include <cmath>
37#include <ctime>
38#include <iostream>
39
40#include "Ucache.h"
41#include "area.h"
42#include "basic_circuit.h"
43#include "cacti_interface.h"
44#include "component.h"
45#include "const.h"
46#include "parameter.h"
47
48using namespace std;
49
50
51bool mem_array::lt(const mem_array * m1, const mem_array * m2) {
52    if (m1->Nspd < m2->Nspd) return true;
53    else if (m1->Nspd > m2->Nspd) return false;
54    else if (m1->Ndwl < m2->Ndwl) return true;
55    else if (m1->Ndwl > m2->Ndwl) return false;
56    else if (m1->Ndbl < m2->Ndbl) return true;
57    else if (m1->Ndbl > m2->Ndbl) return false;
58    else if (m1->deg_bl_muxing < m2->deg_bl_muxing) return true;
59    else if (m1->deg_bl_muxing > m2->deg_bl_muxing) return false;
60    else if (m1->Ndsam_lev_1 < m2->Ndsam_lev_1) return true;
61    else if (m1->Ndsam_lev_1 > m2->Ndsam_lev_1) return false;
62    else if (m1->Ndsam_lev_2 < m2->Ndsam_lev_2) return true;
63    else return false;
64}
65
66
67
68void uca_org_t::find_delay() {
69    mem_array * data_arr = data_array2;
70    mem_array * tag_arr  = tag_array2;
71
72    // check whether it is a regular cache or scratch ram
73    if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) {
74        access_time = data_arr->access_time;
75    }
76    // Both tag and data lookup happen in parallel
77    // and the entire set is sent over the data array h-tree without
78    // waiting for the way-select signal --TODO add the corresponding
79    // power overhead Nav
80    else if (g_ip->fast_access == true) {
81        access_time = MAX(tag_arr->access_time, data_arr->access_time);
82    }
83    // Tag is accessed first. On a hit, way-select signal along with the
84    // address is sent to read/write the appropriate block in the data
85    // array
86    else if (g_ip->is_seq_acc == true) {
87        access_time = tag_arr->access_time + data_arr->access_time;
88    }
89    // Normal access: tag array access and data array access happen in parallel.
90    // But, the data array will wait for the way-select and transfer only the
91    // appropriate block over the h-tree.
92    else {
93        access_time = MAX(tag_arr->access_time + data_arr->delay_senseamp_mux_decoder,
94                          data_arr->delay_before_subarray_output_driver) +
95                      data_arr->delay_from_subarray_output_driver_to_output;
96    }
97}
98
99
100
101void uca_org_t::find_energy() {
102    if (!(g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc))
103        power = data_array2->power + tag_array2->power;
104    else
105        power = data_array2->power;
106}
107
108
109
110void uca_org_t::find_area() {
111    if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) {
112        cache_ht  = data_array2->height;
113        cache_len = data_array2->width;
114    } else {
115        cache_ht  = MAX(tag_array2->height, data_array2->height);
116        cache_len = tag_array2->width + data_array2->width;
117    }
118    area = cache_ht * cache_len;
119}
120
121void uca_org_t::adjust_area() {
122    double area_adjust;
123    if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) {
124        if (data_array2->area_efficiency / 100.0 < 0.2) {
125            //area_adjust = sqrt(area/(area*(data_array2->area_efficiency/100.0)/0.2));
126            area_adjust = sqrt(0.2 / (data_array2->area_efficiency / 100.0));
127            cache_ht  = cache_ht / area_adjust;
128            cache_len = cache_len / area_adjust;
129        }
130    }
131    area = cache_ht * cache_len;
132}
133
134void uca_org_t::find_cyc() {
135    if ((g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc)) {
136        cycle_time = data_array2->cycle_time;
137    } else {
138        cycle_time = MAX(tag_array2->cycle_time,
139                         data_array2->cycle_time);
140    }
141}
142
143uca_org_t :: uca_org_t()
144        : tag_array2(0),
145        data_array2(0) {
146
147}
148
149void uca_org_t :: cleanup() {
150    if (data_array2 != 0)
151        delete data_array2;
152    if (tag_array2 != 0)
153        delete tag_array2;
154}
155