1/***************************************************************************** 2 * McPAT/CACTI 3 * SOFTWARE LICENSE AGREEMENT 4 * Copyright 2012 Hewlett-Packard Development Company, L.P. 5 * Copyright (c) 2010-2013 Advanced Micro Devices, Inc. 6 * All Rights Reserved 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are 10 * met: redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer; 12 * redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution; 15 * neither the name of the copyright holders nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 22 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 23 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 25 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 ***************************************************************************/ 32 33 34 35#include <iostream> 36 37#include "bank.h" 38 39Bank::Bank(const DynamicParameter & dyn_p): 40 dp(dyn_p), mat(dp), 41 num_addr_b_mat(dyn_p.number_addr_bits_mat), 42 num_mats_hor_dir(dyn_p.num_mats_h_dir), 43 num_mats_ver_dir(dyn_p.num_mats_v_dir) { 44 int RWP; 45 int ERP; 46 int EWP; 47 int SCHP; 48 49 if (dp.use_inp_params) { 50 RWP = dp.num_rw_ports; 51 ERP = dp.num_rd_ports; 52 EWP = dp.num_wr_ports; 53 SCHP = dp.num_search_ports; 54 } else { 55 RWP = g_ip->num_rw_ports; 56 ERP = g_ip->num_rd_ports; 57 EWP = g_ip->num_wr_ports; 58 SCHP = g_ip->num_search_ports; 59 } 60 61 int total_addrbits = (dp.number_addr_bits_mat + 62 dp.number_subbanks_decode) * (RWP + ERP + EWP); 63 int datainbits = dp.num_di_b_bank_per_port * (RWP + EWP); 64 int dataoutbits = dp.num_do_b_bank_per_port * (RWP + ERP); 65 int searchinbits; 66 int searchoutbits; 67 68 if (dp.fully_assoc || dp.pure_cam) { 69 datainbits = dp.num_di_b_bank_per_port * (RWP + EWP); 70 dataoutbits = dp.num_do_b_bank_per_port * (RWP + ERP); 71 searchinbits = dp.num_si_b_bank_per_port * SCHP; 72 searchoutbits = dp.num_so_b_bank_per_port * SCHP; 73 } 74 75 if (!(dp.fully_assoc || dp.pure_cam)) { 76 if (g_ip->fast_access && dp.is_tag == false) { 77 dataoutbits *= g_ip->data_assoc; 78 } 79 80 htree_in_add = new Htree2(g_ip->wt, (double) mat.area.w, 81 (double)mat.area.h, 82 total_addrbits, datainbits, 0, dataoutbits, 83 0, num_mats_ver_dir * 2, num_mats_hor_dir * 2, 84 Add_htree); 85 htree_in_data = new Htree2(g_ip->wt, (double) mat.area.w, 86 (double)mat.area.h, 87 total_addrbits, datainbits, 0, dataoutbits, 88 0, num_mats_ver_dir * 2, num_mats_hor_dir * 2, 89 Data_in_htree); 90 htree_out_data = new Htree2(g_ip->wt, (double) mat.area.w, 91 (double)mat.area.h, 92 total_addrbits, datainbits, 0, dataoutbits, 93 0, num_mats_ver_dir * 2, 94 num_mats_hor_dir * 2, Data_out_htree); 95 96// htree_out_data = new Htree2 (g_ip->wt,(double) 100, (double)100, 97// total_addrbits, datainbits, 0,dataoutbits,0, num_mats_ver_dir*2, num_mats_hor_dir*2, Data_out_htree); 98 99 area.w = htree_in_data->area.w; 100 area.h = htree_in_data->area.h; 101 } else { 102 htree_in_add = 103 new Htree2(g_ip->wt, (double) mat.area.w, (double)mat.area.h, 104 total_addrbits, datainbits, searchinbits, dataoutbits, 105 searchoutbits, num_mats_ver_dir * 2, 106 num_mats_hor_dir * 2, Add_htree); 107 htree_in_data = 108 new Htree2(g_ip->wt, (double) mat.area.w, (double)mat.area.h, 109 total_addrbits, datainbits, searchinbits, dataoutbits, 110 searchoutbits, num_mats_ver_dir * 2, 111 num_mats_hor_dir * 2, Data_in_htree); 112 htree_out_data = 113 new Htree2(g_ip->wt, (double) mat.area.w, (double)mat.area.h, 114 total_addrbits, datainbits, searchinbits, dataoutbits, 115 searchoutbits, num_mats_ver_dir * 2, 116 num_mats_hor_dir * 2, Data_out_htree); 117 htree_in_search = 118 new Htree2(g_ip->wt, (double) mat.area.w, (double)mat.area.h, 119 total_addrbits, datainbits, searchinbits, dataoutbits, 120 searchoutbits, num_mats_ver_dir * 2, 121 num_mats_hor_dir * 2, Data_in_htree, true, true); 122 htree_out_search = 123 new Htree2 (g_ip->wt, (double) mat.area.w, (double)mat.area.h, 124 total_addrbits, datainbits, searchinbits, dataoutbits, 125 searchoutbits, num_mats_ver_dir * 2, 126 num_mats_hor_dir * 2, Data_out_htree, true); 127 128 area.w = htree_in_data->area.w; 129 area.h = htree_in_data->area.h; 130 } 131 132 num_addr_b_row_dec = _log2(mat.subarray.num_rows); 133 num_addr_b_routed_to_mat_for_act = num_addr_b_row_dec; 134 num_addr_b_routed_to_mat_for_rd_or_wr = 135 num_addr_b_mat - num_addr_b_row_dec; 136} 137 138 139 140Bank::~Bank() { 141 delete htree_in_add; 142 delete htree_out_data; 143 delete htree_in_data; 144 if (dp.fully_assoc || dp.pure_cam) { 145 delete htree_in_search; 146 delete htree_out_search; 147 } 148} 149 150 151 152double Bank::compute_delays(double inrisetime) { 153 return mat.compute_delays(inrisetime); 154} 155 156 157 158void Bank::compute_power_energy() { 159 mat.compute_power_energy(); 160 161 if (!(dp.fully_assoc || dp.pure_cam)) { 162 power.readOp.dynamic += mat.power.readOp.dynamic * dp.num_act_mats_hor_dir; 163 power.readOp.leakage += mat.power.readOp.leakage * dp.num_mats; 164 power.readOp.gate_leakage += mat.power.readOp.gate_leakage * dp.num_mats; 165 166 power.readOp.dynamic += htree_in_add->power.readOp.dynamic; 167 power.readOp.dynamic += htree_out_data->power.readOp.dynamic; 168 169 power.readOp.leakage += htree_in_add->power.readOp.leakage; 170 power.readOp.leakage += htree_in_data->power.readOp.leakage; 171 power.readOp.leakage += htree_out_data->power.readOp.leakage; 172 power.readOp.gate_leakage += htree_in_add->power.readOp.gate_leakage; 173 power.readOp.gate_leakage += htree_in_data->power.readOp.gate_leakage; 174 power.readOp.gate_leakage += htree_out_data->power.readOp.gate_leakage; 175 } else { 176 177 power.readOp.dynamic += mat.power.readOp.dynamic ;//for fa and cam num_act_mats_hor_dir is 1 for plain r/w 178 power.readOp.leakage += mat.power.readOp.leakage * dp.num_mats; 179 power.readOp.gate_leakage += mat.power.readOp.gate_leakage * dp.num_mats; 180 181 power.searchOp.dynamic += mat.power.searchOp.dynamic * dp.num_mats; 182 power.searchOp.dynamic += mat.power_bl_precharge_eq_drv.searchOp.dynamic + 183 mat.power_sa.searchOp.dynamic + 184 mat.power_bitline.searchOp.dynamic + 185 mat.power_subarray_out_drv.searchOp.dynamic + 186 mat.ml_to_ram_wl_drv->power.readOp.dynamic; 187 188 power.readOp.dynamic += htree_in_add->power.readOp.dynamic; 189 power.readOp.dynamic += htree_out_data->power.readOp.dynamic; 190 191 power.searchOp.dynamic += htree_in_search->power.searchOp.dynamic; 192 power.searchOp.dynamic += htree_out_search->power.searchOp.dynamic; 193 194 power.readOp.leakage += htree_in_add->power.readOp.leakage; 195 power.readOp.leakage += htree_in_data->power.readOp.leakage; 196 power.readOp.leakage += htree_out_data->power.readOp.leakage; 197 power.readOp.leakage += htree_in_search->power.readOp.leakage; 198 power.readOp.leakage += htree_out_search->power.readOp.leakage; 199 200 201 power.readOp.gate_leakage += htree_in_add->power.readOp.gate_leakage; 202 power.readOp.gate_leakage += htree_in_data->power.readOp.gate_leakage; 203 power.readOp.gate_leakage += htree_out_data->power.readOp.gate_leakage; 204 power.readOp.gate_leakage += htree_in_search->power.readOp.gate_leakage; 205 power.readOp.gate_leakage += htree_out_search->power.readOp.gate_leakage; 206 207 } 208 209} 210 211