ruby_gpu_random_test.py revision 12564:2778478ca882
19288Sandreas.hansson@arm.com# 29288Sandreas.hansson@arm.com# Copyright (c) 2010-2015 Advanced Micro Devices, Inc. 39288Sandreas.hansson@arm.com# All rights reserved. 49288Sandreas.hansson@arm.com# 59288Sandreas.hansson@arm.com# For use for simulation and test purposes only 69288Sandreas.hansson@arm.com# 79288Sandreas.hansson@arm.com# Redistribution and use in source and binary forms, with or without 89288Sandreas.hansson@arm.com# modification, are permitted provided that the following conditions are met: 99288Sandreas.hansson@arm.com# 109288Sandreas.hansson@arm.com# 1. Redistributions of source code must retain the above copyright notice, 119288Sandreas.hansson@arm.com# this list of conditions and the following disclaimer. 129288Sandreas.hansson@arm.com# 139288Sandreas.hansson@arm.com# 2. Redistributions in binary form must reproduce the above copyright notice, 149288Sandreas.hansson@arm.com# this list of conditions and the following disclaimer in the documentation 159288Sandreas.hansson@arm.com# and/or other materials provided with the distribution. 169288Sandreas.hansson@arm.com# 179288Sandreas.hansson@arm.com# 3. Neither the name of the copyright holder nor the names of its contributors 189288Sandreas.hansson@arm.com# may be used to endorse or promote products derived from this software 199288Sandreas.hansson@arm.com# without specific prior written permission. 209288Sandreas.hansson@arm.com# 219288Sandreas.hansson@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 229288Sandreas.hansson@arm.com# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 239288Sandreas.hansson@arm.com# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 249288Sandreas.hansson@arm.com# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 259288Sandreas.hansson@arm.com# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 269288Sandreas.hansson@arm.com# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 279288Sandreas.hansson@arm.com# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 289288Sandreas.hansson@arm.com# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 299288Sandreas.hansson@arm.com# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 309288Sandreas.hansson@arm.com# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 319288Sandreas.hansson@arm.com# POSSIBILITY OF SUCH DAMAGE. 329288Sandreas.hansson@arm.com# 339288Sandreas.hansson@arm.com# Author: Brad Beckmann 349288Sandreas.hansson@arm.com# 359288Sandreas.hansson@arm.com 369288Sandreas.hansson@arm.comfrom __future__ import print_function 379288Sandreas.hansson@arm.com 389288Sandreas.hansson@arm.comimport m5 399288Sandreas.hansson@arm.comfrom m5.objects import * 409288Sandreas.hansson@arm.comfrom m5.defines import buildEnv 419288Sandreas.hansson@arm.comfrom m5.util import addToPath 428831Smrinmoy.ghosh@arm.comimport os, optparse, sys 438832SAli.Saidi@ARM.com 448832SAli.Saidi@ARM.comaddToPath('../') 459288Sandreas.hansson@arm.com 468831Smrinmoy.ghosh@arm.comfrom common import Options 478831Smrinmoy.ghosh@arm.comfrom ruby import Ruby 489338SAndreas.Sandberg@arm.com 498831Smrinmoy.ghosh@arm.com# Get paths we might need. 508831Smrinmoy.ghosh@arm.comconfig_path = os.path.dirname(os.path.abspath(__file__)) 518831Smrinmoy.ghosh@arm.comconfig_root = os.path.dirname(config_path) 528831Smrinmoy.ghosh@arm.comm5_root = os.path.dirname(config_root) 538831Smrinmoy.ghosh@arm.com 548831Smrinmoy.ghosh@arm.comparser = optparse.OptionParser() 558831Smrinmoy.ghosh@arm.comOptions.addNoISAOptions(parser) 568831Smrinmoy.ghosh@arm.com 579288Sandreas.hansson@arm.comparser.add_option("--maxloads", metavar="N", default=100, 588832SAli.Saidi@ARM.com help="Stop after N loads") 598832SAli.Saidi@ARM.comparser.add_option("-f", "--wakeup_freq", metavar="N", default=10, 608831Smrinmoy.ghosh@arm.com help="Wakeup every N cycles") 618831Smrinmoy.ghosh@arm.comparser.add_option("-u", "--num-compute-units", type="int", default=1, 6210052Smitch.hayenga+gem5@gmail.com help="number of compute units in the GPU") 6310052Smitch.hayenga+gem5@gmail.comparser.add_option("--num-cp", type="int", default=0, 6410052Smitch.hayenga+gem5@gmail.com help="Number of GPU Command Processors (CP)") 6510052Smitch.hayenga+gem5@gmail.com# not super important now, but to avoid putting the number 4 everywhere, make 6610052Smitch.hayenga+gem5@gmail.com# it an option/knob 6710052Smitch.hayenga+gem5@gmail.comparser.add_option("--cu-per-sqc", type="int", default=4, help="number of CUs \ 6810053Smitch.hayenga+gem5@gmail.com sharing an SQC (icache, and thus icache TLB)") 6910053Smitch.hayenga+gem5@gmail.comparser.add_option("--simds-per-cu", type="int", default=4, help="SIMD units" \ 708832SAli.Saidi@ARM.com "per CU") 718831Smrinmoy.ghosh@arm.comparser.add_option("--wf-size", type="int", default=64, 728831Smrinmoy.ghosh@arm.com help="Wavefront size(in workitems)") 738831Smrinmoy.ghosh@arm.comparser.add_option("--wfs-per-simd", type="int", default=10, help="Number of " \ 748831Smrinmoy.ghosh@arm.com "WF slots per SIMD") 759338SAndreas.Sandberg@arm.com 768831Smrinmoy.ghosh@arm.com# 778831Smrinmoy.ghosh@arm.com# Add the ruby specific and protocol specific options 788831Smrinmoy.ghosh@arm.com# 798831Smrinmoy.ghosh@arm.comRuby.define_options(parser) 809338SAndreas.Sandberg@arm.com 818831Smrinmoy.ghosh@arm.comexecfile(os.path.join(config_root, "common", "Options.py")) 828831Smrinmoy.ghosh@arm.com 838831Smrinmoy.ghosh@arm.com(options, args) = parser.parse_args() 848831Smrinmoy.ghosh@arm.com 859338SAndreas.Sandberg@arm.com# 868831Smrinmoy.ghosh@arm.com# Set the default cache size and associativity to be very small to encourage 878831Smrinmoy.ghosh@arm.com# races between requests and writebacks. 888831Smrinmoy.ghosh@arm.com# 898831Smrinmoy.ghosh@arm.comoptions.l1d_size="256B" 90options.l1i_size="256B" 91options.l2_size="512B" 92options.l3_size="1kB" 93options.l1d_assoc=2 94options.l1i_assoc=2 95options.l2_assoc=2 96options.l3_assoc=2 97 98# This file can support multiple compute units 99assert(options.num_compute_units >= 1) 100n_cu = options.num_compute_units 101 102options.num_sqc = int((n_cu + options.cu_per_sqc - 1) / options.cu_per_sqc) 103 104if args: 105 print("Error: script doesn't take any positional arguments") 106 sys.exit(1) 107 108# 109# Create the ruby random tester 110# 111 112# Check to for the GPU_RfO protocol. Other GPU protocols are non-SC and will 113# not work with the Ruby random tester. 114assert(buildEnv['PROTOCOL'] == 'GPU_RfO') 115 116# The GPU_RfO protocol does not support cache flushes 117check_flush = False 118 119tester = RubyTester(check_flush=check_flush, 120 checks_to_complete=options.maxloads, 121 wakeup_frequency=options.wakeup_freq, 122 deadlock_threshold=1000000) 123 124# 125# Create the M5 system. Note that the Memory Object isn't 126# actually used by the rubytester, but is included to support the 127# M5 memory size == Ruby memory size checks 128# 129system = System(cpu=tester, mem_ranges=[AddrRange(options.mem_size)]) 130 131# Create a top-level voltage domain and clock domain 132system.voltage_domain = VoltageDomain(voltage=options.sys_voltage) 133 134system.clk_domain = SrcClockDomain(clock=options.sys_clock, 135 voltage_domain=system.voltage_domain) 136 137Ruby.create_system(options, False, system) 138 139# Create a seperate clock domain for Ruby 140system.ruby.clk_domain = SrcClockDomain(clock=options.ruby_clock, 141 voltage_domain=system.voltage_domain) 142 143tester.num_cpus = len(system.ruby._cpu_ports) 144 145# 146# The tester is most effective when randomization is turned on and 147# artifical delay is randomly inserted on messages 148# 149system.ruby.randomization = True 150 151for ruby_port in system.ruby._cpu_ports: 152 153 # 154 # Tie the ruby tester ports to the ruby cpu read and write ports 155 # 156 if ruby_port.support_data_reqs and ruby_port.support_inst_reqs: 157 tester.cpuInstDataPort = ruby_port.slave 158 elif ruby_port.support_data_reqs: 159 tester.cpuDataPort = ruby_port.slave 160 elif ruby_port.support_inst_reqs: 161 tester.cpuInstPort = ruby_port.slave 162 163 # Do not automatically retry stalled Ruby requests 164 ruby_port.no_retry_on_stall = True 165 166 # 167 # Tell each sequencer this is the ruby tester so that it 168 # copies the subblock back to the checker 169 # 170 ruby_port.using_ruby_tester = True 171 172# ----------------------- 173# run simulation 174# ----------------------- 175 176root = Root( full_system = False, system = system ) 177root.system.mem_mode = 'timing' 178 179# Not much point in this being higher than the L1 latency 180m5.ticks.setGlobalFrequency('1ns') 181 182# instantiate configuration 183m5.instantiate() 184 185# simulate until program terminates 186exit_event = m5.simulate(options.abs_max_tick) 187 188print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()) 189