ruby_gpu_random_test.py revision 11688
1# 2# Copyright (c) 2010-2015 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# For use for simulation and test purposes only 6# 7# Redistribution and use in source and binary forms, with or without 8# modification, are permitted provided that the following conditions are met: 9# 10# 1. Redistributions of source code must retain the above copyright notice, 11# this list of conditions and the following disclaimer. 12# 13# 2. Redistributions in binary form must reproduce the above copyright notice, 14# this list of conditions and the following disclaimer in the documentation 15# and/or other materials provided with the distribution. 16# 17# 3. Neither the name of the copyright holder nor the names of its contributors 18# may be used to endorse or promote products derived from this software 19# without specific prior written permission. 20# 21# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 25# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31# POSSIBILITY OF SUCH DAMAGE. 32# 33# Author: Brad Beckmann 34# 35 36import m5 37from m5.objects import * 38from m5.defines import buildEnv 39from m5.util import addToPath 40import os, optparse, sys 41 42addToPath('../') 43 44from common import Options 45from ruby import Ruby 46 47# Get paths we might need. 48config_path = os.path.dirname(os.path.abspath(__file__)) 49config_root = os.path.dirname(config_path) 50m5_root = os.path.dirname(config_root) 51 52parser = optparse.OptionParser() 53Options.addNoISAOptions(parser) 54 55parser.add_option("--maxloads", metavar="N", default=100, 56 help="Stop after N loads") 57parser.add_option("-f", "--wakeup_freq", metavar="N", default=10, 58 help="Wakeup every N cycles") 59parser.add_option("-u", "--num-compute-units", type="int", default=1, 60 help="number of compute units in the GPU") 61parser.add_option("--num-cp", type="int", default=0, 62 help="Number of GPU Command Processors (CP)") 63# not super important now, but to avoid putting the number 4 everywhere, make 64# it an option/knob 65parser.add_option("--cu-per-sqc", type="int", default=4, help="number of CUs \ 66 sharing an SQC (icache, and thus icache TLB)") 67parser.add_option("--simds-per-cu", type="int", default=4, help="SIMD units" \ 68 "per CU") 69parser.add_option("--wf-size", type="int", default=64, 70 help="Wavefront size(in workitems)") 71parser.add_option("--wfs-per-simd", type="int", default=10, help="Number of " \ 72 "WF slots per SIMD") 73 74# 75# Add the ruby specific and protocol specific options 76# 77Ruby.define_options(parser) 78 79execfile(os.path.join(config_root, "common", "Options.py")) 80 81(options, args) = parser.parse_args() 82 83# 84# Set the default cache size and associativity to be very small to encourage 85# races between requests and writebacks. 86# 87options.l1d_size="256B" 88options.l1i_size="256B" 89options.l2_size="512B" 90options.l3_size="1kB" 91options.l1d_assoc=2 92options.l1i_assoc=2 93options.l2_assoc=2 94options.l3_assoc=2 95 96# This file can support multiple compute units 97assert(options.num_compute_units >= 1) 98n_cu = options.num_compute_units 99 100options.num_sqc = int((n_cu + options.cu_per_sqc - 1) / options.cu_per_sqc) 101 102if args: 103 print "Error: script doesn't take any positional arguments" 104 sys.exit(1) 105 106# 107# Create the ruby random tester 108# 109 110# Check to for the GPU_RfO protocol. Other GPU protocols are non-SC and will 111# not work with the Ruby random tester. 112assert(buildEnv['PROTOCOL'] == 'GPU_RfO') 113 114# The GPU_RfO protocol does not support cache flushes 115check_flush = False 116 117tester = RubyTester(check_flush=check_flush, 118 checks_to_complete=options.maxloads, 119 wakeup_frequency=options.wakeup_freq, 120 deadlock_threshold=1000000) 121 122# 123# Create the M5 system. Note that the Memory Object isn't 124# actually used by the rubytester, but is included to support the 125# M5 memory size == Ruby memory size checks 126# 127system = System(cpu=tester, mem_ranges=[AddrRange(options.mem_size)]) 128 129# Create a top-level voltage domain and clock domain 130system.voltage_domain = VoltageDomain(voltage=options.sys_voltage) 131 132system.clk_domain = SrcClockDomain(clock=options.sys_clock, 133 voltage_domain=system.voltage_domain) 134 135Ruby.create_system(options, False, system) 136 137# Create a seperate clock domain for Ruby 138system.ruby.clk_domain = SrcClockDomain(clock=options.ruby_clock, 139 voltage_domain=system.voltage_domain) 140 141tester.num_cpus = len(system.ruby._cpu_ports) 142 143# 144# The tester is most effective when randomization is turned on and 145# artifical delay is randomly inserted on messages 146# 147system.ruby.randomization = True 148 149for ruby_port in system.ruby._cpu_ports: 150 151 # 152 # Tie the ruby tester ports to the ruby cpu read and write ports 153 # 154 if ruby_port.support_data_reqs and ruby_port.support_inst_reqs: 155 tester.cpuInstDataPort = ruby_port.slave 156 elif ruby_port.support_data_reqs: 157 tester.cpuDataPort = ruby_port.slave 158 elif ruby_port.support_inst_reqs: 159 tester.cpuInstPort = ruby_port.slave 160 161 # Do not automatically retry stalled Ruby requests 162 ruby_port.no_retry_on_stall = True 163 164 # 165 # Tell each sequencer this is the ruby tester so that it 166 # copies the subblock back to the checker 167 # 168 ruby_port.using_ruby_tester = True 169 170# ----------------------- 171# run simulation 172# ----------------------- 173 174root = Root( full_system = False, system = system ) 175root.system.mem_mode = 'timing' 176 177# Not much point in this being higher than the L1 latency 178m5.ticks.setGlobalFrequency('1ns') 179 180# instantiate configuration 181m5.instantiate() 182 183# simulate until program terminates 184exit_event = m5.simulate(options.abs_max_tick) 185 186print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() 187