fs.py revision 9539:0ac00d9a8aaf 
1# Copyright (c) 2010-2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
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8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
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11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
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17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
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25# this software without specific prior written permission.
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27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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38#
39# Authors: Ali Saidi
40
41import optparse
42import sys
43
44import m5
45from m5.defines import buildEnv
46from m5.objects import *
47from m5.util import addToPath, fatal
48
49addToPath('../common')
50
51from FSConfig import *
52from SysPaths import *
53from Benchmarks import *
54import Simulation
55import CacheConfig
56from Caches import *
57import Options
58
59parser = optparse.OptionParser()
60Options.addCommonOptions(parser)
61Options.addFSOptions(parser)
62
63(options, args) = parser.parse_args()
64
65if args:
66    print "Error: script doesn't take any positional arguments"
67    sys.exit(1)
68
69# driver system CPU is always simple... note this is an assignment of
70# a class, not an instance.
71DriveCPUClass = AtomicSimpleCPU
72drive_mem_mode = 'atomic'
73
74# system under test can be any CPU
75(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
76
77TestCPUClass.clock = options.clock
78DriveCPUClass.clock = options.clock
79
80if options.benchmark:
81    try:
82        bm = Benchmarks[options.benchmark]
83    except KeyError:
84        print "Error benchmark %s has not been defined." % options.benchmark
85        print "Valid benchmarks are: %s" % DefinedBenchmarks
86        sys.exit(1)
87else:
88    if options.dual:
89        bm = [SysConfig(disk=options.disk_image, mem=options.mem_size), SysConfig(disk=options.disk_image, mem=options.mem_size)]
90    else:
91        bm = [SysConfig(disk=options.disk_image, mem=options.mem_size)]
92
93np = options.num_cpus
94
95if buildEnv['TARGET_ISA'] == "alpha":
96    test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
97elif buildEnv['TARGET_ISA'] == "mips":
98    test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
99elif buildEnv['TARGET_ISA'] == "sparc":
100    test_sys = makeSparcSystem(test_mem_mode, bm[0])
101elif buildEnv['TARGET_ISA'] == "x86":
102    test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0])
103elif buildEnv['TARGET_ISA'] == "arm":
104    test_sys = makeArmSystem(test_mem_mode, options.machine_type, bm[0],
105            options.dtb_filename, bare_metal=options.bare_metal)
106else:
107    fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA'])
108
109if options.kernel is not None:
110    test_sys.kernel = binary(options.kernel)
111
112if options.script is not None:
113    test_sys.readfile = options.script
114
115test_sys.init_param = options.init_param
116
117test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
118
119if options.caches or options.l2cache:
120    test_sys.iocache = IOCache(clock = '1GHz',
121                               addr_ranges = test_sys.mem_ranges)
122    test_sys.iocache.cpu_side = test_sys.iobus.master
123    test_sys.iocache.mem_side = test_sys.membus.slave
124else:
125    test_sys.iobridge = Bridge(delay='50ns', ranges = test_sys.mem_ranges)
126    test_sys.iobridge.slave = test_sys.iobus.master
127    test_sys.iobridge.master = test_sys.membus.slave
128
129# Sanity check
130if options.fastmem:
131    if TestCPUClass != AtomicSimpleCPU:
132        fatal("Fastmem can only be used with atomic CPU!")
133    if (options.caches or options.l2cache):
134        fatal("You cannot use fastmem in combination with caches!")
135
136for i in xrange(np):
137    if options.fastmem:
138        test_sys.cpu[i].fastmem = True
139    if options.checker:
140        test_sys.cpu[i].addCheckerCpu()
141    test_sys.cpu[i].createThreads()
142
143CacheConfig.config_cache(options, test_sys)
144
145if len(bm) == 2:
146    if buildEnv['TARGET_ISA'] == 'alpha':
147        drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
148    elif buildEnv['TARGET_ISA'] == 'mips':
149        drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
150    elif buildEnv['TARGET_ISA'] == 'sparc':
151        drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
152    elif buildEnv['TARGET_ISA'] == 'x86':
153        drive_sys = makeX86System(drive_mem_mode, np, bm[1])
154    elif buildEnv['TARGET_ISA'] == 'arm':
155        drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1])
156
157    drive_sys.cpu = DriveCPUClass(cpu_id=0)
158    drive_sys.cpu.createThreads()
159    drive_sys.cpu.createInterruptController()
160    drive_sys.cpu.connectAllPorts(drive_sys.membus)
161    if options.fastmem:
162        drive_sys.cpu.fastmem = True
163    if options.kernel is not None:
164        drive_sys.kernel = binary(options.kernel)
165
166    drive_sys.iobridge = Bridge(delay='50ns',
167                                ranges = drive_sys.mem_ranges)
168    drive_sys.iobridge.slave = drive_sys.iobus.master
169    drive_sys.iobridge.master = drive_sys.membus.slave
170
171    drive_sys.init_param = options.init_param
172    root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
173elif len(bm) == 1:
174    root = Root(full_system=True, system=test_sys)
175else:
176    print "Error I don't know how to create more than 2 systems."
177    sys.exit(1)
178
179if options.timesync:
180    root.time_sync_enable = True
181
182if options.frame_capture:
183    VncServer.frame_capture = True
184
185Simulation.setWorkCountOptions(test_sys, options)
186Simulation.run(options, root, test_sys, FutureClass)
187