fs.py revision 9316:4e2dc4b01c50 
1# Copyright (c) 2010-2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
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8# licensed hereunder.  You may use the software subject to the license
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11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
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25# this software without specific prior written permission.
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27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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38#
39# Authors: Ali Saidi
40
41import optparse
42import sys
43
44import m5
45from m5.defines import buildEnv
46from m5.objects import *
47from m5.util import addToPath, fatal
48
49addToPath('../common')
50
51from FSConfig import *
52from SysPaths import *
53from Benchmarks import *
54import Simulation
55import CacheConfig
56from Caches import *
57import Options
58
59parser = optparse.OptionParser()
60Options.addCommonOptions(parser)
61Options.addFSOptions(parser)
62
63(options, args) = parser.parse_args()
64
65if args:
66    print "Error: script doesn't take any positional arguments"
67    sys.exit(1)
68
69# driver system CPU is always simple... note this is an assignment of
70# a class, not an instance.
71DriveCPUClass = AtomicSimpleCPU
72drive_mem_mode = 'atomic'
73
74# system under test can be any CPU
75(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
76
77TestCPUClass.clock = options.clock
78DriveCPUClass.clock = options.clock
79
80if options.benchmark:
81    try:
82        bm = Benchmarks[options.benchmark]
83    except KeyError:
84        print "Error benchmark %s has not been defined." % options.benchmark
85        print "Valid benchmarks are: %s" % DefinedBenchmarks
86        sys.exit(1)
87else:
88    if options.dual:
89        bm = [SysConfig(disk=options.disk_image, mem=options.mem_size), SysConfig(disk=options.disk_image, mem=options.mem_size)]
90    else:
91        bm = [SysConfig(disk=options.disk_image, mem=options.mem_size)]
92
93np = options.num_cpus
94
95if buildEnv['TARGET_ISA'] == "alpha":
96    test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
97elif buildEnv['TARGET_ISA'] == "mips":
98    test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
99elif buildEnv['TARGET_ISA'] == "sparc":
100    test_sys = makeSparcSystem(test_mem_mode, bm[0])
101elif buildEnv['TARGET_ISA'] == "x86":
102    test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0])
103elif buildEnv['TARGET_ISA'] == "arm":
104    test_sys = makeArmSystem(test_mem_mode,
105            options.machine_type, bm[0],
106            bare_metal=options.bare_metal)
107else:
108    fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA'])
109
110if options.kernel is not None:
111    test_sys.kernel = binary(options.kernel)
112
113if options.script is not None:
114    test_sys.readfile = options.script
115
116test_sys.init_param = options.init_param
117
118test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
119
120if options.caches or options.l2cache:
121    test_sys.iocache = IOCache(clock = '1GHz',
122                               addr_ranges=[test_sys.physmem.range])
123    test_sys.iocache.cpu_side = test_sys.iobus.master
124    test_sys.iocache.mem_side = test_sys.membus.slave
125else:
126    test_sys.iobridge = Bridge(delay='50ns', ranges = [test_sys.physmem.range])
127    test_sys.iobridge.slave = test_sys.iobus.master
128    test_sys.iobridge.master = test_sys.membus.slave
129
130# Sanity check
131if options.fastmem and (options.caches or options.l2cache):
132    fatal("You cannot use fastmem in combination with caches!")
133
134for i in xrange(np):
135    if options.fastmem:
136        test_sys.cpu[i].fastmem = True
137    if options.checker:
138        test_sys.cpu[i].addCheckerCpu()
139
140CacheConfig.config_cache(options, test_sys)
141
142if len(bm) == 2:
143    if buildEnv['TARGET_ISA'] == 'alpha':
144        drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
145    elif buildEnv['TARGET_ISA'] == 'mips':
146        drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
147    elif buildEnv['TARGET_ISA'] == 'sparc':
148        drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
149    elif buildEnv['TARGET_ISA'] == 'x86':
150        drive_sys = makeX86System(drive_mem_mode, np, bm[1])
151    elif buildEnv['TARGET_ISA'] == 'arm':
152        drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1])
153
154    drive_sys.cpu = DriveCPUClass(cpu_id=0)
155    drive_sys.cpu.createInterruptController()
156    drive_sys.cpu.connectAllPorts(drive_sys.membus)
157    if options.fastmem:
158        drive_sys.cpu.fastmem = True
159    if options.kernel is not None:
160        drive_sys.kernel = binary(options.kernel)
161    drive_sys.iobridge = Bridge(delay='50ns',
162                                ranges = [drive_sys.physmem.range])
163    drive_sys.iobridge.slave = drive_sys.iobus.master
164    drive_sys.iobridge.master = drive_sys.membus.slave
165
166    drive_sys.init_param = options.init_param
167    root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
168elif len(bm) == 1:
169    root = Root(full_system=True, system=test_sys)
170else:
171    print "Error I don't know how to create more than 2 systems."
172    sys.exit(1)
173
174if options.timesync:
175    root.time_sync_enable = True
176
177if options.frame_capture:
178    VncServer.frame_capture = True
179
180Simulation.setWorkCountOptions(test_sys, options)
181Simulation.run(options, root, test_sys, FutureClass)
182