fs.py revision 8661:2d791d07c59b
1# Copyright (c) 2010 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
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16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
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25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Ali Saidi
40
41import optparse
42import os
43import sys
44
45import m5
46from m5.defines import buildEnv
47from m5.objects import *
48from m5.util import addToPath, fatal
49
50if not buildEnv['FULL_SYSTEM']:
51    fatal("This script requires full-system mode (*_FS).")
52
53addToPath('../common')
54
55from FSConfig import *
56from SysPaths import *
57from Benchmarks import *
58import Simulation
59import CacheConfig
60from Caches import *
61
62# Get paths we might need.  It's expected this file is in m5/configs/example.
63config_path = os.path.dirname(os.path.abspath(__file__))
64config_root = os.path.dirname(config_path)
65
66parser = optparse.OptionParser()
67
68# Simulation options
69parser.add_option("--timesync", action="store_true",
70        help="Prevent simulated time from getting ahead of real time")
71
72# System options
73parser.add_option("--kernel", action="store", type="string")
74parser.add_option("--script", action="store", type="string")
75parser.add_option("--frame-capture", action="store_true",
76        help="Stores changed frame buffers from the VNC server to compressed "\
77        "files in the gem5 output directory")
78
79if buildEnv['TARGET_ISA'] == "arm":
80    parser.add_option("--bare-metal", action="store_true",
81               help="Provide the raw system without the linux specific bits")
82    parser.add_option("--machine-type", action="store", type="choice",
83            choices=ArmMachineType.map.keys(), default="RealView_PBX")
84# Benchmark options
85parser.add_option("--dual", action="store_true",
86                  help="Simulate two systems attached with an ethernet link")
87parser.add_option("-b", "--benchmark", action="store", type="string",
88                  dest="benchmark",
89                  help="Specify the benchmark to run. Available benchmarks: %s"\
90                  % DefinedBenchmarks)
91
92# Metafile options
93parser.add_option("--etherdump", action="store", type="string", dest="etherdump",
94                  help="Specify the filename to dump a pcap capture of the" \
95                  "ethernet traffic")
96
97execfile(os.path.join(config_root, "common", "Options.py"))
98
99(options, args) = parser.parse_args()
100
101if args:
102    print "Error: script doesn't take any positional arguments"
103    sys.exit(1)
104
105# driver system CPU is always simple... note this is an assignment of
106# a class, not an instance.
107DriveCPUClass = AtomicSimpleCPU
108drive_mem_mode = 'atomic'
109
110# system under test can be any CPU
111(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
112
113TestCPUClass.clock = '2GHz'
114DriveCPUClass.clock = '2GHz'
115
116if options.benchmark:
117    try:
118        bm = Benchmarks[options.benchmark]
119    except KeyError:
120        print "Error benchmark %s has not been defined." % options.benchmark
121        print "Valid benchmarks are: %s" % DefinedBenchmarks
122        sys.exit(1)
123else:
124    if options.dual:
125        bm = [SysConfig(), SysConfig()]
126    else:
127        bm = [SysConfig()]
128
129np = options.num_cpus
130
131if buildEnv['TARGET_ISA'] == "alpha":
132    test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
133elif buildEnv['TARGET_ISA'] == "mips":
134    test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
135elif buildEnv['TARGET_ISA'] == "sparc":
136    test_sys = makeSparcSystem(test_mem_mode, bm[0])
137elif buildEnv['TARGET_ISA'] == "x86":
138    test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0])
139    setWorkCountOptions(test_sys, options)
140elif buildEnv['TARGET_ISA'] == "arm":
141    test_sys = makeArmSystem(test_mem_mode,
142            options.machine_type, bm[0],
143            bare_metal=options.bare_metal)
144    setWorkCountOptions(test_sys, options)
145else:
146    fatal("incapable of building non-alpha or non-sparc full system!")
147
148if options.kernel is not None:
149    test_sys.kernel = binary(options.kernel)
150
151if options.script is not None:
152    test_sys.readfile = options.script
153
154test_sys.init_param = options.init_param
155
156test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
157
158CacheConfig.config_cache(options, test_sys)
159
160if options.caches or options.l2cache:
161    if bm[0]:
162        mem_size = bm[0].mem()
163    else:
164        mem_size = SysConfig().mem()
165    # For x86, we need to poke a hole for interrupt messages to get back to the
166    # CPU. These use a portion of the physical address space which has a
167    # non-zero prefix in the top nibble. Normal memory accesses have a 0
168    # prefix.
169    if buildEnv['TARGET_ISA'] == 'x86':
170        test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max >> 4)]
171    else:
172        test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)]
173    test_sys.bridge.filter_ranges_b=[AddrRange(mem_size)]
174    test_sys.iocache = IOCache(addr_range=mem_size)
175    test_sys.iocache.cpu_side = test_sys.iobus.port
176    test_sys.iocache.mem_side = test_sys.membus.port
177
178for i in xrange(np):
179    if options.fastmem:
180        test_sys.cpu[i].physmem_port = test_sys.physmem.port
181
182if buildEnv['TARGET_ISA'] == 'mips':
183    setMipsOptions(TestCPUClass)
184
185if len(bm) == 2:
186    if buildEnv['TARGET_ISA'] == 'alpha':
187        drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
188    elif buildEnv['TARGET_ISA'] == 'mips':
189        drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
190    elif buildEnv['TARGET_ISA'] == 'sparc':
191        drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
192    elif buildEnv['TARGET_ISA'] == 'x86':
193        drive_sys = makeX86System(drive_mem_mode, np, bm[1])
194    elif buildEnv['TARGET_ISA'] == 'arm':
195        drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1])
196
197    drive_sys.cpu = DriveCPUClass(cpu_id=0)
198    drive_sys.cpu.connectAllPorts(drive_sys.membus)
199    if options.fastmem:
200        drive_sys.cpu.physmem_port = drive_sys.physmem.port
201    if options.kernel is not None:
202        drive_sys.kernel = binary(options.kernel)
203
204    drive_sys.init_param = options.init_param
205    root = makeDualRoot(test_sys, drive_sys, options.etherdump)
206elif len(bm) == 1:
207    root = Root(system=test_sys)
208else:
209    print "Error I don't know how to create more than 2 systems."
210    sys.exit(1)
211
212if options.timesync:
213    root.time_sync_enable = True
214
215if options.frame_capture:
216    VncServer.frame_capture = True
217
218Simulation.run(options, root, test_sys, FutureClass)
219