fs.py revision 9164
16657Snate@binkert.org# Copyright (c) 2010-2012 ARM Limited 26657Snate@binkert.org# All rights reserved. 36657Snate@binkert.org# 46657Snate@binkert.org# The license below extends only to copyright in the software and shall 56657Snate@binkert.org# not be construed as granting a license to any other intellectual 66657Snate@binkert.org# property including but not limited to intellectual property relating 76657Snate@binkert.org# to a hardware implementation of the functionality of the software 86657Snate@binkert.org# licensed hereunder. You may use the software subject to the license 96657Snate@binkert.org# terms below provided that you ensure that this notice is replicated 106657Snate@binkert.org# unmodified and in its entirety in all distributions of the software, 116657Snate@binkert.org# modified or unmodified, in source code or in binary form. 126657Snate@binkert.org# 136657Snate@binkert.org# Copyright (c) 2006-2007 The Regents of The University of Michigan 146657Snate@binkert.org# All rights reserved. 156657Snate@binkert.org# 166657Snate@binkert.org# Redistribution and use in source and binary forms, with or without 176657Snate@binkert.org# modification, are permitted provided that the following conditions are 186657Snate@binkert.org# met: redistributions of source code must retain the above copyright 196657Snate@binkert.org# notice, this list of conditions and the following disclaimer; 206657Snate@binkert.org# redistributions in binary form must reproduce the above copyright 216657Snate@binkert.org# notice, this list of conditions and the following disclaimer in the 226657Snate@binkert.org# documentation and/or other materials provided with the distribution; 236657Snate@binkert.org# neither the name of the copyright holders nor the names of its 246657Snate@binkert.org# contributors may be used to endorse or promote products derived from 256657Snate@binkert.org# this software without specific prior written permission. 266657Snate@binkert.org# 276657Snate@binkert.org# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 286999Snate@binkert.org# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 296657Snate@binkert.org# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 306657Snate@binkert.org# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 316657Snate@binkert.org# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 326657Snate@binkert.org# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 338189SLisa.Hsu@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 346657Snate@binkert.org# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 356882SBrad.Beckmann@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 367055Snate@binkert.org# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 376882SBrad.Beckmann@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 386882SBrad.Beckmann@amd.com# 398191SLisa.Hsu@amd.com# Authors: Ali Saidi 406882SBrad.Beckmann@amd.com 416882SBrad.Beckmann@amd.comimport optparse 426882SBrad.Beckmann@amd.comimport sys 436888SBrad.Beckmann@amd.com 446882SBrad.Beckmann@amd.comimport m5 456882SBrad.Beckmann@amd.comfrom m5.defines import buildEnv 466657Snate@binkert.orgfrom m5.objects import * 476657Snate@binkert.orgfrom m5.util import addToPath, fatal 486657Snate@binkert.org 496657Snate@binkert.orgaddToPath('../common') 506657Snate@binkert.org 517839Snilay@cs.wisc.edufrom FSConfig import * 526657Snate@binkert.orgfrom SysPaths import * 536882SBrad.Beckmann@amd.comfrom Benchmarks import * 546882SBrad.Beckmann@amd.comimport Simulation 556882SBrad.Beckmann@amd.comimport CacheConfig 566882SBrad.Beckmann@amd.comfrom Caches import * 576882SBrad.Beckmann@amd.comimport Options 586882SBrad.Beckmann@amd.com 596657Snate@binkert.orgparser = optparse.OptionParser() 606657Snate@binkert.orgOptions.addCommonOptions(parser) 616657Snate@binkert.orgOptions.addFSOptions(parser) 626657Snate@binkert.org 636657Snate@binkert.org(options, args) = parser.parse_args() 646657Snate@binkert.org 656657Snate@binkert.orgif args: 666657Snate@binkert.org print "Error: script doesn't take any positional arguments" 676657Snate@binkert.org sys.exit(1) 687839Snilay@cs.wisc.edu 697839Snilay@cs.wisc.edu# driver system CPU is always simple... note this is an assignment of 706657Snate@binkert.org# a class, not an instance. 716657Snate@binkert.orgDriveCPUClass = AtomicSimpleCPU 726657Snate@binkert.orgdrive_mem_mode = 'atomic' 736657Snate@binkert.org 746657Snate@binkert.org# system under test can be any CPU 756657Snate@binkert.org(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 766657Snate@binkert.org 776657Snate@binkert.orgTestCPUClass.clock = options.clock 786657Snate@binkert.orgDriveCPUClass.clock = options.clock 796657Snate@binkert.org 806657Snate@binkert.orgif options.benchmark: 816657Snate@binkert.org try: 826657Snate@binkert.org bm = Benchmarks[options.benchmark] 836657Snate@binkert.org except KeyError: 846657Snate@binkert.org print "Error benchmark %s has not been defined." % options.benchmark 856657Snate@binkert.org print "Valid benchmarks are: %s" % DefinedBenchmarks 866657Snate@binkert.org sys.exit(1) 876657Snate@binkert.orgelse: 886657Snate@binkert.org if options.dual: 896657Snate@binkert.org bm = [SysConfig(disk=options.disk_image, mem=options.mem_size), SysConfig(disk=options.disk_image, mem=options.mem_size)] 906779SBrad.Beckmann@amd.com else: 916657Snate@binkert.org bm = [SysConfig(disk=options.disk_image, mem=options.mem_size)] 926657Snate@binkert.org 936657Snate@binkert.orgnp = options.num_cpus 946657Snate@binkert.org 956657Snate@binkert.orgif buildEnv['TARGET_ISA'] == "alpha": 966657Snate@binkert.org test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0]) 976657Snate@binkert.orgelif buildEnv['TARGET_ISA'] == "mips": 986657Snate@binkert.org test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0]) 996657Snate@binkert.orgelif buildEnv['TARGET_ISA'] == "sparc": 1006657Snate@binkert.org test_sys = makeSparcSystem(test_mem_mode, bm[0]) 1016657Snate@binkert.orgelif buildEnv['TARGET_ISA'] == "x86": 1026657Snate@binkert.org test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0]) 1036657Snate@binkert.orgelif buildEnv['TARGET_ISA'] == "arm": 1046657Snate@binkert.org test_sys = makeArmSystem(test_mem_mode, 1056657Snate@binkert.org options.machine_type, bm[0], 1066657Snate@binkert.org bare_metal=options.bare_metal) 1076657Snate@binkert.orgelse: 1086657Snate@binkert.org fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA']) 1096657Snate@binkert.org 1106657Snate@binkert.orgif options.kernel is not None: 1116657Snate@binkert.org test_sys.kernel = binary(options.kernel) 1126657Snate@binkert.org 1136657Snate@binkert.orgif options.script is not None: 1146657Snate@binkert.org test_sys.readfile = options.script 1157839Snilay@cs.wisc.edu 1167839Snilay@cs.wisc.edutest_sys.init_param = options.init_param 1177839Snilay@cs.wisc.edu 1187839Snilay@cs.wisc.edutest_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)] 1197839Snilay@cs.wisc.edu 1207839Snilay@cs.wisc.eduif bm[0]: 1217839Snilay@cs.wisc.edu mem_size = bm[0].mem() 1227839Snilay@cs.wisc.eduelse: 1237839Snilay@cs.wisc.edu mem_size = SysConfig().mem() 1247839Snilay@cs.wisc.eduif options.caches or options.l2cache: 1257839Snilay@cs.wisc.edu test_sys.iocache = IOCache(addr_ranges=[test_sys.physmem.range]) 1267839Snilay@cs.wisc.edu test_sys.iocache.cpu_side = test_sys.iobus.master 1277839Snilay@cs.wisc.edu test_sys.iocache.mem_side = test_sys.membus.slave 1287839Snilay@cs.wisc.eduelse: 1297839Snilay@cs.wisc.edu test_sys.iobridge = Bridge(delay='50ns', ranges = [test_sys.physmem.range]) 1306657Snate@binkert.org test_sys.iobridge.slave = test_sys.iobus.master 1316657Snate@binkert.org test_sys.iobridge.master = test_sys.membus.slave 1326657Snate@binkert.org 1336657Snate@binkert.org# Sanity check 1346657Snate@binkert.orgif options.fastmem and (options.caches or options.l2cache): 1356657Snate@binkert.org fatal("You cannot use fastmem in combination with caches!") 1366657Snate@binkert.org 1376657Snate@binkert.orgfor i in xrange(np): 1386657Snate@binkert.org if options.fastmem: 1396657Snate@binkert.org test_sys.cpu[i].fastmem = True 1406657Snate@binkert.org if options.checker: 1416657Snate@binkert.org test_sys.cpu[i].addCheckerCpu() 1426657Snate@binkert.org 1436657Snate@binkert.orgCacheConfig.config_cache(options, test_sys) 1446657Snate@binkert.org 1456657Snate@binkert.orgif len(bm) == 2: 1466657Snate@binkert.org if buildEnv['TARGET_ISA'] == 'alpha': 1476657Snate@binkert.org drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 1486657Snate@binkert.org elif buildEnv['TARGET_ISA'] == 'mips': 1496657Snate@binkert.org drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1]) 1506657Snate@binkert.org elif buildEnv['TARGET_ISA'] == 'sparc': 1516657Snate@binkert.org drive_sys = makeSparcSystem(drive_mem_mode, bm[1]) 1526657Snate@binkert.org elif buildEnv['TARGET_ISA'] == 'x86': 1536657Snate@binkert.org drive_sys = makeX86System(drive_mem_mode, np, bm[1]) 1546657Snate@binkert.org elif buildEnv['TARGET_ISA'] == 'arm': 1556657Snate@binkert.org drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1]) 1566657Snate@binkert.org 1576657Snate@binkert.org drive_sys.cpu = DriveCPUClass(cpu_id=0) 1586657Snate@binkert.org drive_sys.cpu.createInterruptController() 1596657Snate@binkert.org drive_sys.cpu.connectAllPorts(drive_sys.membus) 1606657Snate@binkert.org if options.fastmem: 1616877Ssteve.reinhardt@amd.com drive_sys.cpu.fastmem = True 1626657Snate@binkert.org if options.kernel is not None: 1636657Snate@binkert.org drive_sys.kernel = binary(options.kernel) 1646657Snate@binkert.org drive_sys.iobridge = Bridge(delay='50ns', 1656657Snate@binkert.org ranges = [drive_sys.physmem.range]) 1666657Snate@binkert.org drive_sys.iobridge.slave = drive_sys.iobus.master 1676657Snate@binkert.org drive_sys.iobridge.master = drive_sys.membus.slave 1687542SBrad.Beckmann@amd.com 1697542SBrad.Beckmann@amd.com drive_sys.init_param = options.init_param 1706657Snate@binkert.org root = makeDualRoot(True, test_sys, drive_sys, options.etherdump) 1716877Ssteve.reinhardt@amd.comelif len(bm) == 1: 1726999Snate@binkert.org root = Root(full_system=True, system=test_sys) 1736877Ssteve.reinhardt@amd.comelse: 1746877Ssteve.reinhardt@amd.com print "Error I don't know how to create more than 2 systems." 1756877Ssteve.reinhardt@amd.com sys.exit(1) 1766877Ssteve.reinhardt@amd.com 1776877Ssteve.reinhardt@amd.comif options.timesync: 1786877Ssteve.reinhardt@amd.com root.time_sync_enable = True 1796877Ssteve.reinhardt@amd.com 1806877Ssteve.reinhardt@amd.comif options.frame_capture: 1816877Ssteve.reinhardt@amd.com VncServer.frame_capture = True 1826877Ssteve.reinhardt@amd.com 1836877Ssteve.reinhardt@amd.comSimulation.setWorkCountOptions(test_sys, options) 1846877Ssteve.reinhardt@amd.comSimulation.run(options, root, test_sys, FutureClass) 1856877Ssteve.reinhardt@amd.com