fs.py revision 8845
111666Stushar@ece.gatech.edu# Copyright (c) 2010-2011 ARM Limited 211666Stushar@ece.gatech.edu# All rights reserved. 311666Stushar@ece.gatech.edu# 411666Stushar@ece.gatech.edu# The license below extends only to copyright in the software and shall 511666Stushar@ece.gatech.edu# not be construed as granting a license to any other intellectual 611666Stushar@ece.gatech.edu# property including but not limited to intellectual property relating 711666Stushar@ece.gatech.edu# to a hardware implementation of the functionality of the software 811666Stushar@ece.gatech.edu# licensed hereunder. You may use the software subject to the license 911666Stushar@ece.gatech.edu# terms below provided that you ensure that this notice is replicated 1011666Stushar@ece.gatech.edu# unmodified and in its entirety in all distributions of the software, 1111666Stushar@ece.gatech.edu# modified or unmodified, in source code or in binary form. 1211666Stushar@ece.gatech.edu# 1311666Stushar@ece.gatech.edu# Copyright (c) 2006-2007 The Regents of The University of Michigan 1411666Stushar@ece.gatech.edu# All rights reserved. 1511666Stushar@ece.gatech.edu# 1611666Stushar@ece.gatech.edu# Redistribution and use in source and binary forms, with or without 1711666Stushar@ece.gatech.edu# modification, are permitted provided that the following conditions are 1811666Stushar@ece.gatech.edu# met: redistributions of source code must retain the above copyright 1911666Stushar@ece.gatech.edu# notice, this list of conditions and the following disclaimer; 2011666Stushar@ece.gatech.edu# redistributions in binary form must reproduce the above copyright 2111666Stushar@ece.gatech.edu# notice, this list of conditions and the following disclaimer in the 2211666Stushar@ece.gatech.edu# documentation and/or other materials provided with the distribution; 2311666Stushar@ece.gatech.edu# neither the name of the copyright holders nor the names of its 2411666Stushar@ece.gatech.edu# contributors may be used to endorse or promote products derived from 2511666Stushar@ece.gatech.edu# this software without specific prior written permission. 2611666Stushar@ece.gatech.edu# 2711666Stushar@ece.gatech.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2811666Stushar@ece.gatech.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2911666Stushar@ece.gatech.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3011666Stushar@ece.gatech.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3111666Stushar@ece.gatech.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3211666Stushar@ece.gatech.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3311666Stushar@ece.gatech.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3411666Stushar@ece.gatech.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3511666Stushar@ece.gatech.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3611666Stushar@ece.gatech.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3711666Stushar@ece.gatech.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3811666Stushar@ece.gatech.edu# 3911666Stushar@ece.gatech.edu# Authors: Ali Saidi 4011666Stushar@ece.gatech.edu 4111666Stushar@ece.gatech.eduimport optparse 4211666Stushar@ece.gatech.eduimport os 4311666Stushar@ece.gatech.eduimport sys 4411666Stushar@ece.gatech.edu 4511666Stushar@ece.gatech.eduimport m5 4611666Stushar@ece.gatech.edufrom m5.defines import buildEnv 4711666Stushar@ece.gatech.edufrom m5.objects import * 4811666Stushar@ece.gatech.edufrom m5.util import addToPath, fatal 4911666Stushar@ece.gatech.edu 5011666Stushar@ece.gatech.eduaddToPath('../common') 5111666Stushar@ece.gatech.edu 5211666Stushar@ece.gatech.edufrom FSConfig import * 5311666Stushar@ece.gatech.edufrom SysPaths import * 5411666Stushar@ece.gatech.edufrom Benchmarks import * 5511666Stushar@ece.gatech.eduimport Simulation 5611666Stushar@ece.gatech.eduimport CacheConfig 5711666Stushar@ece.gatech.edufrom Caches import * 5811666Stushar@ece.gatech.edu 5911666Stushar@ece.gatech.edu# Get paths we might need. It's expected this file is in m5/configs/example. 6011666Stushar@ece.gatech.educonfig_path = os.path.dirname(os.path.abspath(__file__)) 6111666Stushar@ece.gatech.educonfig_root = os.path.dirname(config_path) 6211666Stushar@ece.gatech.edu 6311666Stushar@ece.gatech.eduparser = optparse.OptionParser() 6411666Stushar@ece.gatech.edu 6511666Stushar@ece.gatech.edu# Simulation options 6611666Stushar@ece.gatech.eduparser.add_option("--timesync", action="store_true", 6711666Stushar@ece.gatech.edu help="Prevent simulated time from getting ahead of real time") 6811666Stushar@ece.gatech.edu 6911666Stushar@ece.gatech.edu# System options 7011666Stushar@ece.gatech.eduparser.add_option("--kernel", action="store", type="string") 7111666Stushar@ece.gatech.eduparser.add_option("--script", action="store", type="string") 7211666Stushar@ece.gatech.eduparser.add_option("--frame-capture", action="store_true", 7311666Stushar@ece.gatech.edu help="Stores changed frame buffers from the VNC server to compressed "\ 7411666Stushar@ece.gatech.edu "files in the gem5 output directory") 7511666Stushar@ece.gatech.edu 7611666Stushar@ece.gatech.eduif buildEnv['TARGET_ISA'] == "arm": 7711666Stushar@ece.gatech.edu parser.add_option("--bare-metal", action="store_true", 7811666Stushar@ece.gatech.edu help="Provide the raw system without the linux specific bits") 7911666Stushar@ece.gatech.edu parser.add_option("--machine-type", action="store", type="choice", 8011666Stushar@ece.gatech.edu choices=ArmMachineType.map.keys(), default="RealView_PBX") 8111666Stushar@ece.gatech.edu# Benchmark options 8211666Stushar@ece.gatech.eduparser.add_option("--dual", action="store_true", 8311666Stushar@ece.gatech.edu help="Simulate two systems attached with an ethernet link") 8411666Stushar@ece.gatech.eduparser.add_option("-b", "--benchmark", action="store", type="string", 8511666Stushar@ece.gatech.edu dest="benchmark", 8611666Stushar@ece.gatech.edu help="Specify the benchmark to run. Available benchmarks: %s"\ 8711666Stushar@ece.gatech.edu % DefinedBenchmarks) 8811666Stushar@ece.gatech.edu 8911666Stushar@ece.gatech.edu# Metafile options 9011666Stushar@ece.gatech.eduparser.add_option("--etherdump", action="store", type="string", dest="etherdump", 9111666Stushar@ece.gatech.edu help="Specify the filename to dump a pcap capture of the" \ 9211666Stushar@ece.gatech.edu "ethernet traffic") 9311666Stushar@ece.gatech.edu 9411666Stushar@ece.gatech.eduexecfile(os.path.join(config_root, "common", "Options.py")) 9511666Stushar@ece.gatech.edu 9611666Stushar@ece.gatech.edu(options, args) = parser.parse_args() 9711666Stushar@ece.gatech.edu 9811666Stushar@ece.gatech.eduif args: 9911666Stushar@ece.gatech.edu print "Error: script doesn't take any positional arguments" 10011666Stushar@ece.gatech.edu sys.exit(1) 10111666Stushar@ece.gatech.edu 10211666Stushar@ece.gatech.edu# driver system CPU is always simple... note this is an assignment of 10311666Stushar@ece.gatech.edu# a class, not an instance. 10411666Stushar@ece.gatech.eduDriveCPUClass = AtomicSimpleCPU 10511666Stushar@ece.gatech.edudrive_mem_mode = 'atomic' 10611666Stushar@ece.gatech.edu 10711666Stushar@ece.gatech.edu# system under test can be any CPU 10811666Stushar@ece.gatech.edu(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 10911666Stushar@ece.gatech.edu 11011666Stushar@ece.gatech.eduTestCPUClass.clock = '2GHz' 11111666Stushar@ece.gatech.eduDriveCPUClass.clock = '2GHz' 11211666Stushar@ece.gatech.edu 11311666Stushar@ece.gatech.eduif options.benchmark: 11411666Stushar@ece.gatech.edu try: 11511666Stushar@ece.gatech.edu bm = Benchmarks[options.benchmark] 11611666Stushar@ece.gatech.edu except KeyError: 11711666Stushar@ece.gatech.edu print "Error benchmark %s has not been defined." % options.benchmark 11811666Stushar@ece.gatech.edu print "Valid benchmarks are: %s" % DefinedBenchmarks 11911666Stushar@ece.gatech.edu sys.exit(1) 12011666Stushar@ece.gatech.eduelse: 12111666Stushar@ece.gatech.edu if options.dual: 12211666Stushar@ece.gatech.edu bm = [SysConfig(), SysConfig()] 12311666Stushar@ece.gatech.edu else: 12411666Stushar@ece.gatech.edu bm = [SysConfig()] 12511666Stushar@ece.gatech.edu 12611666Stushar@ece.gatech.edunp = options.num_cpus 12711666Stushar@ece.gatech.edu 12811666Stushar@ece.gatech.eduif buildEnv['TARGET_ISA'] == "alpha": 12911666Stushar@ece.gatech.edu test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0]) 13011666Stushar@ece.gatech.eduelif buildEnv['TARGET_ISA'] == "mips": 13111666Stushar@ece.gatech.edu test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0]) 13211666Stushar@ece.gatech.eduelif buildEnv['TARGET_ISA'] == "sparc": 13311666Stushar@ece.gatech.edu test_sys = makeSparcSystem(test_mem_mode, bm[0]) 13411666Stushar@ece.gatech.eduelif buildEnv['TARGET_ISA'] == "x86": 13511666Stushar@ece.gatech.edu test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0]) 13611666Stushar@ece.gatech.edu setWorkCountOptions(test_sys, options) 13711666Stushar@ece.gatech.eduelif buildEnv['TARGET_ISA'] == "arm": 13811666Stushar@ece.gatech.edu test_sys = makeArmSystem(test_mem_mode, 13911666Stushar@ece.gatech.edu options.machine_type, bm[0], 14011666Stushar@ece.gatech.edu bare_metal=options.bare_metal) 14111666Stushar@ece.gatech.edu setWorkCountOptions(test_sys, options) 14211666Stushar@ece.gatech.eduelse: 14311666Stushar@ece.gatech.edu fatal("incapable of building non-alpha or non-sparc full system!") 14411666Stushar@ece.gatech.edu 14511666Stushar@ece.gatech.eduif options.kernel is not None: 14611666Stushar@ece.gatech.edu test_sys.kernel = binary(options.kernel) 14711666Stushar@ece.gatech.edu 14811666Stushar@ece.gatech.eduif options.script is not None: 14911666Stushar@ece.gatech.edu test_sys.readfile = options.script 15011666Stushar@ece.gatech.edu 15111666Stushar@ece.gatech.edutest_sys.init_param = options.init_param 15211666Stushar@ece.gatech.edu 15311666Stushar@ece.gatech.edutest_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)] 15411666Stushar@ece.gatech.edu 15511666Stushar@ece.gatech.eduCacheConfig.config_cache(options, test_sys) 15611666Stushar@ece.gatech.edu 15711666Stushar@ece.gatech.eduif bm[0]: 15811666Stushar@ece.gatech.edu mem_size = bm[0].mem() 15911666Stushar@ece.gatech.eduelse: 16011666Stushar@ece.gatech.edu mem_size = SysConfig().mem() 16111666Stushar@ece.gatech.eduif options.caches or options.l2cache: 16211666Stushar@ece.gatech.edu test_sys.iocache = IOCache(addr_range=mem_size) 16311666Stushar@ece.gatech.edu test_sys.iocache.cpu_side = test_sys.iobus.master 16411666Stushar@ece.gatech.edu test_sys.iocache.mem_side = test_sys.membus.slave 16511666Stushar@ece.gatech.eduelse: 16611666Stushar@ece.gatech.edu test_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns', 16711666Stushar@ece.gatech.edu ranges = [AddrRange(mem_size)]) 16811666Stushar@ece.gatech.edu test_sys.iobridge.slave = test_sys.iobus.master 16911666Stushar@ece.gatech.edu test_sys.iobridge.master = test_sys.membus.slave 17011666Stushar@ece.gatech.edu 17111666Stushar@ece.gatech.edufor i in xrange(np): 17211666Stushar@ece.gatech.edu if options.fastmem: 17311666Stushar@ece.gatech.edu test_sys.cpu[i].physmem_port = test_sys.physmem.port 17411666Stushar@ece.gatech.edu 17511666Stushar@ece.gatech.eduif buildEnv['TARGET_ISA'] == 'mips': 17611666Stushar@ece.gatech.edu setMipsOptions(TestCPUClass) 17711666Stushar@ece.gatech.edu 17811666Stushar@ece.gatech.eduif len(bm) == 2: 17911666Stushar@ece.gatech.edu if buildEnv['TARGET_ISA'] == 'alpha': 18011666Stushar@ece.gatech.edu drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 18111666Stushar@ece.gatech.edu elif buildEnv['TARGET_ISA'] == 'mips': 18211666Stushar@ece.gatech.edu drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1]) 18311666Stushar@ece.gatech.edu elif buildEnv['TARGET_ISA'] == 'sparc': 18411666Stushar@ece.gatech.edu drive_sys = makeSparcSystem(drive_mem_mode, bm[1]) 18511666Stushar@ece.gatech.edu elif buildEnv['TARGET_ISA'] == 'x86': 18611666Stushar@ece.gatech.edu drive_sys = makeX86System(drive_mem_mode, np, bm[1]) 18711666Stushar@ece.gatech.edu elif buildEnv['TARGET_ISA'] == 'arm': 18811666Stushar@ece.gatech.edu drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1]) 18911666Stushar@ece.gatech.edu 19011666Stushar@ece.gatech.edu drive_sys.cpu = DriveCPUClass(cpu_id=0) 19111666Stushar@ece.gatech.edu drive_sys.cpu.connectAllPorts(drive_sys.membus) 19211666Stushar@ece.gatech.edu if options.fastmem: 19311666Stushar@ece.gatech.edu drive_sys.cpu.physmem_port = drive_sys.physmem.port 19411666Stushar@ece.gatech.edu if options.kernel is not None: 19511666Stushar@ece.gatech.edu drive_sys.kernel = binary(options.kernel) 19611666Stushar@ece.gatech.edu drive_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns', 19711666Stushar@ece.gatech.edu ranges = [AddrRange(bm[1].mem())]) 19811666Stushar@ece.gatech.edu drive_sys.iobridge.slave = drive_sys.iobus.master 19911666Stushar@ece.gatech.edu drive_sys.iobridge.master = drive_sys.membus.slave 20011666Stushar@ece.gatech.edu 20111666Stushar@ece.gatech.edu drive_sys.init_param = options.init_param 20211666Stushar@ece.gatech.edu root = makeDualRoot(True, test_sys, drive_sys, options.etherdump) 20311666Stushar@ece.gatech.eduelif len(bm) == 1: 20411666Stushar@ece.gatech.edu root = Root(full_system=True, system=test_sys) 20511666Stushar@ece.gatech.eduelse: 20611666Stushar@ece.gatech.edu print "Error I don't know how to create more than 2 systems." 20711666Stushar@ece.gatech.edu sys.exit(1) 20811666Stushar@ece.gatech.edu 20911666Stushar@ece.gatech.eduif options.timesync: 21011666Stushar@ece.gatech.edu root.time_sync_enable = True 21111666Stushar@ece.gatech.edu 21211666Stushar@ece.gatech.eduif options.frame_capture: 21311666Stushar@ece.gatech.edu VncServer.frame_capture = True 21411666Stushar@ece.gatech.edu 21511666Stushar@ece.gatech.eduSimulation.run(options, root, test_sys, FutureClass) 21611666Stushar@ece.gatech.edu