fs.py revision 8354
16928SBrad.Beckmann@amd.com# Copyright (c) 2010 ARM Limited 26928SBrad.Beckmann@amd.com# All rights reserved. 36928SBrad.Beckmann@amd.com# 46928SBrad.Beckmann@amd.com# The license below extends only to copyright in the software and shall 56928SBrad.Beckmann@amd.com# not be construed as granting a license to any other intellectual 66928SBrad.Beckmann@amd.com# property including but not limited to intellectual property relating 76928SBrad.Beckmann@amd.com# to a hardware implementation of the functionality of the software 86928SBrad.Beckmann@amd.com# licensed hereunder. You may use the software subject to the license 96928SBrad.Beckmann@amd.com# terms below provided that you ensure that this notice is replicated 106928SBrad.Beckmann@amd.com# unmodified and in its entirety in all distributions of the software, 116928SBrad.Beckmann@amd.com# modified or unmodified, in source code or in binary form. 126928SBrad.Beckmann@amd.com# 136928SBrad.Beckmann@amd.com# Copyright (c) 2006-2007 The Regents of The University of Michigan 146928SBrad.Beckmann@amd.com# All rights reserved. 156928SBrad.Beckmann@amd.com# 166928SBrad.Beckmann@amd.com# Redistribution and use in source and binary forms, with or without 176928SBrad.Beckmann@amd.com# modification, are permitted provided that the following conditions are 186928SBrad.Beckmann@amd.com# met: redistributions of source code must retain the above copyright 196928SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer; 206928SBrad.Beckmann@amd.com# redistributions in binary form must reproduce the above copyright 216928SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer in the 226928SBrad.Beckmann@amd.com# documentation and/or other materials provided with the distribution; 236928SBrad.Beckmann@amd.com# neither the name of the copyright holders nor the names of its 246928SBrad.Beckmann@amd.com# contributors may be used to endorse or promote products derived from 256928SBrad.Beckmann@amd.com# this software without specific prior written permission. 266928SBrad.Beckmann@amd.com# 276928SBrad.Beckmann@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 286928SBrad.Beckmann@amd.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 296928SBrad.Beckmann@amd.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 306928SBrad.Beckmann@amd.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 316928SBrad.Beckmann@amd.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 326928SBrad.Beckmann@amd.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 336928SBrad.Beckmann@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 346928SBrad.Beckmann@amd.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 356928SBrad.Beckmann@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 366928SBrad.Beckmann@amd.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 376928SBrad.Beckmann@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 386928SBrad.Beckmann@amd.com# 396928SBrad.Beckmann@amd.com# Authors: Ali Saidi 406928SBrad.Beckmann@amd.com 416928SBrad.Beckmann@amd.comimport optparse 426928SBrad.Beckmann@amd.comimport os 436928SBrad.Beckmann@amd.comimport sys 446928SBrad.Beckmann@amd.com 456928SBrad.Beckmann@amd.comimport m5 466928SBrad.Beckmann@amd.comfrom m5.defines import buildEnv 476928SBrad.Beckmann@amd.comfrom m5.objects import * 486928SBrad.Beckmann@amd.comfrom m5.util import addToPath, fatal 496928SBrad.Beckmann@amd.com 506928SBrad.Beckmann@amd.comif not buildEnv['FULL_SYSTEM']: 516928SBrad.Beckmann@amd.com fatal("This script requires full-system mode (*_FS).") 527570SBrad.Beckmann@amd.com 536928SBrad.Beckmann@amd.comaddToPath('../common') 547570SBrad.Beckmann@amd.com 556928SBrad.Beckmann@amd.comfrom FSConfig import * 566928SBrad.Beckmann@amd.comfrom SysPaths import * 576928SBrad.Beckmann@amd.comfrom Benchmarks import * 586928SBrad.Beckmann@amd.comimport Simulation 596928SBrad.Beckmann@amd.comimport CacheConfig 606928SBrad.Beckmann@amd.comfrom Caches import * 617570SBrad.Beckmann@amd.com 627570SBrad.Beckmann@amd.com# Get paths we might need. It's expected this file is in m5/configs/example. 637570SBrad.Beckmann@amd.comconfig_path = os.path.dirname(os.path.abspath(__file__)) 647570SBrad.Beckmann@amd.comconfig_root = os.path.dirname(config_path) 657570SBrad.Beckmann@amd.com 667570SBrad.Beckmann@amd.comparser = optparse.OptionParser() 677570SBrad.Beckmann@amd.com 687570SBrad.Beckmann@amd.com# Simulation options 697570SBrad.Beckmann@amd.comparser.add_option("--timesync", action="store_true", 707570SBrad.Beckmann@amd.com help="Prevent simulated time from getting ahead of real time") 717570SBrad.Beckmann@amd.com 727570SBrad.Beckmann@amd.com# System options 737570SBrad.Beckmann@amd.comparser.add_option("--kernel", action="store", type="string") 746928SBrad.Beckmann@amd.comparser.add_option("--script", action="store", type="string") 756928SBrad.Beckmann@amd.comif buildEnv['TARGET_ISA'] == "arm": 766928SBrad.Beckmann@amd.com parser.add_option("--bare-metal", action="store_true", 776928SBrad.Beckmann@amd.com help="Provide the raw system without the linux specific bits") 787526Ssteve.reinhardt@amd.com parser.add_option("--machine-type", action="store", type="choice", 796928SBrad.Beckmann@amd.com choices=ArmMachineType.map.keys(), default="RealView_PBX") 808436SBrad.Beckmann@amd.com# Benchmark options 816928SBrad.Beckmann@amd.comparser.add_option("--dual", action="store_true", 828322Ssteve.reinhardt@amd.com help="Simulate two systems attached with an ethernet link") 836928SBrad.Beckmann@amd.comparser.add_option("-b", "--benchmark", action="store", type="string", 846928SBrad.Beckmann@amd.com dest="benchmark", 856928SBrad.Beckmann@amd.com help="Specify the benchmark to run. Available benchmarks: %s"\ 866928SBrad.Beckmann@amd.com % DefinedBenchmarks) 876928SBrad.Beckmann@amd.com 886928SBrad.Beckmann@amd.com# Metafile options 896928SBrad.Beckmann@amd.comparser.add_option("--etherdump", action="store", type="string", dest="etherdump", 908322Ssteve.reinhardt@amd.com help="Specify the filename to dump a pcap capture of the" \ 916928SBrad.Beckmann@amd.com "ethernet traffic") 926928SBrad.Beckmann@amd.com 936928SBrad.Beckmann@amd.comexecfile(os.path.join(config_root, "common", "Options.py")) 946928SBrad.Beckmann@amd.com 956928SBrad.Beckmann@amd.com(options, args) = parser.parse_args() 966928SBrad.Beckmann@amd.com 976928SBrad.Beckmann@amd.comif args: 986928SBrad.Beckmann@amd.com print "Error: script doesn't take any positional arguments" 996928SBrad.Beckmann@amd.com sys.exit(1) 1006928SBrad.Beckmann@amd.com 1016928SBrad.Beckmann@amd.com# driver system CPU is always simple... note this is an assignment of 1028436SBrad.Beckmann@amd.com# a class, not an instance. 1038436SBrad.Beckmann@amd.comDriveCPUClass = AtomicSimpleCPU 1048436SBrad.Beckmann@amd.comdrive_mem_mode = 'atomic' 1058436SBrad.Beckmann@amd.com 1068436SBrad.Beckmann@amd.com# system under test can be any CPU 1078436SBrad.Beckmann@amd.com(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 1088706Sandreas.hansson@arm.com 1098706Sandreas.hansson@arm.comTestCPUClass.clock = '2GHz' 1108706Sandreas.hansson@arm.comDriveCPUClass.clock = '2GHz' 1116928SBrad.Beckmann@amd.com 1126928SBrad.Beckmann@amd.comif options.benchmark: 1136928SBrad.Beckmann@amd.com try: 1146928SBrad.Beckmann@amd.com bm = Benchmarks[options.benchmark] 1156928SBrad.Beckmann@amd.com except KeyError: 1166928SBrad.Beckmann@amd.com print "Error benchmark %s has not been defined." % options.benchmark 1176928SBrad.Beckmann@amd.com print "Valid benchmarks are: %s" % DefinedBenchmarks 1186928SBrad.Beckmann@amd.com sys.exit(1) 1196928SBrad.Beckmann@amd.comelse: 120 if options.dual: 121 bm = [SysConfig(), SysConfig()] 122 else: 123 bm = [SysConfig()] 124 125np = options.num_cpus 126 127if buildEnv['TARGET_ISA'] == "alpha": 128 test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0]) 129elif buildEnv['TARGET_ISA'] == "mips": 130 test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0]) 131elif buildEnv['TARGET_ISA'] == "sparc": 132 test_sys = makeSparcSystem(test_mem_mode, bm[0]) 133elif buildEnv['TARGET_ISA'] == "x86": 134 test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0]) 135 setWorkCountOptions(test_sys, options) 136elif buildEnv['TARGET_ISA'] == "arm": 137 test_sys = makeArmSystem(test_mem_mode, 138 options.machine_type, bm[0], 139 bare_metal=options.bare_metal) 140 setWorkCountOptions(test_sys, options) 141else: 142 fatal("incapable of building non-alpha or non-sparc full system!") 143 144if options.kernel is not None: 145 test_sys.kernel = binary(options.kernel) 146 147if options.script is not None: 148 test_sys.readfile = options.script 149 150test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)] 151 152CacheConfig.config_cache(options, test_sys) 153 154if options.caches or options.l2cache: 155 if bm[0]: 156 mem_size = bm[0].mem() 157 else: 158 mem_size = SysConfig().mem() 159 # For x86, we need to poke a hole for interrupt messages to get back to the 160 # CPU. These use a portion of the physical address space which has a 161 # non-zero prefix in the top nibble. Normal memory accesses have a 0 162 # prefix. 163 if buildEnv['TARGET_ISA'] == 'x86': 164 test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max >> 4)] 165 else: 166 test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)] 167 test_sys.bridge.filter_ranges_b=[AddrRange(mem_size)] 168 test_sys.iocache = IOCache(addr_range=mem_size) 169 test_sys.iocache.cpu_side = test_sys.iobus.port 170 test_sys.iocache.mem_side = test_sys.membus.port 171 172for i in xrange(np): 173 if options.fastmem: 174 test_sys.cpu[i].physmem_port = test_sys.physmem.port 175 176if buildEnv['TARGET_ISA'] == 'mips': 177 setMipsOptions(TestCPUClass) 178 179if len(bm) == 2: 180 if buildEnv['TARGET_ISA'] == 'alpha': 181 drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 182 elif buildEnv['TARGET_ISA'] == 'mips': 183 drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1]) 184 elif buildEnv['TARGET_ISA'] == 'sparc': 185 drive_sys = makeSparcSystem(drive_mem_mode, bm[1]) 186 elif buildEnv['TARGET_ISA'] == 'x86': 187 drive_sys = makeX86System(drive_mem_mode, np, bm[1]) 188 elif buildEnv['TARGET_ISA'] == 'arm': 189 drive_sys = makeArmSystem(drive_mem_mode, 190 machine_options.machine_type, bm[1]) 191 drive_sys.cpu = DriveCPUClass(cpu_id=0) 192 drive_sys.cpu.connectAllPorts(drive_sys.membus) 193 if options.fastmem: 194 drive_sys.cpu.physmem_port = drive_sys.physmem.port 195 if options.kernel is not None: 196 drive_sys.kernel = binary(options.kernel) 197 198 root = makeDualRoot(test_sys, drive_sys, options.etherdump) 199elif len(bm) == 1: 200 root = Root(system=test_sys) 201else: 202 print "Error I don't know how to create more than 2 systems." 203 sys.exit(1) 204 205if options.timesync: 206 root.time_sync_enable = True 207 208Simulation.run(options, root, test_sys, FutureClass) 209