fs.py revision 8061
17586SAli.Saidi@arm.com# Copyright (c) 2010 ARM Limited 27586SAli.Saidi@arm.com# All rights reserved. 37586SAli.Saidi@arm.com# 47586SAli.Saidi@arm.com# The license below extends only to copyright in the software and shall 57586SAli.Saidi@arm.com# not be construed as granting a license to any other intellectual 67586SAli.Saidi@arm.com# property including but not limited to intellectual property relating 77586SAli.Saidi@arm.com# to a hardware implementation of the functionality of the software 87586SAli.Saidi@arm.com# licensed hereunder. You may use the software subject to the license 97586SAli.Saidi@arm.com# terms below provided that you ensure that this notice is replicated 107586SAli.Saidi@arm.com# unmodified and in its entirety in all distributions of the software, 117586SAli.Saidi@arm.com# modified or unmodified, in source code or in binary form. 127586SAli.Saidi@arm.com# 133970Sgblack@eecs.umich.edu# Copyright (c) 2006-2007 The Regents of The University of Michigan 143005Sstever@eecs.umich.edu# All rights reserved. 153005Sstever@eecs.umich.edu# 163005Sstever@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 173005Sstever@eecs.umich.edu# modification, are permitted provided that the following conditions are 183005Sstever@eecs.umich.edu# met: redistributions of source code must retain the above copyright 193005Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 203005Sstever@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 213005Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 223005Sstever@eecs.umich.edu# documentation and/or other materials provided with the distribution; 233005Sstever@eecs.umich.edu# neither the name of the copyright holders nor the names of its 243005Sstever@eecs.umich.edu# contributors may be used to endorse or promote products derived from 253005Sstever@eecs.umich.edu# this software without specific prior written permission. 263005Sstever@eecs.umich.edu# 273005Sstever@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 283005Sstever@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 293005Sstever@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 303005Sstever@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 313005Sstever@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 323005Sstever@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 333005Sstever@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 343005Sstever@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 353005Sstever@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 363005Sstever@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 373005Sstever@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 383005Sstever@eecs.umich.edu# 393005Sstever@eecs.umich.edu# Authors: Ali Saidi 403005Sstever@eecs.umich.edu 416654Snate@binkert.orgimport optparse 426654Snate@binkert.orgimport os 436654Snate@binkert.orgimport sys 442889SN/A 452710SN/Aimport m5 466654Snate@binkert.orgfrom m5.defines import buildEnv 476654Snate@binkert.orgfrom m5.objects import * 486654Snate@binkert.orgfrom m5.util import addToPath, fatal 495457Ssaidi@eecs.umich.edu 506654Snate@binkert.orgif not buildEnv['FULL_SYSTEM']: 516654Snate@binkert.org fatal("This script requires full-system mode (*_FS).") 525457Ssaidi@eecs.umich.edu 536654Snate@binkert.orgaddToPath('../common') 546654Snate@binkert.org 552934SN/Afrom FSConfig import * 562549SN/Afrom SysPaths import * 572995SN/Afrom Benchmarks import * 583395Shsul@eecs.umich.eduimport Simulation 596981SLisa.Hsu@amd.comimport CacheConfig 603448Shsul@eecs.umich.edufrom Caches import * 612549SN/A 623444Sktlim@umich.edu# Get paths we might need. It's expected this file is in m5/configs/example. 633444Sktlim@umich.educonfig_path = os.path.dirname(os.path.abspath(__file__)) 643444Sktlim@umich.educonfig_root = os.path.dirname(config_path) 653444Sktlim@umich.edu 662889SN/Aparser = optparse.OptionParser() 672710SN/A 687861Sgblack@eecs.umich.edu# Simulation options 697861Sgblack@eecs.umich.eduparser.add_option("--timesync", action="store_true", 707861Sgblack@eecs.umich.edu help="Prevent simulated time from getting ahead of real time") 717861Sgblack@eecs.umich.edu 723873Sbinkertn@umich.edu# System options 733873Sbinkertn@umich.eduparser.add_option("--kernel", action="store", type="string") 743873Sbinkertn@umich.eduparser.add_option("--script", action="store", type="string") 757586SAli.Saidi@arm.comif buildEnv['TARGET_ISA'] == "arm": 767586SAli.Saidi@arm.com parser.add_option("--bare-metal", action="store_true", 777586SAli.Saidi@arm.com help="Provide the raw system without the linux specific bits") 787586SAli.Saidi@arm.com parser.add_option("--machine-type", action="store", type="choice", 797586SAli.Saidi@arm.com choices=ArmMachineType.map.keys(), default="RealView_PBX") 803322Shsul@eecs.umich.edu# Benchmark options 812995SN/Aparser.add_option("--dual", action="store_true", 822995SN/A help="Simulate two systems attached with an ethernet link") 832995SN/Aparser.add_option("-b", "--benchmark", action="store", type="string", 842995SN/A dest="benchmark", 852995SN/A help="Specify the benchmark to run. Available benchmarks: %s"\ 863143Shsul@eecs.umich.edu % DefinedBenchmarks) 873322Shsul@eecs.umich.edu 883322Shsul@eecs.umich.edu# Metafile options 893025Ssaidi@eecs.umich.eduparser.add_option("--etherdump", action="store", type="string", dest="etherdump", 903143Shsul@eecs.umich.edu help="Specify the filename to dump a pcap capture of the" \ 913143Shsul@eecs.umich.edu "ethernet traffic") 923322Shsul@eecs.umich.edu 933444Sktlim@umich.eduexecfile(os.path.join(config_root, "common", "Options.py")) 943322Shsul@eecs.umich.edu 952710SN/A(options, args) = parser.parse_args() 962710SN/A 972710SN/Aif args: 982710SN/A print "Error: script doesn't take any positional arguments" 992710SN/A sys.exit(1) 1002710SN/A 1013322Shsul@eecs.umich.edu# driver system CPU is always simple... note this is an assignment of 1023304Sstever@eecs.umich.edu# a class, not an instance. 1033322Shsul@eecs.umich.eduDriveCPUClass = AtomicSimpleCPU 1043322Shsul@eecs.umich.edudrive_mem_mode = 'atomic' 1053304Sstever@eecs.umich.edu 1063481Shsul@eecs.umich.edu# system under test can be any CPU 1073481Shsul@eecs.umich.edu(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 1082566SN/A 1093322Shsul@eecs.umich.eduTestCPUClass.clock = '2GHz' 1103322Shsul@eecs.umich.eduDriveCPUClass.clock = '2GHz' 1112995SN/A 1122995SN/Aif options.benchmark: 1133304Sstever@eecs.umich.edu try: 1143304Sstever@eecs.umich.edu bm = Benchmarks[options.benchmark] 1153304Sstever@eecs.umich.edu except KeyError: 1162995SN/A print "Error benchmark %s has not been defined." % options.benchmark 1172995SN/A print "Valid benchmarks are: %s" % DefinedBenchmarks 1182995SN/A sys.exit(1) 1192917SN/Aelse: 1202995SN/A if options.dual: 1213304Sstever@eecs.umich.edu bm = [SysConfig(), SysConfig()] 1222995SN/A else: 1233304Sstever@eecs.umich.edu bm = [SysConfig()] 1243304Sstever@eecs.umich.edu 1256135Sgblack@eecs.umich.edunp = options.num_cpus 1266135Sgblack@eecs.umich.edu 1276654Snate@binkert.orgif buildEnv['TARGET_ISA'] == "alpha": 1283819Shsul@eecs.umich.edu test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0]) 1296654Snate@binkert.orgelif buildEnv['TARGET_ISA'] == "mips": 1305222Sksewell@umich.edu test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0]) 1316654Snate@binkert.orgelif buildEnv['TARGET_ISA'] == "sparc": 1323819Shsul@eecs.umich.edu test_sys = makeSparcSystem(test_mem_mode, bm[0]) 1336654Snate@binkert.orgelif buildEnv['TARGET_ISA'] == "x86": 1347925Sgblack@eecs.umich.edu test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0]) 1357925Sgblack@eecs.umich.edu setWorkCountOptions(test_sys, options) 1367586SAli.Saidi@arm.comelif buildEnv['TARGET_ISA'] == "arm": 1378061SAli.Saidi@ARM.com test_sys = makeArmSystem(test_mem_mode, 1388061SAli.Saidi@ARM.com options.machine_type, bm[0], 1398061SAli.Saidi@ARM.com bare_metal=options.bare_metal) 1403819Shsul@eecs.umich.eduelse: 1416654Snate@binkert.org fatal("incapable of building non-alpha or non-sparc full system!") 1423819Shsul@eecs.umich.edu 1433873Sbinkertn@umich.eduif options.kernel is not None: 1443873Sbinkertn@umich.edu test_sys.kernel = binary(options.kernel) 1453873Sbinkertn@umich.edu 1463873Sbinkertn@umich.eduif options.script is not None: 1473873Sbinkertn@umich.edu test_sys.readfile = options.script 1483873Sbinkertn@umich.edu 1496995Sgblack@eecs.umich.edutest_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)] 1503668Srdreslin@umich.edu 1516995Sgblack@eecs.umich.eduCacheConfig.config_cache(options, test_sys) 1525142Ssaidi@eecs.umich.edu 1536636Ssteve.reinhardt@amd.comif options.caches or options.l2cache: 1547586SAli.Saidi@arm.com if bm[0]: 1557586SAli.Saidi@arm.com mem_size = bm[0].mem() 1567586SAli.Saidi@arm.com else: 1577586SAli.Saidi@arm.com mem_size = SysConfig().mem() 1587877Sgblack@eecs.umich.edu # For x86, we need to poke a hole for interrupt messages to get back to the 1597877Sgblack@eecs.umich.edu # CPU. These use a portion of the physical address space which has a 1607877Sgblack@eecs.umich.edu # non-zero prefix in the top nibble. Normal memory accesses have a 0 1617877Sgblack@eecs.umich.edu # prefix. 1627877Sgblack@eecs.umich.edu if buildEnv['TARGET_ISA'] == 'x86': 1637877Sgblack@eecs.umich.edu test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max >> 4)] 1647877Sgblack@eecs.umich.edu else: 1657877Sgblack@eecs.umich.edu test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)] 1667586SAli.Saidi@arm.com test_sys.bridge.filter_ranges_b=[AddrRange(mem_size)] 1677586SAli.Saidi@arm.com test_sys.iocache = IOCache(addr_range=mem_size) 1685142Ssaidi@eecs.umich.edu test_sys.iocache.cpu_side = test_sys.iobus.port 1695142Ssaidi@eecs.umich.edu test_sys.iocache.mem_side = test_sys.membus.port 1705142Ssaidi@eecs.umich.edu 1713312Sstever@eecs.umich.edufor i in xrange(np): 1724968Sacolyte@umich.edu if options.fastmem: 1734968Sacolyte@umich.edu test_sys.cpu[i].physmem_port = test_sys.physmem.port 1744968Sacolyte@umich.edu 1756654Snate@binkert.orgif buildEnv['TARGET_ISA'] == 'mips': 1765254Sksewell@umich.edu setMipsOptions(TestCPUClass) 1775222Sksewell@umich.edu 1783005Sstever@eecs.umich.eduif len(bm) == 2: 1796654Snate@binkert.org if buildEnv['TARGET_ISA'] == 'alpha': 1803819Shsul@eecs.umich.edu drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 1816654Snate@binkert.org elif buildEnv['TARGET_ISA'] == 'mips': 1825222Sksewell@umich.edu drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1]) 1836654Snate@binkert.org elif buildEnv['TARGET_ISA'] == 'sparc': 1843819Shsul@eecs.umich.edu drive_sys = makeSparcSystem(drive_mem_mode, bm[1]) 1856654Snate@binkert.org elif buildEnv['TARGET_ISA'] == 'x86': 1866135Sgblack@eecs.umich.edu drive_sys = makeX86System(drive_mem_mode, np, bm[1]) 1877586SAli.Saidi@arm.com elif buildEnv['TARGET_ISA'] == 'arm': 1888061SAli.Saidi@ARM.com drive_sys = makeArmSystem(drive_mem_mode, 1898061SAli.Saidi@ARM.com machine_options.machine_type, bm[1]) 1903322Shsul@eecs.umich.edu drive_sys.cpu = DriveCPUClass(cpu_id=0) 1917876Sgblack@eecs.umich.edu drive_sys.cpu.connectAllPorts(drive_sys.membus) 1924968Sacolyte@umich.edu if options.fastmem: 1934968Sacolyte@umich.edu drive_sys.cpu.physmem_port = drive_sys.physmem.port 1944837Ssaidi@eecs.umich.edu if options.kernel is not None: 1954837Ssaidi@eecs.umich.edu drive_sys.kernel = binary(options.kernel) 1964837Ssaidi@eecs.umich.edu 1973322Shsul@eecs.umich.edu root = makeDualRoot(test_sys, drive_sys, options.etherdump) 1983005Sstever@eecs.umich.eduelif len(bm) == 1: 1994167Sbinkertn@umich.edu root = Root(system=test_sys) 2003005Sstever@eecs.umich.eduelse: 2013005Sstever@eecs.umich.edu print "Error I don't know how to create more than 2 systems." 2023005Sstever@eecs.umich.edu sys.exit(1) 2032566SN/A 2047861Sgblack@eecs.umich.eduif options.timesync: 2057861Sgblack@eecs.umich.edu root.time_sync_enable = True 2067861Sgblack@eecs.umich.edu 2073481Shsul@eecs.umich.eduSimulation.run(options, root, test_sys, FutureClass) 208